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[/] [t51/] [trunk/] [bench/] [vhdl/] [BinaryLog.vhd] - Blame information for rev 51

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1 2 jesus
--
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-- Output port with binary file log
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--
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-- Version : 0146
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--
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-- Copyright (c) 2001 Daniel Wallner (jesus@opencores.org)
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--
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-- All rights reserved
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--
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-- Redistributions of source code must retain the above copyright notice,
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-- this list of conditions and the following disclaimer.
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--
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-- Redistributions in synthesized form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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--
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-- Neither the name of the author nor the names of other contributors may
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-- be used to endorse or promote products derived from this software without
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-- specific prior written permission.
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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-- Please report bugs to the author, but before you do so, please
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-- make sure that this is not a derivative work and that
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-- you have the latest version of this file.
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--
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-- The latest version of this file can be found at:
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--      http://www.opencores.org/cvsweb.shtml/t51/
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--
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-- Limitations :
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--
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-- File history :
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--
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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entity BinaryLog is
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        generic(
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                FileName                : string;
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                Bytes                   : integer := 1;         -- Number of bytes per word
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                LittleEndian    : boolean := true       -- Byte order
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        );
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        port(
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                Clk                             : in std_logic;
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                En                              : in std_logic;
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                Data                    : in std_logic_vector(Bytes * 8 - 1 downto 0)
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        );
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end BinaryLog;
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architecture behaviour of BinaryLog is
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        function to_char(
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                constant Byte : std_logic_vector(7 downto 0)
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        ) return character is
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        begin
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                return character'val(to_integer(unsigned(Byte)));
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        end function;
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begin
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        process (clk)
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                type ChFile is file of character;
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                file OutFile : ChFile open write_mode is FileName;
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        begin
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                if Clk'event and Clk = '1' and En = '1' and now > 0 ns then
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                        if LittleEndian then
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                                for i in integer range 0 to Bytes - 1 loop
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                                        write(OutFile, to_char(Data(i * 8 + 7 downto i * 8)));
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                                end loop;
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                        else
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                                for i in integer range Bytes - 1 downto 0 loop
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                                        write(OutFile, to_char(Data(i * 8 + 7 downto i * 8)));
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                                end loop;
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                        end if;
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                end if;
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        end process;
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end;

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