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[/] [t6507lp/] [trunk/] [fv/] [alu_chk.e] - Blame information for rev 146

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alu_chk.e
<'
import alu_components;
 
unit alu_chk_u {
        reg_a : byte;
        reg_x : byte;
        reg_y : byte;
        reg_status : byte;
        reg_result : byte;
 
        inst : alu_input_s;
        next_inst : alu_input_s;
 
        count_cycles : int;
        first_cycle : bool;
 
        keep first_cycle == TRUE;
        keep count_cycles == 0;
 
        store(input : alu_input_s) is {
                count_cycles = count_cycles + 1;
 
                out ("CYCLE ", count_cycles, " STORE:");
                print input;
 
                if (first_cycle) {
                        inst = input;
                        next_inst = input;
                }
                else {
                        inst = next_inst;
                        next_inst = input;
                };
 
 
                if (count_cycles == 10000) {
                        dut_error();
                }
        };
 
        compare(alu_result:byte, alu_status:byte, alu_x:byte, alu_y:byte ) is {
                if (first_cycle) {
                        first_cycle = FALSE;
                        reg_x = 0;
                        reg_y = 0;
                        reg_status = 8'b00100010;
                        reg_a = 0; // TODO: check this
                        reg_result = 0;
                }
                else {
                        out ("CYCLE ", count_cycles, " COMPARE:");
                        print inst;
 
                        case inst.input_kind {
                                ENABLED_VALID: {
                                        out("CYCLE ", count_cycles, ": executing and comparing");
                                        execute();
                                };
                                DISABLED_VALID: {
                                        out("CYCLE ", count_cycles, ": just comparing");
                                };
                                RESET: {
                                        reg_x = 0;
                                        reg_y = 0;
                                        reg_status = 8'b00100010;
                                        reg_a = 0; // TODO: check this
                                        reg_result = 0;
 
                                        return;
                                };
                                default: {
                                        dut_error("error at e code");
                                };
                        };
 
                        // here i have already calculated. must compare!
 
                        if ((reg_result != alu_result) || (reg_x != alu_x) or (reg_y != alu_y) or (reg_status != alu_status)) {
                                print inst;
                                print me;
                                print alu_result;
                                print alu_status;
                                print alu_x;
                                print alu_y;
 
                                dut_error("WRONG!");
                        };
                };
        };
 
        execute() is {
                case inst.alu_opcode {
                        ADC_IMM: { exec_sum(); }; // A,Z,C,N = A+M+C
                        ADC_ZPG: { exec_sum(); };
                        ADC_ZPX: { exec_sum(); };
                        ADC_ABS: { exec_sum(); };
                        ADC_ABX: { exec_sum(); };
                        ADC_ABY: { exec_sum(); };
                        ADC_IDX: { exec_sum(); };
                        ADC_IDY: { exec_sum(); };
 
                        AND_IMM: { exec_and(); }; // A,Z,N = A&M
                        AND_ZPG: { exec_and(); };
                        AND_ZPX: { exec_and(); };
                        AND_ABS: { exec_and(); };
                        AND_ABX: { exec_and(); };
                        AND_ABY: { exec_and(); };
                        AND_IDX: { exec_and(); };
                        AND_IDY: { exec_and(); };
 
                        ASL_ACC: { exec_asl_acc(); }; // A,Z,C,N = M*2
 
                        ASL_ZPG: { exec_asl_mem(); }; // M,Z,C,N = M*2
                        ASL_ZPX: { exec_asl_mem(); };
                        ASL_ABS: { exec_asl_mem(); };
                        ASL_ABX: { exec_asl_mem(); };
 
                        default: {
                                //dut_error("unknown opcode");
                        }
                };
        };
 
        exec_asl_acc() is {
                reg_status[0:0] = reg_a[7:7];
                reg_a = reg_a * 2;
                update_z(reg_a);
                update_n(reg_a);
                reg_result = reg_a;
        };
 
        exec_asl_mem() is {
                reg_status[0:0] = inst.alu_a[7:7];
                reg_result = inst.alu_a * 2;
                update_z(reg_result);
                update_n(reg_result);
        };
 
        exec_and() is {
                reg_a = reg_a & inst.alu_a; // TODO: this is probably wrong
                update_z(reg_a);
                update_n(reg_a);
                reg_result = reg_a;
        };
 
        exec_sum() is {
                out("adding: ", reg_a, " + ", inst.alu_a, " + ", reg_status[0:0]);
                reg_result = reg_a + inst.alu_a + reg_status[0:0];
                update_c(reg_a, inst.alu_a, reg_status[0:0]);
                update_v(reg_a, inst.alu_a, reg_result);
                update_z(reg_result);
                update_n(reg_result);
                reg_a = reg_result;
                //print me;
                //dut_error();
        };
 
        update_c(arg1 : byte, arg2 : byte, arg3: bit) is {
                if (arg1 + arg2 + arg3 > 256) {
                        reg_status[0:0] = 1;
                }
                else {
                        reg_status[0:0] = 0;
                }
        };
 
        update_v(op1 : byte, op2 : byte, res : byte) is {
                if ((op1[7:7] == op2[7:7]) && (op1[7:7] != res[7:7])) {
                        reg_status[6:6] = 1;
                }
                else {
                        reg_status[6:6] = 0;
                };
        };
 
        update_z(arg : byte) is {
                if (arg == 0) {
                        reg_status[1:1] = 1;
                }
                else {
                        reg_status[1:1] = 0;
                }
        };
 
 
        update_n(arg : byte) is {
                if (arg[7:7] == 1) {
                        reg_status[7:7] = 1;
                }
                else {
                        reg_status[7:7] = 0;
                }
        };
};
'>

Line No.	Rev	Author	Line
1	131	creep	`alu_chk.e`
2			`<'`
3			`import alu_components;`
4
5			`unit alu_chk_u {`
6			`reg_a : byte;`
7			`reg_x : byte;`
8			`reg_y : byte;`
9			`reg_status : byte;`
10	135	creep	`reg_result : byte;`
11	131	creep
12	132	creep	`inst : alu_input_s;`
13			`next_inst : alu_input_s;`
14
15	131	creep	`count_cycles : int;`
16			`first_cycle : bool;`
17
18			`keep first_cycle == TRUE;`
19			`keep count_cycles == 0;`
20
21			`store(input : alu_input_s) is {`
22	134	creep	`count_cycles = count_cycles + 1;`
23
24			`out ("CYCLE ", count_cycles, " STORE:");`
25	132	creep	`print input;`
26
27			`if (first_cycle) {`
28			`inst = input;`
29			`next_inst = input;`
30			`}`
31			`else {`
32			`inst = next_inst;`
33			`next_inst = input;`
34			`};`
35
36
37			`if (count_cycles == 10000) {`
38			`dut_error();`
39			`}`
40	131	creep	`};`
41
42			`compare(alu_result:byte, alu_status:byte, alu_x:byte, alu_y:byte ) is {`
43			`if (first_cycle) {`
44			`first_cycle = FALSE;`
45	143	creep	`reg_x = 0;`
46			`reg_y = 0;`
47			`reg_status = 8'b00100010;`
48	132	creep	`reg_a = 0; // TODO: check this`
49	135	creep	`reg_result = 0;`
50	131	creep	`}`
51	132	creep	`else {`
52	134	creep	`out ("CYCLE ", count_cycles, " COMPARE:");`
53			`print inst;`
54
55	132	creep	`case inst.input_kind {`
56			`ENABLED_VALID: {`
57	134	creep	`out("CYCLE ", count_cycles, ": executing and comparing");`
58	132	creep	`execute();`
59			`};`
60			`DISABLED_VALID: {`
61	134	creep	`out("CYCLE ", count_cycles, ": just comparing");`
62	132	creep	`};`
63	143	creep	`RESET: {`
64	146	creep	`reg_x = 0;`
65			`reg_y = 0;`
66			`reg_status = 8'b00100010;`
67			`reg_a = 0; // TODO: check this`
68			`reg_result = 0;`
69
70	143	creep	`return;`
71			`};`
72	132	creep	`default: {`
73			`dut_error("error at e code");`
74			`};`
75			`};`
76
77	133	creep	`// here i have already calculated. must compare!`
78	143	creep
79	146	creep	`if ((reg_result != alu_result) \|\| (reg_x != alu_x) or (reg_y != alu_y) or (reg_status != alu_status)) {`
80	135	creep	`print inst;`
81			`print me;`
82	134	creep	`print alu_result;`
83	135	creep	`print alu_status;`
84			`print alu_x;`
85			`print alu_y;`
86
87	133	creep	`dut_error("WRONG!");`
88			`};`
89	146	creep	`};`
90	131	creep	`};`
91	132	creep
92			`execute() is {`
93			`case inst.alu_opcode {`
94			`ADC_IMM: { exec_sum(); }; // A,Z,C,N = A+M+C`
95			`ADC_ZPG: { exec_sum(); };`
96			`ADC_ZPX: { exec_sum(); };`
97			`ADC_ABS: { exec_sum(); };`
98			`ADC_ABX: { exec_sum(); };`
99			`ADC_ABY: { exec_sum(); };`
100			`ADC_IDX: { exec_sum(); };`
101			`ADC_IDY: { exec_sum(); };`
102
103	133	creep	`AND_IMM: { exec_and(); }; // A,Z,N = A&M`
104	132	creep	`AND_ZPG: { exec_and(); };`
105			`AND_ZPX: { exec_and(); };`
106			`AND_ABS: { exec_and(); };`
107			`AND_ABX: { exec_and(); };`
108			`AND_ABY: { exec_and(); };`
109			`AND_IDX: { exec_and(); };`
110			`AND_IDY: { exec_and(); };`
111
112	135	creep	`ASL_ACC: { exec_asl_acc(); }; // A,Z,C,N = M*2`
113	132	creep
114	135	creep	`ASL_ZPG: { exec_asl_mem(); }; // M,Z,C,N = M*2`
115			`ASL_ZPX: { exec_asl_mem(); };`
116			`ASL_ABS: { exec_asl_mem(); };`
117			`ASL_ABX: { exec_asl_mem(); };`
118
119	132	creep	`default: {`
120			`//dut_error("unknown opcode");`
121			`}`
122			`};`
123			`};`
124
125	135	creep	`exec_asl_acc() is {`
126			`reg_status[0:0] = reg_a[7:7];`
127			`reg_a = reg_a * 2;`
128			`update_z(reg_a);`
129			`update_n(reg_a);`
130			`reg_result = reg_a;`
131			`};`
132
133			`exec_asl_mem() is {`
134			`reg_status[0:0] = inst.alu_a[7:7];`
135			`reg_result = inst.alu_a * 2;`
136			`update_z(reg_result);`
137			`update_n(reg_result);`
138			`};`
139
140	132	creep	`exec_and() is {`
141	133	creep	`reg_a = reg_a & inst.alu_a; // TODO: this is probably wrong`
142			`update_z(reg_a);`
143			`update_n(reg_a);`
144	135	creep	`reg_result = reg_a;`
145	132	creep	`};`
146
147			`exec_sum() is {`
148	146	creep	`out("adding: ", reg_a, " + ", inst.alu_a, " + ", reg_status[0:0]);`
149	144	creep	`reg_result = reg_a + inst.alu_a + reg_status[0:0];`
150	143	creep	`update_c(reg_a, inst.alu_a, reg_status[0:0]);`
151	146	creep	`update_v(reg_a, inst.alu_a, reg_result);`
152	144	creep	`update_z(reg_result);`
153			`update_n(reg_result);`
154			`reg_a = reg_result;`
155	135	creep	`//print me;`
156	134	creep	`//dut_error();`
157	132	creep	`};`
158
159	143	creep	`update_c(arg1 : byte, arg2 : byte, arg3: bit) is {`
160			`if (arg1 + arg2 + arg3 > 256) {`
161	132	creep	`reg_status[0:0] = 1;`
162			`}`
163			`else {`
164			`reg_status[0:0] = 0;`
165			`}`
166			`};`
167
168	146	creep	`update_v(op1 : byte, op2 : byte, res : byte) is {`
169			`if ((op1[7:7] == op2[7:7]) && (op1[7:7] != res[7:7])) {`
170			`reg_status[6:6] = 1;`
171			`}`
172			`else {`
173			`reg_status[6:6] = 0;`
174			`};`
175			`};`
176
177			`update_z(arg : byte) is {`
178			`if (arg == 0) {`
179			`reg_status[1:1] = 1;`
180			`}`
181			`else {`
182			`reg_status[1:1] = 0;`
183			`}`
184			`};`
185
186
187	132	creep	`update_n(arg : byte) is {`
188			`if (arg[7:7] == 1) {`
189			`reg_status[7:7] = 1;`
190			`}`
191			`else {`
192			`reg_status[7:7] = 0;`
193			`}`
194			`};`
195	131	creep	`};`
196			`'>`

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[/] [t6507lp/] [trunk/] [fv/] [alu_chk.e] - Blame information for rev 146