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[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_io.v] - Blame information for rev 252

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////////////////////////////////////////////////////////////////////////////
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////                                                                    ////
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//// T6507LP IP Core                                                    ////
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////                                                                    ////
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//// This file is part of the T6507LP project                           ////
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//// http://www.opencores.org/cores/t6507lp/                            ////
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////                                                                    ////
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//// Description                                                        ////
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//// 6507 io wrapper                                                    ////
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////                                                                    ////
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//// TODO:                                                              ////
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//// - Nothing                                                          ////
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////                                                                    ////
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//// Author(s):                                                         ////
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//// - Gabriel Oshiro Zardo, gabrieloshiro@gmail.com                    ////
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//// - Samuel Nascimento Pagliarini (creep), snpagliarini@gmail.com     ////
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////                                                                    ////
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////////////////////////////////////////////////////////////////////////////
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////                                                                    ////
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//// Copyright (C) 2001 Authors and OPENCORES.ORG                       ////
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////                                                                    ////
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//// This source file may be used and distributed without               ////
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//// restriction provided that this copyright statement is not          ////
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//// removed from the file and that any derivative work contains        ////
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//// the original copyright notice and the associated disclaimer.       ////
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////                                                                    ////
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//// This source file is free software; you can redistribute it         ////
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//// and/or modify it under the terms of the GNU Lesser General         ////
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//// Public License as published by the Free Software Foundation;       ////
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//// either version 2.1 of the License, or (at your option) any         ////
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//// later version.                                                     ////
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////                                                                    ////
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//// This source is distributed in the hope that it will be             ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied         ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR            ////
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//// PURPOSE. See the GNU Lesser General Public License for more        ////
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//// details.                                                           ////
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////                                                                    ////
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//// You should have received a copy of the GNU Lesser General          ////
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//// Public License along with this source; if not, download it         ////
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//// from http://www.opencores.org/lgpl.shtml                           ////
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////                                                                    ////
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////////////////////////////////////////////////////////////////////////////
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`include "timescale.v"
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`include "stubs.v"
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module t6507lp_io(vdd, gnd, clk, reset_n, data_in, rw_mem, data_out, address, clkIO, reset_nIO, data_inIO, rw_memIO, data_outIO, addressIO);
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        parameter [3:0] DATA_SIZE = 4'd8;
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        parameter [3:0] ADDR_SIZE = 4'd13;
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        localparam [3:0] DATA_SIZE_ = DATA_SIZE - 4'b0001;
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        localparam [3:0] ADDR_SIZE_ = ADDR_SIZE - 4'b0001;
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        input vdd;
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        input gnd;
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        input clk;
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        output clkIO;
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        input reset_n;
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        output reset_nIO;
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        input [DATA_SIZE_:0] data_in;
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        output [DATA_SIZE_:0] data_inIO;
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        input rw_mem;
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        output rw_memIO;
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        input [DATA_SIZE_:0] data_out;
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        output [DATA_SIZE_:0] data_outIO;
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        input [ADDR_SIZE_:0] address;
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        output [ADDR_SIZE_:0] addressIO;
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        // the ICP cell format is PAD PI Y PO
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        ICP clk_pad(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (clk),
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                .Y      (clkIO)
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        );
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        ICP reset_n_pad(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (reset_n),
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                .Y      (reset_nIO)
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        );
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        ICP data_in_pad0(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (data_in[0]),
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                .Y      (data_inIO[0])
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        );
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        ICP data_in_pad1(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (data_in[1]),
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                .Y      (data_inIO[1])
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        );
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        ICP data_in_pad2(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (data_in[2]),
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                .Y      (data_inIO[2])
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        );
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        ICP data_in_pad3(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (data_in[3]),
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                .Y      (data_inIO[3])
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        );
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        ICP data_in_pad4(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (data_in[4]),
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                .Y      (data_inIO[4])
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        );
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        ICP data_in_pad5(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (data_in[5]),
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                .Y      (data_inIO[5])
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        );
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        ICP data_in_pad6(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (data_in[6]),
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                .Y      (data_inIO[6])
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        );
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        ICP data_in_pad7(
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                .PI     (gnd),
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                .PO     (gnd),
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                .PAD    (data_in[7]),
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                .Y      (data_inIO[7])
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        );
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        BBT16P rw_mem_pad(
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                .EN     (gnd),
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                .PAD    (rw_memIO),
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                .A      (rw_mem)
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        );
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        BBT16P data_out_pad0(
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                .EN     (gnd),
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                .PAD    (data_outIO[0]),
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                .A      (data_out[0])
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        );
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        BBT16P data_out_pad1(
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                .EN     (gnd),
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                .PAD    (data_outIO[1]),
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                .A      (data_out[1])
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        );
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        BBT16P data_out_pad2(
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                .EN     (gnd),
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                .PAD    (data_outIO[2]),
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                .A      (data_out[2])
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        );
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        BBT16P data_out_pad3(
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                .EN     (gnd),
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                .PAD    (data_outIO[3]),
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                .A      (data_out[3])
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        );
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        BBT16P data_out_pad4(
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                .EN     (gnd),
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                .PAD    (data_outIO[4]),
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                .A      (data_out[4])
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        );
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        BBT16P data_out_pad5(
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                .EN     (gnd),
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                .PAD    (data_outIO[5]),
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                .A      (data_out[5])
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        );
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        BBT16P data_out_pad6(
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                .EN     (gnd),
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                .PAD    (data_outIO[6]),
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                .A      (data_out[6])
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        );
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        BBT16P data_out_pad7(
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                .EN     (gnd),
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                .PAD    (data_outIO[7]),
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                .A      (data_out[7])
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        );
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        BBT16P adress_pad0(
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                .EN     (gnd),
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                .PAD    (addressIO[0]),
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                .A      (address[0])
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        );
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        BBT16P adress_pad1(
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                .EN     (gnd),
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                .PAD    (addressIO[1]),
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                .A      (address[1])
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        );
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        BBT16P adress_pad2(
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                .EN     (gnd),
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                .PAD    (addressIO[2]),
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                .A      (address[2])
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        );
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        BBT16P adress_pad3(
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                .EN     (gnd),
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                .PAD    (addressIO[3]),
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                .A      (address[3])
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        );
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        BBT16P adress_pad4(
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                .EN     (gnd),
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                .PAD    (addressIO[4]),
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                .A      (address[4])
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        );
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        BBT16P adress_pad5(
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                .EN     (gnd),
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                .PAD    (addressIO[5]),
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                .A      (address[5])
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        );
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        BBT16P adress_pad6(
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                .EN     (gnd),
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                .PAD    (addressIO[6]),
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                .A      (address[6])
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        );
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        BBT16P adress_pad7(
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                .EN     (gnd),
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                .PAD    (addressIO[7]),
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                .A      (address[7])
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        );
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        BBT16P adress_pad8(
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                .EN     (gnd),
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                .PAD    (addressIO[8]),
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                .A      (address[8])
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        );
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        BBT16P adress_pad9(
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                .EN     (gnd),
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                .PAD    (addressIO[9]),
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                .A      (address[9])
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        );
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        BBT16P adress_pad10(
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                .EN     (gnd),
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                .PAD    (addressIO[10]),
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                .A      (address[10])
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        );
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        BBT16P adress_pad11(
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                .EN     (gnd),
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                .PAD    (addressIO[11]),
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                .A      (address[11])
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        );
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        BBT16P adress_pad12(
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                .EN     (gnd),
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                .PAD    (addressIO[12]),
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                .A      (address[12])
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        );
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endmodule
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