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263 |
creep |
============================================================
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Generated by: Encounter(R) RTL Compiler v07.20-s009_1
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Generated on: Aug 31 2009 10:49:06 AM
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Module: t6507lp_io
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Technology libraries: D_CELLSL_3_3V V 4.0.2
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IO_CELLS_33 V 4.0.1
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physical_cells
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Operating conditions: TYPICAL
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Interconnect mode: ple2
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Area mode: physical library
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============================================================
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Pin Type Fanout Load Slew Delay Arrival
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(fF) (ps) (ps) (ps)
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----------------------------------------------------------------
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(clock 1MHz) launch 0 R
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t6507lp
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t6507lp_fsm
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ir_reg[0]/C 1 0 R
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ir_reg[0]/Q SDFRRAQLX1 10 223.3 3230 +3769 3769 R
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g29294/A +0 3769
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g29294/Q INLX1 8 194.7 3142 +2306 6075 F
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g29214/A +0 6075
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g29214/Q NA2LX1 7 176.3 4067 +2625 8700 R
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g29213/A +0 8700
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g29213/Q INLX1 5 116.0 2378 +1847 10547 F
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g29121/A +0 10547
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g29121/Q OA211LX1 1 26.2 683 +1313 11860 F
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g29050/A +0 11860
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g29050/Q ON22LX1 1 22.2 1386 +466 12326 R
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g28932/B +0 12326
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g28932/Q NO4LX1 11 258.6 4259 +2632 14958 F
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g28899/A +0 14958
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g28899/Q ON21LX1 8 179.5 4128 +2689 17647 R
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g28839/D +0 17647
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g28839/Q AO222LX1 14 351.6 7527 +4885 22532 R
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t6507lp_fsm/alu_a[1]
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t6507lp_alu/alu_a[1]
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g22238/B +0 22532
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g22238/S HAALX1 2 54.9 1459 +3388 25920 R
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g22237/A +0 25920
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g22237/Q INLX1 3 80.1 1380 +1020 26940 F
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g22163/B +0 26940
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g22163/Q EO2LX1 1 25.6 810 +1181 28121 F
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g22043/A +0 28121
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g22043/CO HAALX1 1 24.3 600 +1156 29276 F
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g21977/B +0 29276
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g21977/S HAALX1 3 71.7 1697 +2126 31402 R
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g21958/B +0 31402
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g21958/Q NO2LX1 4 98.9 1901 +1277 32679 F
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g21905/AN +0 32679
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g21905/Q NA2I1LX1 1 19.0 641 +1104 33783 F
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g21879/AN +0 33784
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g21879/Q NO2I1LX1 2 43.8 1074 +1212 34995 F
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g21870/B +0 34995
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g21870/Q NO2I1LX1 1 25.6 889 +484 35479 R
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g21843/A +0 35479
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g21843/CO HAALX1 1 25.6 833 +1070 36549 R
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g21819/A +0 36550
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g21819/S HAALX1 2 38.8 1046 +1759 38308 R
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g21807/A +0 38308
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g21807/Q OR2LX1 4 99.7 2236 +1445 39754 R
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g21802/A +0 39754
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g21802/Q AO21LX1 3 62.1 1512 +1304 41058 R
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g21797/A +0 41058
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g21797/Q NA2LX1 4 83.9 1723 +853 41911 F
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g21793/AN +0 41911
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g21793/Q NA2I1LX1 1 17.7 590 +1049 42960 F
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g21791/A +0 42961
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g21791/Q AND2LX1 1 19.9 534 +803 43764 F
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g21788/A +0 43764
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g21788/Q NA2LX1 1 18.5 699 +391 44155 R
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g21785/A +0 44155
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g21785/Q AND8LX1 1 26.1 849 +697 44852 R
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g21783/A +0 44853
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g21783/Q ON21LX1 4 79.3 1405 +719 45571 F
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g11942/A +0 45572
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g11942/Q NA2LX1 1 19.9 963 +586 46158 R
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g11910/A +0 46158
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g11910/Q NA2LX1 1 19.5 507 +264 46422 F
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A_reg[5]/D SDFRRAQLX1 +0 46422
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A_reg[5]/C setup 1 +1437 47859 R
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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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(clock 1MHz) capture 1000000 R
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----------------------------------------------------------------
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Timing slack : 952141ps
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Start-point : t6507lp/t6507lp_fsm/ir_reg[0]/C
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End-point : t6507lp/t6507lp_alu/A_reg[5]/D
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