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--**********************************************************************
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-- Copyright 2012 by XESS Corp <http://www.xess.com>.
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-- This program is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program. If not, see <http://www.gnu.org/licenses/>.
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--**********************************************************************
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--*********************************************************************
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-- SD MEMORY CARD INTERFACE
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--
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-- Reads/writes a single or multiple blocks of data to/from an SD Flash card.
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--
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-- Based on work by by Steven J. Merrifield, June 2008:
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-- http : //stevenmerrifield.com/tools/sd.vhd
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--
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-- Most of what I learned about interfacing to SD/SDHC cards came from here:
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-- http://elm-chan.org/docs/mmc/mmc_e.html
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--
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-- OPERATION
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--
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-- Set-up:
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-- First of all, you have to give the controller a clock signal on the clk_i
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-- input with a higher frequency than the serial clock sent to the SD card
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-- through the sclk_o output. You can set generic parameters for the
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-- controller to tell it the master clock frequency (100 MHz), the SCLK
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-- frequency for initialization (400 KHz), the SCLK frequency for normal
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-- operation (25 MHz), the size of data sectors in the Flash memory (512 bytes),
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-- and the type of card (either SD or SDHC). I typically use a 100 MHz
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-- clock if I'm running an SD card with a 25 Mbps serial data stream.
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--
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-- Initialize it:
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-- Pulsing the reset_i input high and then bringing it low again will make
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-- the controller initialize the SD card so it will work in SPI mode.
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-- Basically, it sends the card the commands CMD0, CMD8 and then ACMD41 (which
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-- is CMD55 followed by CMD41). The busy_o output will be high during the
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-- initialization and will go low once it is done.
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--
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-- After the initialization command sequence, the SD card will send back an R1
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-- response byte. If only the IDLE bit of the R1 response is set, then the
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-- controller will repeatedly re-try the ACMD41 command while busy_o remains
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-- high.
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--
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-- If any other bit of the R1 response is set, then an error occurred. The
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-- controller will stall, lower busy_o, and output the R1 response code on the
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-- error_o bus. You'll have to pulse reset_i to unfreeze the controller.
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--
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-- If the R1 response is all zeroes (i.e., no errors occurred during the
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-- initialization), then the controller will lower busy_o and wait for a
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-- read or write operation from the host. The controller will only accept new
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-- operations when busy_o is low.
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--
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-- Write data:
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-- To write a data block to the SD card, the address of a block is placed
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-- on the addr_i input bus and the wr_i input is raised. The address and
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-- write strobe can be removed once busy_o goes high to indicate the write
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-- operation is underway. The data to be written to the SD card is passed as
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-- follows:
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--
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-- 1. The controller requests a byte of data by raising the hndShk_o output.
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-- 2. The host applies the next byte to the data_i input bus and raises the
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-- hndShk_i input.
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-- 3. The controller accepts the byte and lowers the hndShk_o output.
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-- 4. The host lowers the hndShk_i input.
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--
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-- This sequence of steps is repeated until all BLOCK_SIZE_G bytes of the
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-- data block are passed from the host to the controller. Once all the data
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-- is passed, the sector on the SD card will be written and the busy_o output
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-- will be lowered.
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--
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-- Read data:
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-- To read a block of data from the SD card, the address of a block is
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-- placed on the addr_i input bus and the rd_i input is raised. The address
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-- and read strobe can be removed once busy_o goes high to indicate the read
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-- operation is underway. The data read from the SD card is passed to the
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-- host as follows:
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--
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-- 1. The controller raises the hndShk_o output when the next data byte is available.
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-- 2. The host reads the byte from the data_o output bus and raises the hndShk_i input.
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-- 3. The controller lowers the hndShk_o output.
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-- 4. The host lowers the hndShk_i input.
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--
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-- This sequence of steps is repeated until all BLOCK_SIZE_G bytes of the
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-- data block are passed from the controller to the host. Once all the data
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-- is read, the busy_o output will be lowered.
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--
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-- Handle errors:
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-- If an error is detected during either a read or write operation, then the
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-- controller will stall, lower busy_o, and output an error code on the
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-- error_o bus. You'll have to pulse reset_i to unfreeze the controller. That
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-- may seem a bit excessive, but it does guarantee that you can't ignore any
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-- errors that occur.
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--
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-- TODO:
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--
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-- * Implement multi-block read and write commands.
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-- * Allow host to send/receive SPI commands/data directly to
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-- the SD card through the controller.
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-- *********************************************************************
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.CommonPckg.all;
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package SdCardPckg is
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type CardType_t is (SD_CARD_E, SDHC_CARD_E); -- Define the different types of SD cards.
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component SdCardCtrl is
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generic (
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FREQ_G : real := 100.0; -- Master clock frequency (MHz).
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INIT_SPI_FREQ_G : real := 0.4; -- Slow SPI clock freq. during initialization (MHz).
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SPI_FREQ_G : real := 25.0; -- Operational SPI freq. to the SD card (MHz).
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BLOCK_SIZE_G : natural := 512; -- Number of bytes in an SD card block or sector.
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CARD_TYPE_G : CardType_t := SD_CARD_E -- Type of SD card connected to this controller.
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);
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port (
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-- Host-side interface signals.
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clk_i : in std_logic; -- Master clock.
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reset_i : in std_logic := '0'; -- active-high, synchronous reset.
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rd_i : in std_logic := '0'; -- active-high read block request.
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wr_i : in std_logic := '0'; -- active-high write block request.
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continue_i : in std_logic := '0'; -- If true, inc address and continue R/W.
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addr_i : in std_logic_vector(31 downto 0) := x"00000000"; -- Block address.
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data_i : in std_logic_vector(7 downto 0) := x"00"; -- Data to write to block.
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data_o : out std_logic_vector(7 downto 0) := x"00"; -- Data read from block.
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busy_o : out std_logic; -- High when controller is busy performing some operation.
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hndShk_i : in std_logic; -- High when host has data to give or has taken data.
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hndShk_o : out std_logic; -- High when controller has taken data or has data to give.
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error_o : out std_logic_vector(15 downto 0) := (others => '0');
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-- I/O signals to the external SD card.
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cs_bo : out std_logic := '1'; -- Active-low chip-select.
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sclk_o : out std_logic := '0'; -- Serial clock to SD card.
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mosi_o : out std_logic := '1'; -- Serial data output to SD card.
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miso_i : in std_logic := '0' -- Serial data input from SD card.
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);
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end component;
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end package;
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library ieee;
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use ieee.math_real.all;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.CommonPckg.all;
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use work.SdCardPckg.all;
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entity SdCardCtrl is
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generic (
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FREQ_G : real := 100.0; -- Master clock frequency (MHz).
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INIT_SPI_FREQ_G : real := 0.4; -- Slow SPI clock freq. during initialization (MHz).
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SPI_FREQ_G : real := 25.0; -- Operational SPI freq. to the SD card (MHz).
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BLOCK_SIZE_G : natural := 512; -- Number of bytes in an SD card block or sector.
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CARD_TYPE_G : CardType_t := SD_CARD_E -- Type of SD card connected to this controller.
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);
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port (
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-- Host-side interface signals.
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clk_i : in std_logic; -- Master clock.
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reset_i : in std_logic := '0'; -- active-high, synchronous reset.
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rd_i : in std_logic := '0'; -- active-high read block request.
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wr_i : in std_logic := '0'; -- active-high write block request.
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continue_i : in std_logic := '0'; -- If true, inc address and continue R/W.
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addr_i : in std_logic_vector(31 downto 0) := x"00000000"; -- Block address.
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data_i : in std_logic_vector(7 downto 0) := x"00"; -- Data to write to block.
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data_o : out std_logic_vector(7 downto 0) := x"00"; -- Data read from block.
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busy_o : out std_logic; -- High when controller is busy performing some operation.
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hndShk_i : in std_logic; -- High when host has data to give or has taken data.
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hndShk_o : out std_logic; -- High when controller has taken data or has data to give.
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error_o : out std_logic_vector(15 downto 0) := (others => '0');
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-- I/O signals to the external SD card.
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cs_bo : out std_logic := '1'; -- Active-low chip-select.
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sclk_o : out std_logic := '0'; -- Serial clock to SD card.
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mosi_o : out std_logic := '1'; -- Serial data output to SD card.
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miso_i : in std_logic := '0'; -- Serial data input from SD card.
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state_debug_o : out std_logic_vector(4 downto 0)
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);
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end entity;
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architecture arch of SdCardCtrl is
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signal sclk_r : std_logic := '0'; -- Register output drives SD card clock.
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signal hndShk_r : std_logic := '0'; -- Register output drives handshake output to host.
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signal state_debug : unsigned(4 downto 0);
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begin
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state_debug_o <= std_logic_vector(state_debug);
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process(clk_i) -- FSM process for the SD card controller.
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type FsmState_t is ( -- States of the SD card controller FSM.
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START_INIT, -- Send initialization clock pulses to the deselected SD card.
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SEND_CMD0, -- Put the SD card in the IDLE state.
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CHK_CMD0_RESPONSE, -- Check card's R1 response to the CMD0.
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SEND_CMD8, -- This command is needed to initialize SDHC cards.
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GET_CMD8_RESPONSE, -- Get the R7 response to CMD8.
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SEND_CMD55, -- Send CMD55 to the SD card.
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SEND_CMD41, -- Send CMD41 to the SD card.
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CHK_ACMD41_RESPONSE, -- Check if the SD card has left the IDLE state.
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WAIT_FOR_HOST_RW, -- Wait for the host to issue a read or write command.
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RD_BLK, -- Read a block of data from the SD card.
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WR_BLK, -- Write a block of data to the SD card.
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WR_WAIT, -- Wait for SD card to finish writing the data block.
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START_TX, -- Start sending command/data.
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TX_BITS, -- Shift out remaining command/data bits.
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GET_CMD_RESPONSE, -- Get the R1 response of the SD card to a command.
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RX_BITS, -- Receive response/data from the SD card.
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DESELECT, -- De-select the SD card and send some clock pulses (Must enter with sclk at zero.)
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PULSE_SCLK, -- Issue some clock pulses. (Must enter with sclk at zero.)
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REPORT_ERROR -- Report error and stall until reset.
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);
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variable state_v : FsmState_t := START_INIT; -- Current state of the FSM.
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variable rtnState_v : FsmState_t; -- State FSM returns to when FSM subroutine completes.
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-- Timing constants based on the master clock frequency and the SPI SCLK frequencies.
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constant CLKS_PER_INIT_SCLK_C : real := FREQ_G / INIT_SPI_FREQ_G;
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constant CLKS_PER_SCLK_C : real := FREQ_G / SPI_FREQ_G;
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constant MAX_CLKS_PER_SCLK_C : real := realmax(CLKS_PER_INIT_SCLK_C, CLKS_PER_SCLK_C);
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constant MAX_CLKS_PER_SCLK_PHASE_C : natural := integer(round(MAX_CLKS_PER_SCLK_C / 2.0));
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constant INIT_SCLK_PHASE_PERIOD_C : natural := integer(round(CLKS_PER_INIT_SCLK_C / 2.0));
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constant SCLK_PHASE_PERIOD_C : natural := integer(round(CLKS_PER_SCLK_C / 2.0));
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constant DELAY_BETWEEN_BLOCK_RW_C : natural := SCLK_PHASE_PERIOD_C;
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-- Registers for generating slow SPI SCLK from the faster master clock.
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variable clkDivider_v : natural range 0 to MAX_CLKS_PER_SCLK_PHASE_C; -- Holds the SCLK period.
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variable sclkPhaseTimer_v : natural range 0 to MAX_CLKS_PER_SCLK_PHASE_C; -- Counts down to zero, then SCLK toggles.
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constant NUM_INIT_CLKS_C : natural := 160; -- Number of initialization clocks to SD card.
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variable bitCnt_v : natural range 0 to NUM_INIT_CLKS_C; -- Tx/Rx bit counter.
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constant CRC_SZ_C : natural := 2; -- Number of CRC bytes for read/write blocks.
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-- When reading blocks of data, get 0xFE + [DATA_BLOCK] + [CRC].
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constant RD_BLK_SZ_C : natural := 1 + BLOCK_SIZE_G + CRC_SZ_C;
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-- When writing blocks of data, send 0xFF + 0xFE + [DATA BLOCK] + [CRC] then receive response byte.
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constant WR_BLK_SZ_C : natural := 1 + 1 + BLOCK_SIZE_G + CRC_SZ_C + 1;
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variable byteCnt_v : natural range 0 to IntMax(WR_BLK_SZ_C, RD_BLK_SZ_C); -- Tx/Rx byte counter.
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-- Command bytes for various SD card operations.
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subtype Cmd_t is std_logic_vector(7 downto 0);
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constant CMD0_C : Cmd_t := std_logic_vector(to_unsigned(16#40# + 0, Cmd_t'length));
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constant CMD8_C : Cmd_t := std_logic_vector(to_unsigned(16#40# + 8, Cmd_t'length));
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constant CMD55_C : Cmd_t := std_logic_vector(to_unsigned(16#40# + 55, Cmd_t'length));
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constant CMD41_C : Cmd_t := std_logic_vector(to_unsigned(16#40# + 41, Cmd_t'length));
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constant READ_BLK_CMD_C : Cmd_t := std_logic_vector(to_unsigned(16#40# + 17, Cmd_t'length));
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constant WRITE_BLK_CMD_C : Cmd_t := std_logic_vector(to_unsigned(16#40# + 24, Cmd_t'length));
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-- Except for CMD0 and CMD8, SD card ops don't need a CRC, so use a fake one for that slot in the command.
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constant FAKE_CRC_C : std_logic_vector(7 downto 0) := x"FF";
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variable addr_v : unsigned(addr_i'range); -- Address of current block for R/W operations.
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-- Maximum Tx to SD card consists of command + address + CRC. Data Tx is just a single byte.
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variable tx_v : std_logic_vector(CMD0_C'length + addr_v'length + FAKE_CRC_C'length - 1 downto 0); -- Data/command to SD card.
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alias txCmd_v is tx_v; -- Command transmission shift register.
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alias txData_v is tx_v(tx_v'high downto tx_v'high - data_i'length + 1); -- Data byte transmission shift register.
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variable rx_v : std_logic_vector(data_i'range); -- Data/response byte received from SD card.
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-- Various response codes.
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subtype Response_t is std_logic_vector(rx_v'range);
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constant ACTIVE_NO_ERRORS_C : Response_t := "00000000"; -- Normal R1 code after initialization.
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constant IDLE_NO_ERRORS_C : Response_t := "00000001"; -- Normal R1 code after CMD0.
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constant DATA_ACCEPTED_C : Response_t := "---00101"; -- SD card accepts data block from host.
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constant DATA_REJ_CRC_C : Response_t := "---01011"; -- SD card rejects data block from host due to CRC error.
|
280 |
|
|
constant DATA_REJ_WERR_C : Response_t := "---01101"; -- SD card rejects data block from host due to write error.
|
281 |
|
|
-- Various tokens.
|
282 |
|
|
subtype Token_t is std_logic_vector(rx_v'range);
|
283 |
|
|
constant NO_TOKEN_C : Token_t := x"FF"; -- Received before the SD card responds to a block read command.
|
284 |
|
|
constant START_TOKEN_C : Token_t := x"FE"; -- Starting byte preceding a data block.
|
285 |
|
|
|
286 |
|
|
-- Flags that are set/cleared to affect the operation of the FSM.
|
287 |
|
|
variable getCmdResponse_v : boolean; -- When true, get R1 response to command sent to SD card.
|
288 |
|
|
variable rtnData_v : boolean; -- When true, signal to host when a data byte arrives from SD card.
|
289 |
|
|
variable doDeselect_v : boolean; -- When true, de-select SD card after a command is issued.
|
290 |
|
|
|
291 |
|
|
begin
|
292 |
|
|
|
293 |
|
|
if rising_edge(clk_i) then
|
294 |
|
|
|
295 |
|
|
case( state_v ) is
|
296 |
|
|
|
297 |
|
|
when START_INIT =>
|
298 |
|
|
state_debug <= to_unsigned(0, 5);
|
299 |
|
|
when SEND_CMD0 =>
|
300 |
|
|
state_debug <= to_unsigned(1, 5);
|
301 |
|
|
when CHK_CMD0_RESPONSE =>
|
302 |
|
|
state_debug <= to_unsigned(2, 5);
|
303 |
|
|
when SEND_CMD8 =>
|
304 |
|
|
state_debug <= to_unsigned(3, 5);
|
305 |
|
|
when GET_CMD8_RESPONSE =>
|
306 |
|
|
state_debug <= to_unsigned(4, 5);
|
307 |
|
|
when SEND_CMD55 =>
|
308 |
|
|
state_debug <= to_unsigned(5, 5);
|
309 |
|
|
when SEND_CMD41 =>
|
310 |
|
|
state_debug <= to_unsigned(6, 5);
|
311 |
|
|
when CHK_ACMD41_RESPONSE =>
|
312 |
|
|
state_debug <= to_unsigned(7, 5);
|
313 |
|
|
when WAIT_FOR_HOST_RW =>
|
314 |
|
|
state_debug <= to_unsigned(8, 5);
|
315 |
|
|
when RD_BLK =>
|
316 |
|
|
state_debug <= to_unsigned(9, 5);
|
317 |
|
|
when WR_BLK =>
|
318 |
|
|
state_debug <= to_unsigned(10, 5);
|
319 |
|
|
when WR_WAIT =>
|
320 |
|
|
state_debug <= to_unsigned(11, 5);
|
321 |
|
|
when START_TX =>
|
322 |
|
|
state_debug <= to_unsigned(12, 5);
|
323 |
|
|
when TX_BITS =>
|
324 |
|
|
state_debug <= to_unsigned(13, 5);
|
325 |
|
|
when GET_CMD_RESPONSE =>
|
326 |
|
|
state_debug <= to_unsigned(14, 5);
|
327 |
|
|
when RX_BITS =>
|
328 |
|
|
state_debug <= to_unsigned(15, 5);
|
329 |
|
|
when DESELECT =>
|
330 |
|
|
state_debug <= to_unsigned(16, 5);
|
331 |
|
|
when PULSE_SCLK =>
|
332 |
|
|
state_debug <= to_unsigned(17, 5);
|
333 |
|
|
when REPORT_ERROR =>
|
334 |
|
|
state_debug <= to_unsigned(18, 5);
|
335 |
|
|
|
336 |
|
|
end case ;
|
337 |
|
|
|
338 |
|
|
if reset_i = YES then -- Perform a reset.
|
339 |
|
|
state_v := START_INIT; -- Send the FSM to the initialization entry-point.
|
340 |
|
|
sclkPhaseTimer_v := 0; -- Don't delay the initialization right after reset.
|
341 |
|
|
busy_o <= YES; -- Busy while the SD card interface is being initialized.
|
342 |
|
|
|
343 |
|
|
elsif sclkPhaseTimer_v /= 0 then
|
344 |
|
|
-- Setting the clock phase timer to a non-zero value delays any further actions
|
345 |
|
|
-- and generates the slower SPI clock from the faster master clock.
|
346 |
|
|
sclkPhaseTimer_v := sclkPhaseTimer_v - 1;
|
347 |
|
|
|
348 |
|
|
-- Clock phase timer has reached zero, so check handshaking sync. between host and controller.
|
349 |
|
|
|
350 |
|
|
-- Handshaking lets the host control the flow of data to/from the SD card controller.
|
351 |
|
|
-- Handshaking between the SD card controller and the host proceeds as follows:
|
352 |
|
|
-- 1: Controller raises its handshake and waits.
|
353 |
|
|
-- 2: Host sees controller handshake and raises its handshake in acknowledgement.
|
354 |
|
|
-- 3: Controller sees host handshake acknowledgement and lowers its handshake.
|
355 |
|
|
-- 4: Host sees controller lower its handshake and removes its handshake.
|
356 |
|
|
--
|
357 |
|
|
-- Handshaking is bypassed when the controller FSM is initializing the SD card.
|
358 |
|
|
|
359 |
|
|
elsif state_v /= START_INIT and hndShk_r = '1' and hndShk_i = '0' then
|
360 |
|
|
null; -- Waiting for the host to acknowledge handshake.
|
361 |
|
|
elsif state_v /= START_INIT and hndShk_r = '1' and hndShk_i = '1' then
|
362 |
|
|
txData_v := data_i; -- Get any data passed from the host.
|
363 |
|
|
hndShk_r <= '0'; -- The host acknowledged, so lower the controller handshake.
|
364 |
|
|
elsif state_v /= START_INIT and hndShk_r = '0' and hndShk_i = '1' then
|
365 |
|
|
null; -- Waiting for the host to lower its handshake.
|
366 |
|
|
elsif (state_v = START_INIT) or (hndShk_r = '0' and hndShk_i = '0') then
|
367 |
|
|
-- Both handshakes are low, so the controller operations can proceed.
|
368 |
|
|
|
369 |
|
|
busy_o <= YES; -- Busy by default. Only false when waiting for R/W from host or stalled by error.
|
370 |
|
|
|
371 |
|
|
case state_v is
|
372 |
|
|
|
373 |
|
|
when START_INIT => -- Deselect the SD card and send it a bunch of clock pulses with MOSI high.
|
374 |
|
|
error_o <= (others => '0'); -- Clear error flags.
|
375 |
|
|
clkDivider_v := INIT_SCLK_PHASE_PERIOD_C - 1; -- Use slow SPI clock freq during init.
|
376 |
|
|
sclkPhaseTimer_v := INIT_SCLK_PHASE_PERIOD_C - 1; -- and set the duration of the next clock phase.
|
377 |
|
|
sclk_r <= '0'; -- Start with low clock to the SD card.
|
378 |
|
|
hndShk_r <= '0'; -- Initialize handshake signal.
|
379 |
|
|
addr_v := (others => '0'); -- Initialize address.
|
380 |
|
|
rtnData_v := false; -- No data is returned to host during initialization.
|
381 |
|
|
bitCnt_v := NUM_INIT_CLKS_C; -- Generate this many clock pulses.
|
382 |
|
|
state_v := DESELECT; -- De-select the SD card and pulse SCLK.
|
383 |
|
|
rtnState_v := SEND_CMD0; -- Then go to this state after the clock pulses are done.
|
384 |
|
|
|
385 |
|
|
when SEND_CMD0 => -- Put the SD card in the IDLE state.
|
386 |
|
|
cs_bo <= '0'; -- Enable the SD card.
|
387 |
|
|
txCmd_v := CMD0_C & x"00000000" & x"95"; -- 0x95 is the correct CRC for this command.
|
388 |
|
|
bitCnt_v := txCmd_v'length; -- Set bit counter to the size of the command.
|
389 |
|
|
getCmdResponse_v := true; -- Sending a command that generates a response.
|
390 |
|
|
doDeselect_v := true; -- De-select SD card after this command finishes.
|
391 |
|
|
state_v := START_TX; -- Go to FSM subroutine to send the command.
|
392 |
|
|
rtnState_v := CHK_CMD0_RESPONSE; -- Then check the response to the command.
|
393 |
|
|
|
394 |
|
|
when CHK_CMD0_RESPONSE => -- Check card's R1 response to the CMD0.
|
395 |
|
|
if rx_v = IDLE_NO_ERRORS_C then
|
396 |
|
|
state_v := SEND_CMD8; -- Continue init if SD card is in IDLE state with no errors
|
397 |
|
|
else
|
398 |
|
|
state_v := SEND_CMD0; -- Otherwise, try CMD0 again.
|
399 |
|
|
end if;
|
400 |
|
|
|
401 |
|
|
when SEND_CMD8 => -- This command is needed to initialize SDHC cards.
|
402 |
|
|
cs_bo <= '0'; -- Enable the SD card.
|
403 |
|
|
txCmd_v := CMD8_C & x"000001aa" & x"87"; -- 0x87 is the correct CRC for this command.
|
404 |
|
|
bitCnt_v := txCmd_v'length; -- Set bit counter to the size of the command.
|
405 |
|
|
getCmdResponse_v := true; -- Sending a command that generates a response.
|
406 |
|
|
doDeselect_v := false; -- Don't de-select, need to get the R7 response sent from the SD card.
|
407 |
|
|
state_v := START_TX; -- Go to FSM subroutine to send the command.
|
408 |
|
|
rtnState_v := GET_CMD8_RESPONSE; -- Then go to this state after the command is sent.
|
409 |
|
|
|
410 |
|
|
when GET_CMD8_RESPONSE => -- Get the R7 response to CMD8.
|
411 |
|
|
cs_bo <= '0'; -- The SD card should already be enabled, but let's be explicit.
|
412 |
|
|
bitCnt_v := 31; -- Four bytes (32 bits) in R7 response.
|
413 |
|
|
getCmdResponse_v := false; -- Not sending a command that generates a response.
|
414 |
|
|
doDeselect_v := true; -- De-select card to end the command after getting the four bytes.
|
415 |
|
|
state_v := RX_BITS; -- Go to FSM subroutine to get the R7 response.
|
416 |
|
|
rtnState_v := SEND_CMD55; -- Then go here (we don't care what the actual R7 response is).
|
417 |
|
|
|
418 |
|
|
when SEND_CMD55 => -- Send CMD55 as preamble of ACMD41 initialization command.
|
419 |
|
|
cs_bo <= '0'; -- Enable the SD card.
|
420 |
|
|
txCmd_v := CMD55_C & x"00000000" & FAKE_CRC_C;
|
421 |
|
|
bitCnt_v := txCmd_v'length; -- Set bit counter to the size of the command.
|
422 |
|
|
getCmdResponse_v := true; -- Sending a command that generates a response.
|
423 |
|
|
doDeselect_v := true; -- De-select SD card after this command finishes.
|
424 |
|
|
state_v := START_TX; -- Go to FSM subroutine to send the command.
|
425 |
|
|
rtnState_v := SEND_CMD41; -- Then go to this state after the command is sent.
|
426 |
|
|
|
427 |
|
|
when SEND_CMD41 => -- Send the SD card the initialization command.
|
428 |
|
|
cs_bo <= '0'; -- Enable the SD card.
|
429 |
|
|
txCmd_v := CMD41_C & x"40000000" & FAKE_CRC_C;
|
430 |
|
|
bitCnt_v := txCmd_v'length; -- Set bit counter to the size of the command.
|
431 |
|
|
getCmdResponse_v := true; -- Sending a command that generates a response.
|
432 |
|
|
doDeselect_v := true; -- De-select SD card after this command finishes.
|
433 |
|
|
state_v := START_TX; -- Go to FSM subroutine to send the command.
|
434 |
|
|
rtnState_v := CHK_ACMD41_RESPONSE; -- Then check the response to the command.
|
435 |
|
|
|
436 |
|
|
when CHK_ACMD41_RESPONSE =>
|
437 |
|
|
-- The CMD55, CMD41 sequence should cause the SD card to leave the IDLE state
|
438 |
|
|
-- and become ready for SPI read/write operations. If still IDLE, then repeat the CMD55, CMD41 sequence.
|
439 |
|
|
-- If one of the R1 error flags is set, then report the error and stall.
|
440 |
|
|
if rx_v = ACTIVE_NO_ERRORS_C then -- Not IDLE, no errors.
|
441 |
|
|
state_v := WAIT_FOR_HOST_RW; -- Start processing R/W commands from the host.
|
442 |
|
|
elsif rx_v = IDLE_NO_ERRORS_C then -- Still IDLE but no errors.
|
443 |
|
|
state_v := SEND_CMD55; -- Repeat the CMD55, CMD41 sequence.
|
444 |
|
|
else -- Some error occurred.
|
445 |
|
|
state_v := REPORT_ERROR; -- Report the error and stall.
|
446 |
|
|
end if;
|
447 |
|
|
|
448 |
|
|
when WAIT_FOR_HOST_RW => -- Wait for the host to read or write a block of data from the SD card.
|
449 |
|
|
clkDivider_v := SCLK_PHASE_PERIOD_C - 1; -- Set SPI clock frequency for normal operation.
|
450 |
|
|
getCmdResponse_v := true; -- Get R1 response to any commands issued to the SD card.
|
451 |
|
|
if rd_i = YES then -- send READ command and address to the SD card.
|
452 |
|
|
cs_bo <= '0'; -- Enable the SD card.
|
453 |
|
|
if continue_i = YES then -- Multi-block read. Use stored address.
|
454 |
|
|
if CARD_TYPE_G = SD_CARD_E then -- SD cards use byte-addressing,
|
455 |
|
|
addr_v := addr_v + BLOCK_SIZE_G; -- so add block-size to get next block address.
|
456 |
|
|
else -- SDHC cards use block-addressing,
|
457 |
|
|
addr_v := addr_v + 1; -- so just increment current block address.
|
458 |
|
|
end if;
|
459 |
|
|
txCmd_v := READ_BLK_CMD_C & std_logic_vector(addr_v) & FAKE_CRC_C;
|
460 |
|
|
else -- Single-block read.
|
461 |
|
|
txCmd_v := READ_BLK_CMD_C & addr_i & FAKE_CRC_C; -- Use address supplied by host.
|
462 |
|
|
addr_v := unsigned(addr_i); -- Store address for multi-block operations.
|
463 |
|
|
end if;
|
464 |
|
|
bitCnt_v := txCmd_v'length; -- Set bit counter to the size of the command.
|
465 |
|
|
byteCnt_v := RD_BLK_SZ_C;
|
466 |
|
|
state_v := START_TX; -- Go to FSM subroutine to send the command.
|
467 |
|
|
rtnState_v := RD_BLK; -- Then go to this state to read the data block.
|
468 |
|
|
elsif wr_i = YES then -- send WRITE command and address to the SD card.
|
469 |
|
|
cs_bo <= '0'; -- Enable the SD card.
|
470 |
|
|
if continue_i = YES then -- Multi-block write. Use stored address.
|
471 |
|
|
if CARD_TYPE_G = SD_CARD_E then -- SD cards use byte-addressing,
|
472 |
|
|
addr_v := addr_v + BLOCK_SIZE_G; -- so add block-size to get next block address.
|
473 |
|
|
else -- SDHC cards use block-addressing,
|
474 |
|
|
addr_v := addr_v + 1; -- so just increment current block address.
|
475 |
|
|
end if;
|
476 |
|
|
txCmd_v := WRITE_BLK_CMD_C & std_logic_vector(addr_v) & FAKE_CRC_C;
|
477 |
|
|
else -- Single-block write.
|
478 |
|
|
txCmd_v := WRITE_BLK_CMD_C & addr_i & FAKE_CRC_C; -- Use address supplied by host.
|
479 |
|
|
addr_v := unsigned(addr_i); -- Store address for multi-block operations.
|
480 |
|
|
end if;
|
481 |
|
|
bitCnt_v := txCmd_v'length; -- Set bit counter to the size of the command.
|
482 |
|
|
byteCnt_v := WR_BLK_SZ_C; -- Set number of bytes to write.
|
483 |
|
|
state_v := START_TX; -- Go to this FSM subroutine to send the command ...
|
484 |
|
|
rtnState_v := WR_BLK; -- then go to this state to write the data block.
|
485 |
|
|
else -- Do nothing and wait for command from host.
|
486 |
|
|
cs_bo <= '1'; -- Deselect the SD card.
|
487 |
|
|
busy_o <= '0'; -- SD card interface is waiting for R/W from host, so it's not busy.
|
488 |
|
|
state_v := WAIT_FOR_HOST_RW; -- Keep waiting for command from host.
|
489 |
|
|
end if;
|
490 |
|
|
|
491 |
|
|
when RD_BLK => -- Read a block of data from the SD card.
|
492 |
|
|
-- Some default values for these...
|
493 |
|
|
rtnData_v := false; -- Data is only returned to host in one place.
|
494 |
|
|
bitCnt_v := rx_v'length - 1; -- Receiving byte-sized data.
|
495 |
|
|
state_v := RX_BITS; -- Call the bit receiver routine.
|
496 |
|
|
rtnState_v := RD_BLK; -- Return here when done receiving a byte.
|
497 |
|
|
if byteCnt_v = RD_BLK_SZ_C then -- Initial read to prime the pump.
|
498 |
|
|
byteCnt_v := byteCnt_v - 1;
|
499 |
|
|
elsif byteCnt_v = RD_BLK_SZ_C -1 then -- Then look for the data block start token.
|
500 |
|
|
if rx_v = NO_TOKEN_C then -- Receiving 0xFF means the card hasn't responded yet. Keep trying.
|
501 |
|
|
null;
|
502 |
|
|
elsif rx_v = START_TOKEN_C then
|
503 |
|
|
rtnData_v := true; -- Found the start token, so now start returning data byes to the host.
|
504 |
|
|
byteCnt_v := byteCnt_v - 1;
|
505 |
|
|
else -- Getting anything else means something strange has happened.
|
506 |
|
|
state_v := REPORT_ERROR;
|
507 |
|
|
end if;
|
508 |
|
|
elsif byteCnt_v >= 3 then -- Now bytes of data from the SD card are received.
|
509 |
|
|
rtnData_v := true; -- Return this data to the host.
|
510 |
|
|
byteCnt_v := byteCnt_v - 1;
|
511 |
|
|
elsif byteCnt_v = 2 then -- Receive the 1st CRC byte at the end of the data block.
|
512 |
|
|
byteCnt_v := byteCnt_v - 1;
|
513 |
|
|
elsif byteCnt_v = 1 then -- Receive the 2nd
|
514 |
|
|
byteCnt_v := byteCnt_v - 1;
|
515 |
|
|
else -- Reading is done, so deselect the SD card.
|
516 |
|
|
sclk_r <= '0';
|
517 |
|
|
bitCnt_v := 2;
|
518 |
|
|
state_v := DESELECT;
|
519 |
|
|
rtnState_v := WAIT_FOR_HOST_RW;
|
520 |
|
|
end if;
|
521 |
|
|
|
522 |
|
|
when WR_BLK => -- Write a block of data to the SD card.
|
523 |
|
|
-- Some default values for these...
|
524 |
|
|
getCmdResponse_v := false; -- Sending data bytes so there's no command response from SD card.
|
525 |
|
|
bitCnt_v := txData_v'length; -- Transmitting byte-sized data.
|
526 |
|
|
state_v := START_TX; -- Call the bit transmitter routine.
|
527 |
|
|
rtnState_v := WR_BLK; -- Return here when done transmitting a byte.
|
528 |
|
|
if byteCnt_v = WR_BLK_SZ_C then
|
529 |
|
|
txData_v := NO_TOKEN_C; -- Hold MOSI high for one byte before data block goes out.
|
530 |
|
|
elsif byteCnt_v = WR_BLK_SZ_C - 1 then -- Send start token.
|
531 |
|
|
txData_v := START_TOKEN_C; -- Starting token for data block.
|
532 |
|
|
elsif byteCnt_v >= 4 then -- Now send bytes in the data block.
|
533 |
|
|
hndShk_r <= '1'; -- Signal host to provide data.
|
534 |
|
|
-- The transmit shift register is loaded with data from host in the handshaking section above.
|
535 |
|
|
elsif byteCnt_v = 3 or byteCnt_v = 2 then -- Send two phony CRC bytes at end of packet.
|
536 |
|
|
txData_v := FAKE_CRC_C;
|
537 |
|
|
elsif byteCnt_v = 1 then
|
538 |
|
|
bitCnt_v := rx_v'length - 1;
|
539 |
|
|
state_v := RX_BITS; -- Get response of SD card to the write operation.
|
540 |
|
|
rtnState_v := WR_WAIT;
|
541 |
|
|
else -- Check received response byte.
|
542 |
|
|
if std_match(rx_v, DATA_ACCEPTED_C) then -- Data block was accepted.
|
543 |
|
|
state_v := WR_WAIT; -- Wait for the SD card to finish writing the data into Flash.
|
544 |
|
|
else -- Data block was rejected.
|
545 |
|
|
error_o(15 downto 8) <= rx_v;
|
546 |
|
|
state_v := REPORT_ERROR; -- Report the error.
|
547 |
|
|
end if;
|
548 |
|
|
end if;
|
549 |
|
|
byteCnt_v := byteCnt_v - 1;
|
550 |
|
|
|
551 |
|
|
when WR_WAIT => -- Wait for SD card to finish writing the data block.
|
552 |
|
|
-- The SD card will pull MISO low while it is busy, and raise it when it is done.
|
553 |
|
|
sclk_r <= not sclk_r; -- Toggle the SPI clock...
|
554 |
|
|
sclkPhaseTimer_v := clkDivider_v; -- and set the duration of the next clock phase.
|
555 |
|
|
if sclk_r = '1' and miso_i = '1' then -- Data block has been written, so deselect the SD card.
|
556 |
|
|
bitCnt_v := 2;
|
557 |
|
|
state_v := DESELECT;
|
558 |
|
|
rtnState_v := WAIT_FOR_HOST_RW;
|
559 |
|
|
end if;
|
560 |
|
|
|
561 |
|
|
when START_TX =>
|
562 |
|
|
-- Start sending command/data by lowering SCLK and outputing MSB of command/data
|
563 |
|
|
-- so it has plenty of setup before the rising edge of SCLK.
|
564 |
|
|
sclk_r <= '0'; -- Lower the SCLK (although it should already be low).
|
565 |
|
|
sclkPhaseTimer_v := clkDivider_v; -- Set the duration of the low SCLK.
|
566 |
|
|
mosi_o <= tx_v(tx_v'high); -- Output MSB of command/data.
|
567 |
|
|
tx_v := tx_v(tx_v'high-1 downto 0) & ONE; -- Shift command/data register by one bit.
|
568 |
|
|
bitCnt_v := bitCnt_v - 1; -- The first bit has been sent, so decrement bit counter.
|
569 |
|
|
state_v := TX_BITS; -- Go here to shift out the rest of the command/data bits.
|
570 |
|
|
|
571 |
|
|
when TX_BITS => -- Shift out remaining command/data bits and (possibly) get response from SD card.
|
572 |
|
|
sclk_r <= not sclk_r; -- Toggle the SPI clock...
|
573 |
|
|
sclkPhaseTimer_v := clkDivider_v; -- and set the duration of the next clock phase.
|
574 |
|
|
if sclk_r = '1' then
|
575 |
|
|
-- SCLK is going to be flipped from high to low, so output the next command/data bit
|
576 |
|
|
-- so it can setup while SCLK is low.
|
577 |
|
|
if bitCnt_v /= 0 then -- Keep sending bits until the bit counter hits zero.
|
578 |
|
|
mosi_o <= tx_v(tx_v'high);
|
579 |
|
|
tx_v := tx_v(tx_v'high-1 downto 0) & ONE;
|
580 |
|
|
bitCnt_v := bitCnt_v - 1;
|
581 |
|
|
else
|
582 |
|
|
if getCmdResponse_v then
|
583 |
|
|
state_v := GET_CMD_RESPONSE; -- Get a response to the command from the SD card.
|
584 |
|
|
bitCnt_v := Response_t'length - 1; -- Length of the expected response.
|
585 |
|
|
else
|
586 |
|
|
state_v := rtnState_v; -- Return to calling state (no need to get a response).
|
587 |
|
|
sclkPhaseTimer_v := 0; -- Clear timer so next SPI op can begin ASAP with SCLK low.
|
588 |
|
|
end if;
|
589 |
|
|
end if;
|
590 |
|
|
end if;
|
591 |
|
|
|
592 |
|
|
when GET_CMD_RESPONSE => -- Get the response of the SD card to a command.
|
593 |
|
|
if sclk_r = '1' and miso_i = '0' then -- MISO will be held high by SD card until 1st bit of R1 response, which is 0.
|
594 |
|
|
-- Shift in the MSB bit of the response.
|
595 |
|
|
rx_v := rx_v(rx_v'high-1 downto 0) & miso_i;
|
596 |
|
|
bitCnt_v := bitCnt_v - 1;
|
597 |
|
|
state_v := RX_BITS; -- Now receive the reset of the response.
|
598 |
|
|
end if;
|
599 |
|
|
sclk_r <= not sclk_r; -- Toggle the SPI clock...
|
600 |
|
|
sclkPhaseTimer_v := clkDivider_v; -- and set the duration of the next clock phase.
|
601 |
|
|
|
602 |
|
|
when RX_BITS => -- Receive bits from the SD card.
|
603 |
|
|
if sclk_r = '1' then -- Bits enter after the rising edge of SCLK.
|
604 |
|
|
rx_v := rx_v(rx_v'high-1 downto 0) & miso_i;
|
605 |
|
|
if bitCnt_v /= 0 then -- More bits left to receive.
|
606 |
|
|
bitCnt_v := bitCnt_v - 1;
|
607 |
|
|
else -- Last bit has been received.
|
608 |
|
|
if rtnData_v then -- Send the received data to the host.
|
609 |
|
|
data_o <= rx_v; -- Output received data to the host.
|
610 |
|
|
hndShk_r <= '1'; -- Signal to the host that the data is ready.
|
611 |
|
|
end if;
|
612 |
|
|
if doDeselect_v then
|
613 |
|
|
bitCnt_v := 1;
|
614 |
|
|
state_v := DESELECT; -- De-select SD card before returning.
|
615 |
|
|
else
|
616 |
|
|
state_v := rtnState_v; -- Otherwise, return to calling state without de-selecting.
|
617 |
|
|
end if;
|
618 |
|
|
end if;
|
619 |
|
|
end if;
|
620 |
|
|
sclk_r <= not sclk_r; -- Toggle the SPI clock...
|
621 |
|
|
sclkPhaseTimer_v := clkDivider_v; -- and set the duration of the next clock phase.
|
622 |
|
|
|
623 |
|
|
when DESELECT => -- De-select the SD card and send some clock pulses (Must enter with sclk at zero.)
|
624 |
|
|
doDeselect_v := false; -- Once the de-select is done, clear the flag that caused it.
|
625 |
|
|
cs_bo <= '1'; -- De-select the SD card.
|
626 |
|
|
mosi_o <= '1'; -- Keep the data input of the SD card pulled high.
|
627 |
|
|
state_v := PULSE_SCLK; -- Pulse the clock so the SD card will see the de-select.
|
628 |
|
|
sclk_r <= '0'; -- Clock is set low so the next rising edge will see the new CS and MOSI
|
629 |
|
|
sclkPhaseTimer_v := clkDivider_v; -- Set the duration of the next clock phase.
|
630 |
|
|
|
631 |
|
|
when PULSE_SCLK => -- Issue some clock pulses. (Must enter with sclk at zero.)
|
632 |
|
|
if sclk_r = '1' then
|
633 |
|
|
if bitCnt_v /= 0 then
|
634 |
|
|
bitCnt_v := bitCnt_v - 1;
|
635 |
|
|
else -- Return to the calling routine when the pulse counter reaches zero.
|
636 |
|
|
state_v := rtnState_v;
|
637 |
|
|
end if;
|
638 |
|
|
end if;
|
639 |
|
|
sclk_r <= not sclk_r; -- Toggle the SPI clock...
|
640 |
|
|
sclkPhaseTimer_v := clkDivider_v; -- and set the duration of the next clock phase.
|
641 |
|
|
|
642 |
|
|
when REPORT_ERROR => -- Report the error code and stall here until a reset occurs.
|
643 |
|
|
error_o(rx_v'range) <= rx_v; -- Output the SD card response as the error code.
|
644 |
|
|
busy_o <= '0'; -- Not busy.
|
645 |
|
|
|
646 |
|
|
when others =>
|
647 |
|
|
state_v := START_INIT;
|
648 |
|
|
end case;
|
649 |
|
|
end if;
|
650 |
|
|
end if;
|
651 |
|
|
end process;
|
652 |
|
|
|
653 |
|
|
sclk_o <= sclk_r; -- Output the generated SPI clock for the SD card.
|
654 |
|
|
hndShk_o <= hndShk_r; -- Output the generated handshake to the host.
|
655 |
|
|
|
656 |
|
|
end architecture;
|