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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [ata/] [pata_artop.c] - Blame information for rev 62

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/*
 *    pata_artop.c - ARTOP ATA controller driver
 *
 *      (C) 2006 Red Hat <alan@redhat.com>
 *      (C) 2007 Bartlomiej Zolnierkiewicz
 *
 *    Based in part on drivers/ide/pci/aec62xx.c
 *      Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
 *      865/865R fixes for Macintosh card version from a patch to the old
 *              driver by Thibaut VARENE <varenet@parisc-linux.org>
 *      When setting the PCI latency we must set 0x80 or higher for burst
 *              performance Alessandro Zummo <alessandro.zummo@towertech.it>
 *
 *      TODO
 *      850 serialization once the core supports it
 *      Investigate no_dsc on 850R
 *      Clock detect
 */
 
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/ata.h>
 
#define DRV_NAME        "pata_artop"
#define DRV_VERSION     "0.4.4"
 
/*
 *      The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
 *      get PCI bus speed functionality we leave this as 0. Its a variable
 *      for when we get the functionality and also for folks wanting to
 *      test stuff.
 */
 
static int clock = 0;
 
static int artop6210_pre_reset(struct ata_link *link, unsigned long deadline)
{
        struct ata_port *ap = link->ap;
        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
        const struct pci_bits artop_enable_bits[] = {
                { 0x4AU, 1U, 0x02UL, 0x02UL },  /* port 0 */
                { 0x4AU, 1U, 0x04UL, 0x04UL },  /* port 1 */
        };
 
        if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
                return -ENOENT;
 
        return ata_std_prereset(link, deadline);
}
 
/**
 *      artop6210_error_handler - Probe specified port on PATA host controller
 *      @ap: Port to probe
 *
 *      LOCKING:
 *      None (inherited from caller).
 */
 
static void artop6210_error_handler(struct ata_port *ap)
{
        ata_bmdma_drive_eh(ap, artop6210_pre_reset,
                                    ata_std_softreset, NULL,
                                    ata_std_postreset);
}
 
/**
 *      artop6260_pre_reset     -       check for 40/80 pin
 *      @link: link
 *      @deadline: deadline jiffies for the operation
 *
 *      The ARTOP hardware reports the cable detect bits in register 0x49.
 *      Nothing complicated needed here.
 */
 
static int artop6260_pre_reset(struct ata_link *link, unsigned long deadline)
{
        static const struct pci_bits artop_enable_bits[] = {
                { 0x4AU, 1U, 0x02UL, 0x02UL },  /* port 0 */
                { 0x4AU, 1U, 0x04UL, 0x04UL },  /* port 1 */
        };
 
        struct ata_port *ap = link->ap;
        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 
        /* Odd numbered device ids are the units with enable bits (the -R cards) */
        if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
                return -ENOENT;
 
        return ata_std_prereset(link, deadline);
}
 
/**
 *      artop6260_cable_detect  -       identify cable type
 *      @ap: Port
 *
 *      Identify the cable type for the ARTOP interface in question
 */
 
static int artop6260_cable_detect(struct ata_port *ap)
{
        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
        u8 tmp;
        pci_read_config_byte(pdev, 0x49, &tmp);
        if (tmp & (1 << ap->port_no))
                return ATA_CBL_PATA40;
        return ATA_CBL_PATA80;
}
 
/**
 *      artop6260_error_handler - Probe specified port on PATA host controller
 *      @ap: Port to probe
 *
 *      LOCKING:
 *      None (inherited from caller).
 */
 
static void artop6260_error_handler(struct ata_port *ap)
{
        ata_bmdma_drive_eh(ap, artop6260_pre_reset,
                                    ata_std_softreset, NULL,
                                    ata_std_postreset);
}
 
/**
 *      artop6210_load_piomode - Load a set of PATA PIO timings
 *      @ap: Port whose timings we are configuring
 *      @adev: Device
 *      @pio: PIO mode
 *
 *      Set PIO mode for device, in host controller PCI config space. This
 *      is used both to set PIO timings in PIO mode and also to set the
 *      matching PIO clocking for UDMA, as well as the MWDMA timings.
 *
 *      LOCKING:
 *      None (inherited from caller).
 */
 
static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio)
{
        struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
        int dn = adev->devno + 2 * ap->port_no;
        const u16 timing[2][5] = {
                { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 },
                { 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 }
 
        };
        /* Load the PIO timing active/recovery bits */
        pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);
}
 
/**
 *      artop6210_set_piomode - Initialize host controller PATA PIO timings
 *      @ap: Port whose timings we are configuring
 *      @adev: Device we are configuring
 *
 *      Set PIO mode for device, in host controller PCI config space. For
 *      ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
 *      the event UDMA is used the later call to set_dmamode will set the
 *      bits as required.
 *
 *      LOCKING:
 *      None (inherited from caller).
 */
 
static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
        struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
        int dn = adev->devno + 2 * ap->port_no;
        u8 ultra;
 
        artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
 
        /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
        pci_read_config_byte(pdev, 0x54, &ultra);
        ultra &= ~(3 << (2 * dn));
        pci_write_config_byte(pdev, 0x54, ultra);
}
 
/**
 *      artop6260_load_piomode - Initialize host controller PATA PIO timings
 *      @ap: Port whose timings we are configuring
 *      @adev: Device we are configuring
 *      @pio: PIO mode
 *
 *      Set PIO mode for device, in host controller PCI config space. The
 *      ARTOP6260 and relatives store the timing data differently.
 *
 *      LOCKING:
 *      None (inherited from caller).
 */
 
static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio)
{
        struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
        int dn = adev->devno + 2 * ap->port_no;
        const u8 timing[2][5] = {
                { 0x00, 0x0A, 0x08, 0x33, 0x31 },
                { 0x70, 0x7A, 0x78, 0x43, 0x41 }
 
        };
        /* Load the PIO timing active/recovery bits */
        pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);
}
 
/**
 *      artop6260_set_piomode - Initialize host controller PATA PIO timings
 *      @ap: Port whose timings we are configuring
 *      @adev: Device we are configuring
 *
 *      Set PIO mode for device, in host controller PCI config space. For
 *      ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
 *      the event UDMA is used the later call to set_dmamode will set the
 *      bits as required.
 *
 *      LOCKING:
 *      None (inherited from caller).
 */
 
static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
        struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
        u8 ultra;
 
        artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
 
        /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
        pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
        ultra &= ~(7 << (4  * adev->devno));    /* One nibble per drive */
        pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
}
 
/**
 *      artop6210_set_dmamode - Initialize host controller PATA PIO timings
 *      @ap: Port whose timings we are configuring
 *      @adev: Device whose timings we are configuring
 *
 *      Set DMA mode for device, in host controller PCI config space.
 *
 *      LOCKING:
 *      None (inherited from caller).
 */
 
static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev)
{
        unsigned int pio;
        struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
        int dn = adev->devno + 2 * ap->port_no;
        u8 ultra;
 
        if (adev->dma_mode == XFER_MW_DMA_0)
                pio = 1;
        else
                pio = 4;
 
        /* Load the PIO timing active/recovery bits */
        artop6210_load_piomode(ap, adev, pio);
 
        pci_read_config_byte(pdev, 0x54, &ultra);
        ultra &= ~(3 << (2 * dn));
 
        /* Add ultra DMA bits if in UDMA mode */
        if (adev->dma_mode >= XFER_UDMA_0) {
                u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;
                if (mode == 0)
                        mode = 1;
                ultra |= (mode << (2 * dn));
        }
        pci_write_config_byte(pdev, 0x54, ultra);
}
 
/**
 *      artop6260_set_dmamode - Initialize host controller PATA PIO timings
 *      @ap: Port whose timings we are configuring
 *      @adev: Device we are configuring
 *
 *      Set DMA mode for device, in host controller PCI config space. The
 *      ARTOP6260 and relatives store the timing data differently.
 *
 *      LOCKING:
 *      None (inherited from caller).
 */
 
static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev)
{
        unsigned int pio        = adev->pio_mode - XFER_PIO_0;
        struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
        u8 ultra;
 
        if (adev->dma_mode == XFER_MW_DMA_0)
                pio = 1;
        else
                pio = 4;
 
        /* Load the PIO timing active/recovery bits */
        artop6260_load_piomode(ap, adev, pio);
 
        /* Add ultra DMA bits if in UDMA mode */
        pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
        ultra &= ~(7 << (4  * adev->devno));    /* One nibble per drive */
        if (adev->dma_mode >= XFER_UDMA_0) {
                u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;
                if (mode == 0)
                        mode = 1;
                ultra |= (mode << (4 * adev->devno));
        }
        pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
}
 
static struct scsi_host_template artop_sht = {
        .module                 = THIS_MODULE,
        .name                   = DRV_NAME,
        .ioctl                  = ata_scsi_ioctl,
        .queuecommand           = ata_scsi_queuecmd,
        .can_queue              = ATA_DEF_QUEUE,
        .this_id                = ATA_SHT_THIS_ID,
        .sg_tablesize           = LIBATA_MAX_PRD,
        .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
        .emulated               = ATA_SHT_EMULATED,
        .use_clustering         = ATA_SHT_USE_CLUSTERING,
        .proc_name              = DRV_NAME,
        .dma_boundary           = ATA_DMA_BOUNDARY,
        .slave_configure        = ata_scsi_slave_config,
        .slave_destroy          = ata_scsi_slave_destroy,
        .bios_param             = ata_std_bios_param,
};
 
static const struct ata_port_operations artop6210_ops = {
        .set_piomode            = artop6210_set_piomode,
        .set_dmamode            = artop6210_set_dmamode,
        .mode_filter            = ata_pci_default_filter,
 
        .tf_load                = ata_tf_load,
        .tf_read                = ata_tf_read,
        .check_status           = ata_check_status,
        .exec_command           = ata_exec_command,
        .dev_select             = ata_std_dev_select,
 
        .freeze                 = ata_bmdma_freeze,
        .thaw                   = ata_bmdma_thaw,
        .error_handler          = artop6210_error_handler,
        .post_internal_cmd      = ata_bmdma_post_internal_cmd,
        .cable_detect           = ata_cable_40wire,
 
        .bmdma_setup            = ata_bmdma_setup,
        .bmdma_start            = ata_bmdma_start,
        .bmdma_stop             = ata_bmdma_stop,
        .bmdma_status           = ata_bmdma_status,
        .qc_prep                = ata_qc_prep,
        .qc_issue               = ata_qc_issue_prot,
 
        .data_xfer              = ata_data_xfer,
 
        .irq_handler            = ata_interrupt,
        .irq_clear              = ata_bmdma_irq_clear,
        .irq_on                 = ata_irq_on,
 
        .port_start             = ata_sff_port_start,
};
 
static const struct ata_port_operations artop6260_ops = {
        .set_piomode            = artop6260_set_piomode,
        .set_dmamode            = artop6260_set_dmamode,
 
        .tf_load                = ata_tf_load,
        .tf_read                = ata_tf_read,
        .check_status           = ata_check_status,
        .exec_command           = ata_exec_command,
        .dev_select             = ata_std_dev_select,
 
        .freeze                 = ata_bmdma_freeze,
        .thaw                   = ata_bmdma_thaw,
        .error_handler          = artop6260_error_handler,
        .post_internal_cmd      = ata_bmdma_post_internal_cmd,
        .cable_detect           = artop6260_cable_detect,
 
        .bmdma_setup            = ata_bmdma_setup,
        .bmdma_start            = ata_bmdma_start,
        .bmdma_stop             = ata_bmdma_stop,
        .bmdma_status           = ata_bmdma_status,
        .qc_prep                = ata_qc_prep,
        .qc_issue               = ata_qc_issue_prot,
        .data_xfer              = ata_data_xfer,
 
        .irq_handler            = ata_interrupt,
        .irq_clear              = ata_bmdma_irq_clear,
        .irq_on                 = ata_irq_on,
 
        .port_start             = ata_sff_port_start,
};
 
 
/**
 *      artop_init_one - Register ARTOP ATA PCI device with kernel services
 *      @pdev: PCI device to register
 *      @ent: Entry in artop_pci_tbl matching with @pdev
 *
 *      Called from kernel PCI layer.
 *
 *      LOCKING:
 *      Inherited from PCI layer (may sleep).
 *
 *      RETURNS:
 *      Zero on success, or -ERRNO value.
 */
 
static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
{
        static int printed_version;
        static const struct ata_port_info info_6210 = {
                .sht            = &artop_sht,
                .flags          = ATA_FLAG_SLAVE_POSS,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA2,
                .port_ops       = &artop6210_ops,
        };
        static const struct ata_port_info info_626x = {
                .sht            = &artop_sht,
                .flags          = ATA_FLAG_SLAVE_POSS,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA4,
                .port_ops       = &artop6260_ops,
        };
        static const struct ata_port_info info_628x = {
                .sht            = &artop_sht,
                .flags          = ATA_FLAG_SLAVE_POSS,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA5,
                .port_ops       = &artop6260_ops,
        };
        static const struct ata_port_info info_628x_fast = {
                .sht            = &artop_sht,
                .flags          = ATA_FLAG_SLAVE_POSS,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &artop6260_ops,
        };
        const struct ata_port_info *ppi[] = { NULL, NULL };
 
        if (!printed_version++)
                dev_printk(KERN_DEBUG, &pdev->dev,
                           "version " DRV_VERSION "\n");
 
        if (id->driver_data == 0) {      /* 6210 variant */
                ppi[0] = &info_6210;
                ppi[1] = &ata_dummy_port_info;
                /* BIOS may have left us in UDMA, clear it before libata probe */
                pci_write_config_byte(pdev, 0x54, 0);
                /* For the moment (also lacks dsc) */
                printk(KERN_WARNING "ARTOP 6210 requires serialize functionality not yet supported by libata.\n");
                printk(KERN_WARNING "Secondary ATA ports will not be activated.\n");
        }
        else if (id->driver_data == 1)  /* 6260 */
                ppi[0] = &info_626x;
        else if (id->driver_data == 2)  { /* 6280 or 6280 + fast */
                unsigned long io = pci_resource_start(pdev, 4);
                u8 reg;
 
                ppi[0] = &info_628x;
                if (inb(io) & 0x10)
                        ppi[0] = &info_628x_fast;
                /* Mac systems come up with some registers not set as we
                   will need them */
 
                /* Clear reset & test bits */
                pci_read_config_byte(pdev, 0x49, &reg);
                pci_write_config_byte(pdev, 0x49, reg & ~ 0x30);
 
                /* PCI latency must be > 0x80 for burst mode, tweak it
                 * if required.
                 */
                pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &reg);
                if (reg <= 0x80)
                        pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
 
                /* Enable IRQ output and burst mode */
                pci_read_config_byte(pdev, 0x4a, &reg);
                pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
 
        }
 
        BUG_ON(ppi[0] == NULL);
 
        return ata_pci_init_one(pdev, ppi);
}
 
static const struct pci_device_id artop_pci_tbl[] = {
        { PCI_VDEVICE(ARTOP, 0x0005), 0 },
        { PCI_VDEVICE(ARTOP, 0x0006), 1 },
        { PCI_VDEVICE(ARTOP, 0x0007), 1 },
        { PCI_VDEVICE(ARTOP, 0x0008), 2 },
        { PCI_VDEVICE(ARTOP, 0x0009), 2 },
 
        { }     /* terminate list */
};
 
static struct pci_driver artop_pci_driver = {
        .name                   = DRV_NAME,
        .id_table               = artop_pci_tbl,
        .probe                  = artop_init_one,
        .remove                 = ata_pci_remove_one,
};
 
static int __init artop_init(void)
{
        return pci_register_driver(&artop_pci_driver);
}
 
static void __exit artop_exit(void)
{
        pci_unregister_driver(&artop_pci_driver);
}
 
module_init(artop_init);
module_exit(artop_exit);
 
MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, artop_pci_tbl);
MODULE_VERSION(DRV_VERSION);
 

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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [ata/] [pata_artop.c] - Blame information for rev 62

Line No.	Rev	Author	Line
1	62	marcus.erl	`/*`
2			`* pata_artop.c - ARTOP ATA controller driver`
3			`*`
4			`* (C) 2006 Red Hat <alan@redhat.com>`
5			`* (C) 2007 Bartlomiej Zolnierkiewicz`
6			`*`
7			`* Based in part on drivers/ide/pci/aec62xx.c`
8			`* Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>`
9			`* 865/865R fixes for Macintosh card version from a patch to the old`
10			`* driver by Thibaut VARENE <varenet@parisc-linux.org>`
11			`* When setting the PCI latency we must set 0x80 or higher for burst`
12			`* performance Alessandro Zummo <alessandro.zummo@towertech.it>`
13			`*`
14			`* TODO`
15			`* 850 serialization once the core supports it`
16			`* Investigate no_dsc on 850R`
17			`* Clock detect`
18			`*/`
19
20			`#include <linux/kernel.h>`
21			`#include <linux/module.h>`
22			`#include <linux/pci.h>`
23			`#include <linux/init.h>`
24			`#include <linux/blkdev.h>`
25			`#include <linux/delay.h>`
26			`#include <linux/device.h>`
27			`#include <scsi/scsi_host.h>`
28			`#include <linux/libata.h>`
29			`#include <linux/ata.h>`
30
31			`#define DRV_NAME "pata_artop"`
32			`#define DRV_VERSION "0.4.4"`
33
34			`/*`
35			`* The ARTOP has 33 Mhz and "over clocked" timing tables. Until we`
36			`* get PCI bus speed functionality we leave this as 0. Its a variable`
37			`* for when we get the functionality and also for folks wanting to`
38			`* test stuff.`
39			`*/`
40
41			`static int clock = 0;`
42
43			`static int artop6210_pre_reset(struct ata_link *link, unsigned long deadline)`
44			`{`
45			`struct ata_port *ap = link->ap;`
46			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
47			`const struct pci_bits artop_enable_bits[] = {`
48			`{ 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */`
49			`{ 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */`
50			`};`
51
52			`if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))`
53			`return -ENOENT;`
54
55			`return ata_std_prereset(link, deadline);`
56			`}`
57
58			`/**`
59			`* artop6210_error_handler - Probe specified port on PATA host controller`
60			`* @ap: Port to probe`
61			`*`
62			`* LOCKING:`
63			`* None (inherited from caller).`
64			`*/`
65
66			`static void artop6210_error_handler(struct ata_port *ap)`
67			`{`
68			`ata_bmdma_drive_eh(ap, artop6210_pre_reset,`
69			`ata_std_softreset, NULL,`
70			`ata_std_postreset);`
71			`}`
72
73			`/**`
74			`* artop6260_pre_reset - check for 40/80 pin`
75			`* @link: link`
76			`* @deadline: deadline jiffies for the operation`
77			`*`
78			`* The ARTOP hardware reports the cable detect bits in register 0x49.`
79			`* Nothing complicated needed here.`
80			`*/`
81
82			`static int artop6260_pre_reset(struct ata_link *link, unsigned long deadline)`
83			`{`
84			`static const struct pci_bits artop_enable_bits[] = {`
85			`{ 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */`
86			`{ 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */`
87			`};`
88
89			`struct ata_port *ap = link->ap;`
90			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
91
92			`/* Odd numbered device ids are the units with enable bits (the -R cards) */`
93			`if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))`
94			`return -ENOENT;`
95
96			`return ata_std_prereset(link, deadline);`
97			`}`
98
99			`/**`
100			`* artop6260_cable_detect - identify cable type`
101			`* @ap: Port`
102			`*`
103			`* Identify the cable type for the ARTOP interface in question`
104			`*/`
105
106			`static int artop6260_cable_detect(struct ata_port *ap)`
107			`{`
108			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
109			`u8 tmp;`
110			`pci_read_config_byte(pdev, 0x49, &tmp);`
111			`if (tmp & (1 << ap->port_no))`
112			`return ATA_CBL_PATA40;`
113			`return ATA_CBL_PATA80;`
114			`}`
115
116			`/**`
117			`* artop6260_error_handler - Probe specified port on PATA host controller`
118			`* @ap: Port to probe`
119			`*`
120			`* LOCKING:`
121			`* None (inherited from caller).`
122			`*/`
123
124			`static void artop6260_error_handler(struct ata_port *ap)`
125			`{`
126			`ata_bmdma_drive_eh(ap, artop6260_pre_reset,`
127			`ata_std_softreset, NULL,`
128			`ata_std_postreset);`
129			`}`
130
131			`/**`
132			`* artop6210_load_piomode - Load a set of PATA PIO timings`
133			`* @ap: Port whose timings we are configuring`
134			`* @adev: Device`
135			`* @pio: PIO mode`
136			`*`
137			`* Set PIO mode for device, in host controller PCI config space. This`
138			`* is used both to set PIO timings in PIO mode and also to set the`
139			`* matching PIO clocking for UDMA, as well as the MWDMA timings.`
140			`*`
141			`* LOCKING:`
142			`* None (inherited from caller).`
143			`*/`
144
145			`static void artop6210_load_piomode(struct ata_port ap, struct ata_device adev, unsigned int pio)`
146			`{`
147			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
148			`int dn = adev->devno + 2 * ap->port_no;`
149			`const u16 timing[2][5] = {`
150			`{ 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 },`
151			`{ 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 }`
152
153			`};`
154			`/* Load the PIO timing active/recovery bits */`
155			`pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);`
156			`}`
157
158			`/**`
159			`* artop6210_set_piomode - Initialize host controller PATA PIO timings`
160			`* @ap: Port whose timings we are configuring`
161			`* @adev: Device we are configuring`
162			`*`
163			`* Set PIO mode for device, in host controller PCI config space. For`
164			`* ARTOP we must also clear the UDMA bits if we are not doing UDMA. In`
165			`* the event UDMA is used the later call to set_dmamode will set the`
166			`* bits as required.`
167			`*`
168			`* LOCKING:`
169			`* None (inherited from caller).`
170			`*/`
171
172			`static void artop6210_set_piomode(struct ata_port ap, struct ata_device adev)`
173			`{`
174			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
175			`int dn = adev->devno + 2 * ap->port_no;`
176			`u8 ultra;`
177
178			`artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);`
179
180			`/* Clear the UDMA mode bits (set_dmamode will redo this if needed) */`
181			`pci_read_config_byte(pdev, 0x54, &ultra);`
182			`ultra &= ~(3 << (2 * dn));`
183			`pci_write_config_byte(pdev, 0x54, ultra);`
184			`}`
185
186			`/**`
187			`* artop6260_load_piomode - Initialize host controller PATA PIO timings`
188			`* @ap: Port whose timings we are configuring`
189			`* @adev: Device we are configuring`
190			`* @pio: PIO mode`
191			`*`
192			`* Set PIO mode for device, in host controller PCI config space. The`
193			`* ARTOP6260 and relatives store the timing data differently.`
194			`*`
195			`* LOCKING:`
196			`* None (inherited from caller).`
197			`*/`
198
199			`static void artop6260_load_piomode (struct ata_port ap, struct ata_device adev, unsigned int pio)`
200			`{`
201			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
202			`int dn = adev->devno + 2 * ap->port_no;`
203			`const u8 timing[2][5] = {`
204			`{ 0x00, 0x0A, 0x08, 0x33, 0x31 },`
205			`{ 0x70, 0x7A, 0x78, 0x43, 0x41 }`
206
207			`};`
208			`/* Load the PIO timing active/recovery bits */`
209			`pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);`
210			`}`
211
212			`/**`
213			`* artop6260_set_piomode - Initialize host controller PATA PIO timings`
214			`* @ap: Port whose timings we are configuring`
215			`* @adev: Device we are configuring`
216			`*`
217			`* Set PIO mode for device, in host controller PCI config space. For`
218			`* ARTOP we must also clear the UDMA bits if we are not doing UDMA. In`
219			`* the event UDMA is used the later call to set_dmamode will set the`
220			`* bits as required.`
221			`*`
222			`* LOCKING:`
223			`* None (inherited from caller).`
224			`*/`
225
226			`static void artop6260_set_piomode(struct ata_port ap, struct ata_device adev)`
227			`{`
228			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
229			`u8 ultra;`
230
231			`artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);`
232
233			`/* Clear the UDMA mode bits (set_dmamode will redo this if needed) */`
234			`pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);`
235			`ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */`
236			`pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);`
237			`}`
238
239			`/**`
240			`* artop6210_set_dmamode - Initialize host controller PATA PIO timings`
241			`* @ap: Port whose timings we are configuring`
242			`* @adev: Device whose timings we are configuring`
243			`*`
244			`* Set DMA mode for device, in host controller PCI config space.`
245			`*`
246			`* LOCKING:`
247			`* None (inherited from caller).`
248			`*/`
249
250			`static void artop6210_set_dmamode (struct ata_port ap, struct ata_device adev)`
251			`{`
252			`unsigned int pio;`
253			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
254			`int dn = adev->devno + 2 * ap->port_no;`
255			`u8 ultra;`
256
257			`if (adev->dma_mode == XFER_MW_DMA_0)`
258			`pio = 1;`
259			`else`
260			`pio = 4;`
261
262			`/* Load the PIO timing active/recovery bits */`
263			`artop6210_load_piomode(ap, adev, pio);`
264
265			`pci_read_config_byte(pdev, 0x54, &ultra);`
266			`ultra &= ~(3 << (2 * dn));`
267
268			`/* Add ultra DMA bits if in UDMA mode */`
269			`if (adev->dma_mode >= XFER_UDMA_0) {`
270			`u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;`
271			`if (mode == 0)`
272			`mode = 1;`
273			`ultra \|= (mode << (2 * dn));`
274			`}`
275			`pci_write_config_byte(pdev, 0x54, ultra);`
276			`}`
277
278			`/**`
279			`* artop6260_set_dmamode - Initialize host controller PATA PIO timings`
280			`* @ap: Port whose timings we are configuring`
281			`* @adev: Device we are configuring`
282			`*`
283			`* Set DMA mode for device, in host controller PCI config space. The`
284			`* ARTOP6260 and relatives store the timing data differently.`
285			`*`
286			`* LOCKING:`
287			`* None (inherited from caller).`
288			`*/`
289
290			`static void artop6260_set_dmamode (struct ata_port ap, struct ata_device adev)`
291			`{`
292			`unsigned int pio = adev->pio_mode - XFER_PIO_0;`
293			`struct pci_dev *pdev = to_pci_dev(ap->host->dev);`
294			`u8 ultra;`
295
296			`if (adev->dma_mode == XFER_MW_DMA_0)`
297			`pio = 1;`
298			`else`
299			`pio = 4;`
300
301			`/* Load the PIO timing active/recovery bits */`
302			`artop6260_load_piomode(ap, adev, pio);`
303
304			`/* Add ultra DMA bits if in UDMA mode */`
305			`pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);`
306			`ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */`
307			`if (adev->dma_mode >= XFER_UDMA_0) {`
308			`u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;`
309			`if (mode == 0)`
310			`mode = 1;`
311			`ultra \|= (mode << (4 * adev->devno));`
312			`}`
313			`pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);`
314			`}`
315
316			`static struct scsi_host_template artop_sht = {`
317			`.module = THIS_MODULE,`
318			`.name = DRV_NAME,`
319			`.ioctl = ata_scsi_ioctl,`
320			`.queuecommand = ata_scsi_queuecmd,`
321			`.can_queue = ATA_DEF_QUEUE,`
322			`.this_id = ATA_SHT_THIS_ID,`
323			`.sg_tablesize = LIBATA_MAX_PRD,`
324			`.cmd_per_lun = ATA_SHT_CMD_PER_LUN,`
325			`.emulated = ATA_SHT_EMULATED,`
326			`.use_clustering = ATA_SHT_USE_CLUSTERING,`
327			`.proc_name = DRV_NAME,`
328			`.dma_boundary = ATA_DMA_BOUNDARY,`
329			`.slave_configure = ata_scsi_slave_config,`
330			`.slave_destroy = ata_scsi_slave_destroy,`
331			`.bios_param = ata_std_bios_param,`
332			`};`
333
334			`static const struct ata_port_operations artop6210_ops = {`
335			`.set_piomode = artop6210_set_piomode,`
336			`.set_dmamode = artop6210_set_dmamode,`
337			`.mode_filter = ata_pci_default_filter,`
338
339			`.tf_load = ata_tf_load,`
340			`.tf_read = ata_tf_read,`
341			`.check_status = ata_check_status,`
342			`.exec_command = ata_exec_command,`
343			`.dev_select = ata_std_dev_select,`
344
345			`.freeze = ata_bmdma_freeze,`
346			`.thaw = ata_bmdma_thaw,`
347			`.error_handler = artop6210_error_handler,`
348			`.post_internal_cmd = ata_bmdma_post_internal_cmd,`
349			`.cable_detect = ata_cable_40wire,`
350
351			`.bmdma_setup = ata_bmdma_setup,`
352			`.bmdma_start = ata_bmdma_start,`
353			`.bmdma_stop = ata_bmdma_stop,`
354			`.bmdma_status = ata_bmdma_status,`
355			`.qc_prep = ata_qc_prep,`
356			`.qc_issue = ata_qc_issue_prot,`
357
358			`.data_xfer = ata_data_xfer,`
359
360			`.irq_handler = ata_interrupt,`
361			`.irq_clear = ata_bmdma_irq_clear,`
362			`.irq_on = ata_irq_on,`
363
364			`.port_start = ata_sff_port_start,`
365			`};`
366
367			`static const struct ata_port_operations artop6260_ops = {`
368			`.set_piomode = artop6260_set_piomode,`
369			`.set_dmamode = artop6260_set_dmamode,`
370
371			`.tf_load = ata_tf_load,`
372			`.tf_read = ata_tf_read,`
373			`.check_status = ata_check_status,`
374			`.exec_command = ata_exec_command,`
375			`.dev_select = ata_std_dev_select,`
376
377			`.freeze = ata_bmdma_freeze,`
378			`.thaw = ata_bmdma_thaw,`
379			`.error_handler = artop6260_error_handler,`
380			`.post_internal_cmd = ata_bmdma_post_internal_cmd,`
381			`.cable_detect = artop6260_cable_detect,`
382
383			`.bmdma_setup = ata_bmdma_setup,`
384			`.bmdma_start = ata_bmdma_start,`
385			`.bmdma_stop = ata_bmdma_stop,`
386			`.bmdma_status = ata_bmdma_status,`
387			`.qc_prep = ata_qc_prep,`
388			`.qc_issue = ata_qc_issue_prot,`
389			`.data_xfer = ata_data_xfer,`
390
391			`.irq_handler = ata_interrupt,`
392			`.irq_clear = ata_bmdma_irq_clear,`
393			`.irq_on = ata_irq_on,`
394
395			`.port_start = ata_sff_port_start,`
396			`};`
397
398
399			`/**`
400			`* artop_init_one - Register ARTOP ATA PCI device with kernel services`
401			`* @pdev: PCI device to register`
402			`* @ent: Entry in artop_pci_tbl matching with @pdev`
403			`*`
404			`* Called from kernel PCI layer.`
405			`*`
406			`* LOCKING:`
407			`* Inherited from PCI layer (may sleep).`
408			`*`
409			`* RETURNS:`
410			`* Zero on success, or -ERRNO value.`
411			`*/`
412
413			`static int artop_init_one (struct pci_dev pdev, const struct pci_device_id id)`
414			`{`
415			`static int printed_version;`
416			`static const struct ata_port_info info_6210 = {`
417			`.sht = &artop_sht,`
418			`.flags = ATA_FLAG_SLAVE_POSS,`
419			`.pio_mask = 0x1f, /* pio0-4 */`
420			`.mwdma_mask = 0x07, /* mwdma0-2 */`
421			`.udma_mask = ATA_UDMA2,`
422			`.port_ops = &artop6210_ops,`
423			`};`
424			`static const struct ata_port_info info_626x = {`
425			`.sht = &artop_sht,`
426			`.flags = ATA_FLAG_SLAVE_POSS,`
427			`.pio_mask = 0x1f, /* pio0-4 */`
428			`.mwdma_mask = 0x07, /* mwdma0-2 */`
429			`.udma_mask = ATA_UDMA4,`
430			`.port_ops = &artop6260_ops,`
431			`};`
432			`static const struct ata_port_info info_628x = {`
433			`.sht = &artop_sht,`
434			`.flags = ATA_FLAG_SLAVE_POSS,`
435			`.pio_mask = 0x1f, /* pio0-4 */`
436			`.mwdma_mask = 0x07, /* mwdma0-2 */`
437			`.udma_mask = ATA_UDMA5,`
438			`.port_ops = &artop6260_ops,`
439			`};`
440			`static const struct ata_port_info info_628x_fast = {`
441			`.sht = &artop_sht,`
442			`.flags = ATA_FLAG_SLAVE_POSS,`
443			`.pio_mask = 0x1f, /* pio0-4 */`
444			`.mwdma_mask = 0x07, /* mwdma0-2 */`
445			`.udma_mask = ATA_UDMA6,`
446			`.port_ops = &artop6260_ops,`
447			`};`
448			`const struct ata_port_info *ppi[] = { NULL, NULL };`
449
450			`if (!printed_version++)`
451			`dev_printk(KERN_DEBUG, &pdev->dev,`
452			`"version " DRV_VERSION "\n");`
453
454			`if (id->driver_data == 0) { /* 6210 variant */`
455			`ppi[0] = &info_6210;`
456			`ppi[1] = &ata_dummy_port_info;`
457			`/* BIOS may have left us in UDMA, clear it before libata probe */`
458			`pci_write_config_byte(pdev, 0x54, 0);`
459			`/* For the moment (also lacks dsc) */`
460			`printk(KERN_WARNING "ARTOP 6210 requires serialize functionality not yet supported by libata.\n");`
461			`printk(KERN_WARNING "Secondary ATA ports will not be activated.\n");`
462			`}`
463			`else if (id->driver_data == 1) /* 6260 */`
464			`ppi[0] = &info_626x;`
465			`else if (id->driver_data == 2) { /* 6280 or 6280 + fast */`
466			`unsigned long io = pci_resource_start(pdev, 4);`
467			`u8 reg;`
468
469			`ppi[0] = &info_628x;`
470			`if (inb(io) & 0x10)`
471			`ppi[0] = &info_628x_fast;`
472			`/* Mac systems come up with some registers not set as we`
473			`will need them */`
474
475			`/* Clear reset & test bits */`
476			`pci_read_config_byte(pdev, 0x49, &reg);`
477			`pci_write_config_byte(pdev, 0x49, reg & ~ 0x30);`
478
479			`/* PCI latency must be > 0x80 for burst mode, tweak it`
480			`* if required.`
481			`*/`
482			`pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &reg);`
483			`if (reg <= 0x80)`
484			`pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);`
485
486			`/* Enable IRQ output and burst mode */`
487			`pci_read_config_byte(pdev, 0x4a, &reg);`
488			`pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) \| 0x80);`
489
490			`}`
491
492			`BUG_ON(ppi[0] == NULL);`
493
494			`return ata_pci_init_one(pdev, ppi);`
495			`}`
496
497			`static const struct pci_device_id artop_pci_tbl[] = {`
498			`{ PCI_VDEVICE(ARTOP, 0x0005), 0 },`
499			`{ PCI_VDEVICE(ARTOP, 0x0006), 1 },`
500			`{ PCI_VDEVICE(ARTOP, 0x0007), 1 },`
501			`{ PCI_VDEVICE(ARTOP, 0x0008), 2 },`
502			`{ PCI_VDEVICE(ARTOP, 0x0009), 2 },`
503
504			`{ } /* terminate list */`
505			`};`
506
507			`static struct pci_driver artop_pci_driver = {`
508			`.name = DRV_NAME,`
509			`.id_table = artop_pci_tbl,`
510			`.probe = artop_init_one,`
511			`.remove = ata_pci_remove_one,`
512			`};`
513
514			`static int __init artop_init(void)`
515			`{`
516			`return pci_register_driver(&artop_pci_driver);`
517			`}`
518
519			`static void __exit artop_exit(void)`
520			`{`
521			`pci_unregister_driver(&artop_pci_driver);`
522			`}`
523
524			`module_init(artop_init);`
525			`module_exit(artop_exit);`
526
527			`MODULE_AUTHOR("Alan Cox");`
528			`MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA");`
529			`MODULE_LICENSE("GPL");`
530			`MODULE_DEVICE_TABLE(pci, artop_pci_tbl);`
531			`MODULE_VERSION(DRV_VERSION);`
532