1 |
62 |
marcus.erl |
/*
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2 |
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* pata_artop.c - ARTOP ATA controller driver
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3 |
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*
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4 |
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* (C) 2006 Red Hat <alan@redhat.com>
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* (C) 2007 Bartlomiej Zolnierkiewicz
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*
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7 |
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* Based in part on drivers/ide/pci/aec62xx.c
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* Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
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* 865/865R fixes for Macintosh card version from a patch to the old
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* driver by Thibaut VARENE <varenet@parisc-linux.org>
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* When setting the PCI latency we must set 0x80 or higher for burst
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12 |
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* performance Alessandro Zummo <alessandro.zummo@towertech.it>
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*
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* TODO
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* 850 serialization once the core supports it
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* Investigate no_dsc on 850R
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* Clock detect
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/ata.h>
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30 |
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31 |
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#define DRV_NAME "pata_artop"
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32 |
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#define DRV_VERSION "0.4.4"
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33 |
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34 |
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/*
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* The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
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36 |
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* get PCI bus speed functionality we leave this as 0. Its a variable
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* for when we get the functionality and also for folks wanting to
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* test stuff.
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*/
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static int clock = 0;
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static int artop6210_pre_reset(struct ata_link *link, unsigned long deadline)
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{
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struct ata_port *ap = link->ap;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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const struct pci_bits artop_enable_bits[] = {
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{ 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */
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49 |
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{ 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */
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};
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if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
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return -ENOENT;
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return ata_std_prereset(link, deadline);
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}
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/**
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* artop6210_error_handler - Probe specified port on PATA host controller
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* @ap: Port to probe
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6210_error_handler(struct ata_port *ap)
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{
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ata_bmdma_drive_eh(ap, artop6210_pre_reset,
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ata_std_softreset, NULL,
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ata_std_postreset);
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}
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/**
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* artop6260_pre_reset - check for 40/80 pin
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* @link: link
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* @deadline: deadline jiffies for the operation
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*
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* The ARTOP hardware reports the cable detect bits in register 0x49.
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* Nothing complicated needed here.
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*/
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static int artop6260_pre_reset(struct ata_link *link, unsigned long deadline)
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{
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static const struct pci_bits artop_enable_bits[] = {
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{ 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */
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{ 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */
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};
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struct ata_port *ap = link->ap;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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/* Odd numbered device ids are the units with enable bits (the -R cards) */
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if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
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return -ENOENT;
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return ata_std_prereset(link, deadline);
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}
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/**
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* artop6260_cable_detect - identify cable type
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* @ap: Port
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*
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* Identify the cable type for the ARTOP interface in question
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*/
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static int artop6260_cable_detect(struct ata_port *ap)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u8 tmp;
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pci_read_config_byte(pdev, 0x49, &tmp);
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if (tmp & (1 << ap->port_no))
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return ATA_CBL_PATA40;
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return ATA_CBL_PATA80;
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}
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/**
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* artop6260_error_handler - Probe specified port on PATA host controller
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* @ap: Port to probe
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6260_error_handler(struct ata_port *ap)
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{
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ata_bmdma_drive_eh(ap, artop6260_pre_reset,
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ata_std_softreset, NULL,
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ata_std_postreset);
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}
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/**
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* artop6210_load_piomode - Load a set of PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: Device
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* @pio: PIO mode
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*
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* Set PIO mode for device, in host controller PCI config space. This
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* is used both to set PIO timings in PIO mode and also to set the
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* matching PIO clocking for UDMA, as well as the MWDMA timings.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int dn = adev->devno + 2 * ap->port_no;
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const u16 timing[2][5] = {
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{ 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 },
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{ 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 }
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};
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/* Load the PIO timing active/recovery bits */
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pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);
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}
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/**
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* artop6210_set_piomode - Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: Device we are configuring
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*
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* Set PIO mode for device, in host controller PCI config space. For
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164 |
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* ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
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* the event UDMA is used the later call to set_dmamode will set the
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* bits as required.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int dn = adev->devno + 2 * ap->port_no;
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u8 ultra;
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artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
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/* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
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pci_read_config_byte(pdev, 0x54, &ultra);
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ultra &= ~(3 << (2 * dn));
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pci_write_config_byte(pdev, 0x54, ultra);
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}
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/**
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* artop6260_load_piomode - Initialize host controller PATA PIO timings
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188 |
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* @ap: Port whose timings we are configuring
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* @adev: Device we are configuring
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* @pio: PIO mode
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*
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* Set PIO mode for device, in host controller PCI config space. The
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* ARTOP6260 and relatives store the timing data differently.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int dn = adev->devno + 2 * ap->port_no;
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const u8 timing[2][5] = {
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{ 0x00, 0x0A, 0x08, 0x33, 0x31 },
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{ 0x70, 0x7A, 0x78, 0x43, 0x41 }
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};
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/* Load the PIO timing active/recovery bits */
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pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);
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}
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/**
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* artop6260_set_piomode - Initialize host controller PATA PIO timings
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* @ap: Port whose timings we are configuring
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* @adev: Device we are configuring
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*
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* Set PIO mode for device, in host controller PCI config space. For
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218 |
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* ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
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219 |
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* the event UDMA is used the later call to set_dmamode will set the
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220 |
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* bits as required.
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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228 |
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u8 ultra;
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artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
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/* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
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pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
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ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
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pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
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}
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239 |
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/**
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240 |
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* artop6210_set_dmamode - Initialize host controller PATA PIO timings
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241 |
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* @ap: Port whose timings we are configuring
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242 |
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* @adev: Device whose timings we are configuring
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243 |
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*
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244 |
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* Set DMA mode for device, in host controller PCI config space.
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245 |
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*
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246 |
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* LOCKING:
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247 |
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* None (inherited from caller).
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248 |
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*/
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249 |
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250 |
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static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev)
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251 |
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{
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252 |
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unsigned int pio;
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253 |
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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254 |
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int dn = adev->devno + 2 * ap->port_no;
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255 |
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u8 ultra;
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256 |
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257 |
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if (adev->dma_mode == XFER_MW_DMA_0)
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258 |
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pio = 1;
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259 |
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else
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260 |
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pio = 4;
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261 |
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262 |
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/* Load the PIO timing active/recovery bits */
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263 |
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artop6210_load_piomode(ap, adev, pio);
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264 |
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265 |
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pci_read_config_byte(pdev, 0x54, &ultra);
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266 |
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ultra &= ~(3 << (2 * dn));
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267 |
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268 |
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/* Add ultra DMA bits if in UDMA mode */
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269 |
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if (adev->dma_mode >= XFER_UDMA_0) {
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270 |
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u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;
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271 |
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if (mode == 0)
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272 |
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mode = 1;
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273 |
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ultra |= (mode << (2 * dn));
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274 |
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}
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275 |
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pci_write_config_byte(pdev, 0x54, ultra);
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276 |
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}
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277 |
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278 |
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/**
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279 |
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* artop6260_set_dmamode - Initialize host controller PATA PIO timings
|
280 |
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* @ap: Port whose timings we are configuring
|
281 |
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* @adev: Device we are configuring
|
282 |
|
|
*
|
283 |
|
|
* Set DMA mode for device, in host controller PCI config space. The
|
284 |
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* ARTOP6260 and relatives store the timing data differently.
|
285 |
|
|
*
|
286 |
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|
* LOCKING:
|
287 |
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* None (inherited from caller).
|
288 |
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*/
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289 |
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|
290 |
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static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev)
|
291 |
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{
|
292 |
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unsigned int pio = adev->pio_mode - XFER_PIO_0;
|
293 |
|
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
294 |
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u8 ultra;
|
295 |
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|
296 |
|
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if (adev->dma_mode == XFER_MW_DMA_0)
|
297 |
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pio = 1;
|
298 |
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else
|
299 |
|
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pio = 4;
|
300 |
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|
301 |
|
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/* Load the PIO timing active/recovery bits */
|
302 |
|
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artop6260_load_piomode(ap, adev, pio);
|
303 |
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|
304 |
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/* Add ultra DMA bits if in UDMA mode */
|
305 |
|
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pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
|
306 |
|
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ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
|
307 |
|
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if (adev->dma_mode >= XFER_UDMA_0) {
|
308 |
|
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u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;
|
309 |
|
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if (mode == 0)
|
310 |
|
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mode = 1;
|
311 |
|
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ultra |= (mode << (4 * adev->devno));
|
312 |
|
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}
|
313 |
|
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pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
|
314 |
|
|
}
|
315 |
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|
316 |
|
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static struct scsi_host_template artop_sht = {
|
317 |
|
|
.module = THIS_MODULE,
|
318 |
|
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.name = DRV_NAME,
|
319 |
|
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.ioctl = ata_scsi_ioctl,
|
320 |
|
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.queuecommand = ata_scsi_queuecmd,
|
321 |
|
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.can_queue = ATA_DEF_QUEUE,
|
322 |
|
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.this_id = ATA_SHT_THIS_ID,
|
323 |
|
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.sg_tablesize = LIBATA_MAX_PRD,
|
324 |
|
|
.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
|
325 |
|
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.emulated = ATA_SHT_EMULATED,
|
326 |
|
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.use_clustering = ATA_SHT_USE_CLUSTERING,
|
327 |
|
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.proc_name = DRV_NAME,
|
328 |
|
|
.dma_boundary = ATA_DMA_BOUNDARY,
|
329 |
|
|
.slave_configure = ata_scsi_slave_config,
|
330 |
|
|
.slave_destroy = ata_scsi_slave_destroy,
|
331 |
|
|
.bios_param = ata_std_bios_param,
|
332 |
|
|
};
|
333 |
|
|
|
334 |
|
|
static const struct ata_port_operations artop6210_ops = {
|
335 |
|
|
.set_piomode = artop6210_set_piomode,
|
336 |
|
|
.set_dmamode = artop6210_set_dmamode,
|
337 |
|
|
.mode_filter = ata_pci_default_filter,
|
338 |
|
|
|
339 |
|
|
.tf_load = ata_tf_load,
|
340 |
|
|
.tf_read = ata_tf_read,
|
341 |
|
|
.check_status = ata_check_status,
|
342 |
|
|
.exec_command = ata_exec_command,
|
343 |
|
|
.dev_select = ata_std_dev_select,
|
344 |
|
|
|
345 |
|
|
.freeze = ata_bmdma_freeze,
|
346 |
|
|
.thaw = ata_bmdma_thaw,
|
347 |
|
|
.error_handler = artop6210_error_handler,
|
348 |
|
|
.post_internal_cmd = ata_bmdma_post_internal_cmd,
|
349 |
|
|
.cable_detect = ata_cable_40wire,
|
350 |
|
|
|
351 |
|
|
.bmdma_setup = ata_bmdma_setup,
|
352 |
|
|
.bmdma_start = ata_bmdma_start,
|
353 |
|
|
.bmdma_stop = ata_bmdma_stop,
|
354 |
|
|
.bmdma_status = ata_bmdma_status,
|
355 |
|
|
.qc_prep = ata_qc_prep,
|
356 |
|
|
.qc_issue = ata_qc_issue_prot,
|
357 |
|
|
|
358 |
|
|
.data_xfer = ata_data_xfer,
|
359 |
|
|
|
360 |
|
|
.irq_handler = ata_interrupt,
|
361 |
|
|
.irq_clear = ata_bmdma_irq_clear,
|
362 |
|
|
.irq_on = ata_irq_on,
|
363 |
|
|
|
364 |
|
|
.port_start = ata_sff_port_start,
|
365 |
|
|
};
|
366 |
|
|
|
367 |
|
|
static const struct ata_port_operations artop6260_ops = {
|
368 |
|
|
.set_piomode = artop6260_set_piomode,
|
369 |
|
|
.set_dmamode = artop6260_set_dmamode,
|
370 |
|
|
|
371 |
|
|
.tf_load = ata_tf_load,
|
372 |
|
|
.tf_read = ata_tf_read,
|
373 |
|
|
.check_status = ata_check_status,
|
374 |
|
|
.exec_command = ata_exec_command,
|
375 |
|
|
.dev_select = ata_std_dev_select,
|
376 |
|
|
|
377 |
|
|
.freeze = ata_bmdma_freeze,
|
378 |
|
|
.thaw = ata_bmdma_thaw,
|
379 |
|
|
.error_handler = artop6260_error_handler,
|
380 |
|
|
.post_internal_cmd = ata_bmdma_post_internal_cmd,
|
381 |
|
|
.cable_detect = artop6260_cable_detect,
|
382 |
|
|
|
383 |
|
|
.bmdma_setup = ata_bmdma_setup,
|
384 |
|
|
.bmdma_start = ata_bmdma_start,
|
385 |
|
|
.bmdma_stop = ata_bmdma_stop,
|
386 |
|
|
.bmdma_status = ata_bmdma_status,
|
387 |
|
|
.qc_prep = ata_qc_prep,
|
388 |
|
|
.qc_issue = ata_qc_issue_prot,
|
389 |
|
|
.data_xfer = ata_data_xfer,
|
390 |
|
|
|
391 |
|
|
.irq_handler = ata_interrupt,
|
392 |
|
|
.irq_clear = ata_bmdma_irq_clear,
|
393 |
|
|
.irq_on = ata_irq_on,
|
394 |
|
|
|
395 |
|
|
.port_start = ata_sff_port_start,
|
396 |
|
|
};
|
397 |
|
|
|
398 |
|
|
|
399 |
|
|
/**
|
400 |
|
|
* artop_init_one - Register ARTOP ATA PCI device with kernel services
|
401 |
|
|
* @pdev: PCI device to register
|
402 |
|
|
* @ent: Entry in artop_pci_tbl matching with @pdev
|
403 |
|
|
*
|
404 |
|
|
* Called from kernel PCI layer.
|
405 |
|
|
*
|
406 |
|
|
* LOCKING:
|
407 |
|
|
* Inherited from PCI layer (may sleep).
|
408 |
|
|
*
|
409 |
|
|
* RETURNS:
|
410 |
|
|
* Zero on success, or -ERRNO value.
|
411 |
|
|
*/
|
412 |
|
|
|
413 |
|
|
static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
|
414 |
|
|
{
|
415 |
|
|
static int printed_version;
|
416 |
|
|
static const struct ata_port_info info_6210 = {
|
417 |
|
|
.sht = &artop_sht,
|
418 |
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
419 |
|
|
.pio_mask = 0x1f, /* pio0-4 */
|
420 |
|
|
.mwdma_mask = 0x07, /* mwdma0-2 */
|
421 |
|
|
.udma_mask = ATA_UDMA2,
|
422 |
|
|
.port_ops = &artop6210_ops,
|
423 |
|
|
};
|
424 |
|
|
static const struct ata_port_info info_626x = {
|
425 |
|
|
.sht = &artop_sht,
|
426 |
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
427 |
|
|
.pio_mask = 0x1f, /* pio0-4 */
|
428 |
|
|
.mwdma_mask = 0x07, /* mwdma0-2 */
|
429 |
|
|
.udma_mask = ATA_UDMA4,
|
430 |
|
|
.port_ops = &artop6260_ops,
|
431 |
|
|
};
|
432 |
|
|
static const struct ata_port_info info_628x = {
|
433 |
|
|
.sht = &artop_sht,
|
434 |
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
435 |
|
|
.pio_mask = 0x1f, /* pio0-4 */
|
436 |
|
|
.mwdma_mask = 0x07, /* mwdma0-2 */
|
437 |
|
|
.udma_mask = ATA_UDMA5,
|
438 |
|
|
.port_ops = &artop6260_ops,
|
439 |
|
|
};
|
440 |
|
|
static const struct ata_port_info info_628x_fast = {
|
441 |
|
|
.sht = &artop_sht,
|
442 |
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
443 |
|
|
.pio_mask = 0x1f, /* pio0-4 */
|
444 |
|
|
.mwdma_mask = 0x07, /* mwdma0-2 */
|
445 |
|
|
.udma_mask = ATA_UDMA6,
|
446 |
|
|
.port_ops = &artop6260_ops,
|
447 |
|
|
};
|
448 |
|
|
const struct ata_port_info *ppi[] = { NULL, NULL };
|
449 |
|
|
|
450 |
|
|
if (!printed_version++)
|
451 |
|
|
dev_printk(KERN_DEBUG, &pdev->dev,
|
452 |
|
|
"version " DRV_VERSION "\n");
|
453 |
|
|
|
454 |
|
|
if (id->driver_data == 0) { /* 6210 variant */
|
455 |
|
|
ppi[0] = &info_6210;
|
456 |
|
|
ppi[1] = &ata_dummy_port_info;
|
457 |
|
|
/* BIOS may have left us in UDMA, clear it before libata probe */
|
458 |
|
|
pci_write_config_byte(pdev, 0x54, 0);
|
459 |
|
|
/* For the moment (also lacks dsc) */
|
460 |
|
|
printk(KERN_WARNING "ARTOP 6210 requires serialize functionality not yet supported by libata.\n");
|
461 |
|
|
printk(KERN_WARNING "Secondary ATA ports will not be activated.\n");
|
462 |
|
|
}
|
463 |
|
|
else if (id->driver_data == 1) /* 6260 */
|
464 |
|
|
ppi[0] = &info_626x;
|
465 |
|
|
else if (id->driver_data == 2) { /* 6280 or 6280 + fast */
|
466 |
|
|
unsigned long io = pci_resource_start(pdev, 4);
|
467 |
|
|
u8 reg;
|
468 |
|
|
|
469 |
|
|
ppi[0] = &info_628x;
|
470 |
|
|
if (inb(io) & 0x10)
|
471 |
|
|
ppi[0] = &info_628x_fast;
|
472 |
|
|
/* Mac systems come up with some registers not set as we
|
473 |
|
|
will need them */
|
474 |
|
|
|
475 |
|
|
/* Clear reset & test bits */
|
476 |
|
|
pci_read_config_byte(pdev, 0x49, ®);
|
477 |
|
|
pci_write_config_byte(pdev, 0x49, reg & ~ 0x30);
|
478 |
|
|
|
479 |
|
|
/* PCI latency must be > 0x80 for burst mode, tweak it
|
480 |
|
|
* if required.
|
481 |
|
|
*/
|
482 |
|
|
pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®);
|
483 |
|
|
if (reg <= 0x80)
|
484 |
|
|
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
|
485 |
|
|
|
486 |
|
|
/* Enable IRQ output and burst mode */
|
487 |
|
|
pci_read_config_byte(pdev, 0x4a, ®);
|
488 |
|
|
pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
|
489 |
|
|
|
490 |
|
|
}
|
491 |
|
|
|
492 |
|
|
BUG_ON(ppi[0] == NULL);
|
493 |
|
|
|
494 |
|
|
return ata_pci_init_one(pdev, ppi);
|
495 |
|
|
}
|
496 |
|
|
|
497 |
|
|
static const struct pci_device_id artop_pci_tbl[] = {
|
498 |
|
|
{ PCI_VDEVICE(ARTOP, 0x0005), 0 },
|
499 |
|
|
{ PCI_VDEVICE(ARTOP, 0x0006), 1 },
|
500 |
|
|
{ PCI_VDEVICE(ARTOP, 0x0007), 1 },
|
501 |
|
|
{ PCI_VDEVICE(ARTOP, 0x0008), 2 },
|
502 |
|
|
{ PCI_VDEVICE(ARTOP, 0x0009), 2 },
|
503 |
|
|
|
504 |
|
|
{ } /* terminate list */
|
505 |
|
|
};
|
506 |
|
|
|
507 |
|
|
static struct pci_driver artop_pci_driver = {
|
508 |
|
|
.name = DRV_NAME,
|
509 |
|
|
.id_table = artop_pci_tbl,
|
510 |
|
|
.probe = artop_init_one,
|
511 |
|
|
.remove = ata_pci_remove_one,
|
512 |
|
|
};
|
513 |
|
|
|
514 |
|
|
static int __init artop_init(void)
|
515 |
|
|
{
|
516 |
|
|
return pci_register_driver(&artop_pci_driver);
|
517 |
|
|
}
|
518 |
|
|
|
519 |
|
|
static void __exit artop_exit(void)
|
520 |
|
|
{
|
521 |
|
|
pci_unregister_driver(&artop_pci_driver);
|
522 |
|
|
}
|
523 |
|
|
|
524 |
|
|
module_init(artop_init);
|
525 |
|
|
module_exit(artop_exit);
|
526 |
|
|
|
527 |
|
|
MODULE_AUTHOR("Alan Cox");
|
528 |
|
|
MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA");
|
529 |
|
|
MODULE_LICENSE("GPL");
|
530 |
|
|
MODULE_DEVICE_TABLE(pci, artop_pci_tbl);
|
531 |
|
|
MODULE_VERSION(DRV_VERSION);
|
532 |
|
|
|