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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [ata/] [pata_cs5535.c] - Blame information for rev 65

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1 62 marcus.erl
/*
2
 * pata-cs5535.c        - CS5535 PATA for new ATA layer
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 *                        (C) 2005-2006 Red Hat Inc
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 *                        Alan Cox <alan@redhat.com>
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 *
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 * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
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 * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de
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 * and Alexander Kiausch <alex.kiausch@t-online.de>
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 *
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 * Loosely based on the piix & svwks drivers.
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 *
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 * Documentation:
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 *      Available from AMD web site.
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 * TODO
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 *      Review errata to see if serializing is necessary
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 */
30
 
31
#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <asm/msr.h>
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#define DRV_NAME        "cs5535"
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#define DRV_VERSION     "0.2.12"
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/*
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 *      The Geode (Aka Athlon GX now) uses an internal MSR based
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 *      bus system for control. Demented but there you go.
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 */
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49
#define MSR_ATAC_BASE           0x51300000
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#define ATAC_GLD_MSR_CAP        (MSR_ATAC_BASE+0)
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#define ATAC_GLD_MSR_CONFIG    (MSR_ATAC_BASE+0x01)
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#define ATAC_GLD_MSR_SMI       (MSR_ATAC_BASE+0x02)
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#define ATAC_GLD_MSR_ERROR     (MSR_ATAC_BASE+0x03)
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#define ATAC_GLD_MSR_PM        (MSR_ATAC_BASE+0x04)
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#define ATAC_GLD_MSR_DIAG      (MSR_ATAC_BASE+0x05)
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#define ATAC_IO_BAR            (MSR_ATAC_BASE+0x08)
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#define ATAC_RESET             (MSR_ATAC_BASE+0x10)
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#define ATAC_CH0D0_PIO         (MSR_ATAC_BASE+0x20)
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#define ATAC_CH0D0_DMA         (MSR_ATAC_BASE+0x21)
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#define ATAC_CH0D1_PIO         (MSR_ATAC_BASE+0x22)
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#define ATAC_CH0D1_DMA         (MSR_ATAC_BASE+0x23)
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#define ATAC_PCI_ABRTERR       (MSR_ATAC_BASE+0x24)
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64
#define ATAC_BM0_CMD_PRIM      0x00
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#define ATAC_BM0_STS_PRIM      0x02
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#define ATAC_BM0_PRD           0x04
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68
#define CS5535_CABLE_DETECT    0x48
69
 
70
#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 )
71
 
72
/**
73
 *      cs5535_cable_detect     -       detect cable type
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 *      @ap: Port to detect on
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 *      @deadline: deadline jiffies for the operation
76
 *
77
 *      Perform cable detection for ATA66 capable cable. Return a libata
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 *      cable type.
79
 */
80
 
81
static int cs5535_cable_detect(struct ata_port *ap)
82
{
83
        u8 cable;
84
        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
85
 
86
        pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
87
        if (cable & 1)
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                return ATA_CBL_PATA80;
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        else
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                return ATA_CBL_PATA40;
91
}
92
 
93
/**
94
 *      cs5535_set_piomode              -       PIO setup
95
 *      @ap: ATA interface
96
 *      @adev: device on the interface
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 *
98
 *      Set our PIO requirements. The CS5535 is pretty clean about all this
99
 */
100
 
101
static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
102
{
103
        static const u16 pio_timings[5] = {
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                0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
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        };
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        static const u16 pio_cmd_timings[5] = {
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                0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
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        };
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        u32 reg, dummy;
110
        struct ata_device *pair = ata_dev_pair(adev);
111
 
112
        int mode = adev->pio_mode - XFER_PIO_0;
113
        int cmdmode = mode;
114
 
115
        /* Command timing has to be for the lowest of the pair of devices */
116
        if (pair) {
117
                int pairmode = pair->pio_mode - XFER_PIO_0;
118
                cmdmode = min(mode, pairmode);
119
                /* Write the other drive timing register if it changed */
120
                if (cmdmode < pairmode)
121
                        wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno,
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                                pio_cmd_timings[cmdmode] << 16 | pio_timings[pairmode], 0);
123
        }
124
        /* Write the drive timing register */
125
        wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno,
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                pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0);
127
 
128
        /* Set the PIO "format 1" bit in the DMA timing register */
129
        rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
130
        wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0);
131
}
132
 
133
/**
134
 *      cs5535_set_dmamode              -       DMA timing setup
135
 *      @ap: ATA interface
136
 *      @adev: Device being configured
137
 *
138
 */
139
 
140
static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev)
141
{
142
        static const u32 udma_timings[5] = {
143
                0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
144
        };
145
        static const u32 mwdma_timings[3] = {
146
                0x7F0FFFF3, 0x7F035352, 0x7F024241
147
        };
148
        u32 reg, dummy;
149
        int mode = adev->dma_mode;
150
 
151
        rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
152
        reg &= 0x80000000UL;
153
        if (mode >= XFER_UDMA_0)
154
                reg |= udma_timings[mode - XFER_UDMA_0];
155
        else
156
                reg |= mwdma_timings[mode - XFER_MW_DMA_0];
157
        wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0);
158
}
159
 
160
static struct scsi_host_template cs5535_sht = {
161
        .module                 = THIS_MODULE,
162
        .name                   = DRV_NAME,
163
        .ioctl                  = ata_scsi_ioctl,
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        .queuecommand           = ata_scsi_queuecmd,
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        .can_queue              = ATA_DEF_QUEUE,
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        .this_id                = ATA_SHT_THIS_ID,
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        .sg_tablesize           = LIBATA_MAX_PRD,
168
        .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
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        .emulated               = ATA_SHT_EMULATED,
170
        .use_clustering         = ATA_SHT_USE_CLUSTERING,
171
        .proc_name              = DRV_NAME,
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        .dma_boundary           = ATA_DMA_BOUNDARY,
173
        .slave_configure        = ata_scsi_slave_config,
174
        .slave_destroy          = ata_scsi_slave_destroy,
175
        .bios_param             = ata_std_bios_param,
176
};
177
 
178
static struct ata_port_operations cs5535_port_ops = {
179
        .set_piomode    = cs5535_set_piomode,
180
        .set_dmamode    = cs5535_set_dmamode,
181
        .mode_filter    = ata_pci_default_filter,
182
 
183
        .tf_load        = ata_tf_load,
184
        .tf_read        = ata_tf_read,
185
        .check_status   = ata_check_status,
186
        .exec_command   = ata_exec_command,
187
        .dev_select     = ata_std_dev_select,
188
 
189
        .freeze         = ata_bmdma_freeze,
190
        .thaw           = ata_bmdma_thaw,
191
        .error_handler  = ata_bmdma_error_handler,
192
        .post_internal_cmd = ata_bmdma_post_internal_cmd,
193
        .cable_detect   = cs5535_cable_detect,
194
 
195
        .bmdma_setup    = ata_bmdma_setup,
196
        .bmdma_start    = ata_bmdma_start,
197
        .bmdma_stop     = ata_bmdma_stop,
198
        .bmdma_status   = ata_bmdma_status,
199
 
200
        .qc_prep        = ata_qc_prep,
201
        .qc_issue       = ata_qc_issue_prot,
202
 
203
        .data_xfer      = ata_data_xfer,
204
 
205
        .irq_handler    = ata_interrupt,
206
        .irq_clear      = ata_bmdma_irq_clear,
207
        .irq_on         = ata_irq_on,
208
 
209
        .port_start     = ata_sff_port_start,
210
};
211
 
212
/**
213
 *      cs5535_init_one         -       Initialise a CS5530
214
 *      @dev: PCI device
215
 *      @id: Entry in match table
216
 *
217
 *      Install a driver for the newly found CS5530 companion chip. Most of
218
 *      this is just housekeeping. We have to set the chip up correctly and
219
 *      turn off various bits of emulation magic.
220
 */
221
 
222
static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
223
{
224
        static const struct ata_port_info info = {
225
                .sht = &cs5535_sht,
226
                .flags = ATA_FLAG_SLAVE_POSS,
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                .pio_mask = 0x1f,
228
                .mwdma_mask = 0x07,
229
                .udma_mask = ATA_UDMA4,
230
                .port_ops = &cs5535_port_ops
231
        };
232
        const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
233
 
234
        u32 timings, dummy;
235
 
236
        /* Check the BIOS set the initial timing clock. If not set the
237
           timings for PIO0 */
238
        rdmsr(ATAC_CH0D0_PIO, timings, dummy);
239
        if (CS5535_BAD_PIO(timings))
240
                wrmsr(ATAC_CH0D0_PIO, 0xF7F4F7F4UL, 0);
241
        rdmsr(ATAC_CH0D1_PIO, timings, dummy);
242
        if (CS5535_BAD_PIO(timings))
243
                wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0);
244
        return ata_pci_init_one(dev, ppi);
245
}
246
 
247
static const struct pci_device_id cs5535[] = {
248
        { PCI_VDEVICE(NS, 0x002D), },
249
 
250
        { },
251
};
252
 
253
static struct pci_driver cs5535_pci_driver = {
254
        .name           = DRV_NAME,
255
        .id_table       = cs5535,
256
        .probe          = cs5535_init_one,
257
        .remove         = ata_pci_remove_one,
258
#ifdef CONFIG_PM
259
        .suspend        = ata_pci_device_suspend,
260
        .resume         = ata_pci_device_resume,
261
#endif
262
};
263
 
264
static int __init cs5535_init(void)
265
{
266
        return pci_register_driver(&cs5535_pci_driver);
267
}
268
 
269
static void __exit cs5535_exit(void)
270
{
271
        pci_unregister_driver(&cs5535_pci_driver);
272
}
273
 
274
MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch");
275
MODULE_DESCRIPTION("low-level driver for the NS/AMD 5530");
276
MODULE_LICENSE("GPL");
277
MODULE_DEVICE_TABLE(pci, cs5535);
278
MODULE_VERSION(DRV_VERSION);
279
 
280
module_init(cs5535_init);
281
module_exit(cs5535_exit);

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