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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [ata/] [pata_via.c] - Blame information for rev 62

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1 62 marcus.erl
/*
2
 * pata_via.c   - VIA PATA for new ATA layer
3
 *                        (C) 2005-2006 Red Hat Inc
4
 *                        Alan Cox <alan@redhat.com>
5
 *
6
 *  Documentation
7
 *      Most chipset documentation available under NDA only
8
 *
9
 *  VIA version guide
10
 *      VIA VT82C561    -       early design, uses ata_generic currently
11
 *      VIA VT82C576    -       MWDMA, 33Mhz
12
 *      VIA VT82C586    -       MWDMA, 33Mhz
13
 *      VIA VT82C586a   -       Added UDMA to 33Mhz
14
 *      VIA VT82C586b   -       UDMA33
15
 *      VIA VT82C596a   -       Nonfunctional UDMA66
16
 *      VIA VT82C596b   -       Working UDMA66
17
 *      VIA VT82C686    -       Nonfunctional UDMA66
18
 *      VIA VT82C686a   -       Working UDMA66
19
 *      VIA VT82C686b   -       Updated to UDMA100
20
 *      VIA VT8231      -       UDMA100
21
 *      VIA VT8233      -       UDMA100
22
 *      VIA VT8233a     -       UDMA133
23
 *      VIA VT8233c     -       UDMA100
24
 *      VIA VT8235      -       UDMA133
25
 *      VIA VT8237      -       UDMA133
26
 *      VIA VT8237S     -       UDMA133
27
 *      VIA VT8251      -       UDMA133
28
 *
29
 *      Most registers remain compatible across chips. Others start reserved
30
 *      and acquire sensible semantics if set to 1 (eg cable detect). A few
31
 *      exceptions exist, notably around the FIFO settings.
32
 *
33
 *      One additional quirk of the VIA design is that like ALi they use few
34
 *      PCI IDs for a lot of chips.
35
 *
36
 *      Based heavily on:
37
 *
38
 * Version 3.38
39
 *
40
 * VIA IDE driver for Linux. Supported southbridges:
41
 *
42
 *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
43
 *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
44
 *   vt8235, vt8237
45
 *
46
 * Copyright (c) 2000-2002 Vojtech Pavlik
47
 *
48
 * Based on the work of:
49
 *      Michel Aubry
50
 *      Jeff Garzik
51
 *      Andre Hedrick
52
 
53
 */
54
 
55
#include <linux/kernel.h>
56
#include <linux/module.h>
57
#include <linux/pci.h>
58
#include <linux/init.h>
59
#include <linux/blkdev.h>
60
#include <linux/delay.h>
61
#include <scsi/scsi_host.h>
62
#include <linux/libata.h>
63
#include <linux/dmi.h>
64
 
65
#define DRV_NAME "pata_via"
66
#define DRV_VERSION "0.3.3"
67
 
68
/*
69
 *      The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
70
 *      driver.
71
 */
72
 
73
enum {
74
        VIA_UDMA        = 0x007,
75
        VIA_UDMA_NONE   = 0x000,
76
        VIA_UDMA_33     = 0x001,
77
        VIA_UDMA_66     = 0x002,
78
        VIA_UDMA_100    = 0x003,
79
        VIA_UDMA_133    = 0x004,
80
        VIA_BAD_PREQ    = 0x010, /* Crashes if PREQ# till DDACK# set */
81
        VIA_BAD_CLK66   = 0x020, /* 66 MHz clock doesn't work correctly */
82
        VIA_SET_FIFO    = 0x040, /* Needs to have FIFO split set */
83
        VIA_NO_UNMASK   = 0x080, /* Doesn't work with IRQ unmasking on */
84
        VIA_BAD_ID      = 0x100, /* Has wrong vendor ID (0x1107) */
85
        VIA_BAD_AST     = 0x200, /* Don't touch Address Setup Timing */
86
        VIA_NO_ENABLES  = 0x400, /* Has no enablebits */
87
};
88
 
89
/*
90
 * VIA SouthBridge chips.
91
 */
92
 
93
static const struct via_isa_bridge {
94
        const char *name;
95
        u16 id;
96
        u8 rev_min;
97
        u8 rev_max;
98
        u16 flags;
99
} via_isa_bridges[] = {
100
        { "vx800",      PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
101
        { "vt8237s",    PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
102
        { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
103
        { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
104
        { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
105
        { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
106
        { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
107
        { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
108
        { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
109
        { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, VIA_UDMA_100 },
110
        { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, VIA_UDMA_100 },
111
        { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, VIA_UDMA_100 },
112
        { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, VIA_UDMA_100 },
113
        { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, VIA_UDMA_66 },
114
        { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
115
        { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, VIA_UDMA_66 },
116
        { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
117
        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
118
        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
119
        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
120
        { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
121
        { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
122
        { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
123
        { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
124
        { NULL }
125
};
126
 
127
 
128
/*
129
 *      Cable special cases
130
 */
131
 
132
static const struct dmi_system_id cable_dmi_table[] = {
133
        {
134
                .ident = "Acer Ferrari 3400",
135
                .matches = {
136
                        DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
137
                        DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
138
                },
139
        },
140
        { }
141
};
142
 
143
static int via_cable_override(struct pci_dev *pdev)
144
{
145
        /* Systems by DMI */
146
        if (dmi_check_system(cable_dmi_table))
147
                return 1;
148
        /* Arima W730-K8/Targa Visionary 811/... */
149
        if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
150
                return 1;
151
        return 0;
152
}
153
 
154
 
155
/**
156
 *      via_cable_detect        -       cable detection
157
 *      @ap: ATA port
158
 *
159
 *      Perform cable detection. Actually for the VIA case the BIOS
160
 *      already did this for us. We read the values provided by the
161
 *      BIOS. If you are using an 8235 in a non-PC configuration you
162
 *      may need to update this code.
163
 *
164
 *      Hotplug also impacts on this.
165
 */
166
 
167
static int via_cable_detect(struct ata_port *ap) {
168
        const struct via_isa_bridge *config = ap->host->private_data;
169
        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
170
        u32 ata66;
171
 
172
        if (via_cable_override(pdev))
173
                return ATA_CBL_PATA40_SHORT;
174
 
175
        /* Early chips are 40 wire */
176
        if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
177
                return ATA_CBL_PATA40;
178
        /* UDMA 66 chips have only drive side logic */
179
        else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
180
                return ATA_CBL_PATA_UNK;
181
        /* UDMA 100 or later */
182
        pci_read_config_dword(pdev, 0x50, &ata66);
183
        /* Check both the drive cable reporting bits, we might not have
184
           two drives */
185
        if (ata66 & (0x10100000 >> (16 * ap->port_no)))
186
                return ATA_CBL_PATA80;
187
        /* Check with ACPI so we can spot BIOS reported SATA bridges */
188
        if (ata_acpi_cbl_80wire(ap))
189
                return ATA_CBL_PATA80;
190
        return ATA_CBL_PATA40;
191
}
192
 
193
static int via_pre_reset(struct ata_link *link, unsigned long deadline)
194
{
195
        struct ata_port *ap = link->ap;
196
        const struct via_isa_bridge *config = ap->host->private_data;
197
 
198
        if (!(config->flags & VIA_NO_ENABLES)) {
199
                static const struct pci_bits via_enable_bits[] = {
200
                        { 0x40, 1, 0x02, 0x02 },
201
                        { 0x40, 1, 0x01, 0x01 }
202
                };
203
                struct pci_dev *pdev = to_pci_dev(ap->host->dev);
204
                if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
205
                        return -ENOENT;
206
        }
207
 
208
        return ata_std_prereset(link, deadline);
209
}
210
 
211
 
212
/**
213
 *      via_error_handler               -       reset for VIA chips
214
 *      @ap: ATA port
215
 *
216
 *      Handle the reset callback for the later chips with cable detect
217
 */
218
 
219
static void via_error_handler(struct ata_port *ap)
220
{
221
        ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
222
}
223
 
224
/**
225
 *      via_do_set_mode -       set initial PIO mode data
226
 *      @ap: ATA interface
227
 *      @adev: ATA device
228
 *      @mode: ATA mode being programmed
229
 *      @tdiv: Clocks per PCI clock
230
 *      @set_ast: Set to program address setup
231
 *      @udma_type: UDMA mode/format of registers
232
 *
233
 *      Program the VIA registers for DMA and PIO modes. Uses the ata timing
234
 *      support in order to compute modes.
235
 *
236
 *      FIXME: Hotplug will require we serialize multiple mode changes
237
 *      on the two channels.
238
 */
239
 
240
static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
241
{
242
        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
243
        struct ata_device *peer = ata_dev_pair(adev);
244
        struct ata_timing t, p;
245
        static int via_clock = 33333;   /* Bus clock in kHZ - ought to be tunable one day */
246
        unsigned long T =  1000000000 / via_clock;
247
        unsigned long UT = T/tdiv;
248
        int ut;
249
        int offset = 3 - (2*ap->port_no) - adev->devno;
250
 
251
        /* Calculate the timing values we require */
252
        ata_timing_compute(adev, mode, &t, T, UT);
253
 
254
        /* We share 8bit timing so we must merge the constraints */
255
        if (peer) {
256
                if (peer->pio_mode) {
257
                        ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
258
                        ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
259
                }
260
        }
261
 
262
        /* Address setup is programmable but breaks on UDMA133 setups */
263
        if (set_ast) {
264
                u8 setup;       /* 2 bits per drive */
265
                int shift = 2 * offset;
266
 
267
                pci_read_config_byte(pdev, 0x4C, &setup);
268
                setup &= ~(3 << shift);
269
                setup |= FIT(t.setup, 1, 4) << shift;   /* 1,4 or 1,4 - 1  FIXME */
270
                pci_write_config_byte(pdev, 0x4C, setup);
271
        }
272
 
273
        /* Load the PIO mode bits */
274
        pci_write_config_byte(pdev, 0x4F - ap->port_no,
275
                ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1));
276
        pci_write_config_byte(pdev, 0x48 + offset,
277
                ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1));
278
 
279
        /* Load the UDMA bits according to type */
280
        switch(udma_type) {
281
                default:
282
                        /* BUG() ? */
283
                        /* fall through */
284
                case 33:
285
                        ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03;
286
                        break;
287
                case 66:
288
                        ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f;
289
                        break;
290
                case 100:
291
                        ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
292
                        break;
293
                case 133:
294
                        ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
295
                        break;
296
        }
297
 
298
        /* Set UDMA unless device is not UDMA capable */
299
        if (udma_type && t.udma) {
300
                u8 cable80_status;
301
 
302
                /* Get 80-wire cable detection bit */
303
                pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
304
                cable80_status &= 0x10;
305
 
306
                pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
307
        }
308
}
309
 
310
static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
311
{
312
        const struct via_isa_bridge *config = ap->host->private_data;
313
        int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
314
        int mode = config->flags & VIA_UDMA;
315
        static u8 tclock[5] = { 1, 1, 2, 3, 4 };
316
        static u8 udma[5] = { 0, 33, 66, 100, 133 };
317
 
318
        via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
319
}
320
 
321
static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
322
{
323
        const struct via_isa_bridge *config = ap->host->private_data;
324
        int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
325
        int mode = config->flags & VIA_UDMA;
326
        static u8 tclock[5] = { 1, 1, 2, 3, 4 };
327
        static u8 udma[5] = { 0, 33, 66, 100, 133 };
328
 
329
        via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
330
}
331
 
332
static struct scsi_host_template via_sht = {
333
        .module                 = THIS_MODULE,
334
        .name                   = DRV_NAME,
335
        .ioctl                  = ata_scsi_ioctl,
336
        .queuecommand           = ata_scsi_queuecmd,
337
        .can_queue              = ATA_DEF_QUEUE,
338
        .this_id                = ATA_SHT_THIS_ID,
339
        .sg_tablesize           = LIBATA_MAX_PRD,
340
        .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
341
        .emulated               = ATA_SHT_EMULATED,
342
        .use_clustering         = ATA_SHT_USE_CLUSTERING,
343
        .proc_name              = DRV_NAME,
344
        .dma_boundary           = ATA_DMA_BOUNDARY,
345
        .slave_configure        = ata_scsi_slave_config,
346
        .slave_destroy          = ata_scsi_slave_destroy,
347
        .bios_param             = ata_std_bios_param,
348
};
349
 
350
static struct ata_port_operations via_port_ops = {
351
        .set_piomode    = via_set_piomode,
352
        .set_dmamode    = via_set_dmamode,
353
        .mode_filter    = ata_pci_default_filter,
354
 
355
        .tf_load        = ata_tf_load,
356
        .tf_read        = ata_tf_read,
357
        .check_status   = ata_check_status,
358
        .exec_command   = ata_exec_command,
359
        .dev_select     = ata_std_dev_select,
360
 
361
        .freeze         = ata_bmdma_freeze,
362
        .thaw           = ata_bmdma_thaw,
363
        .error_handler  = via_error_handler,
364
        .post_internal_cmd = ata_bmdma_post_internal_cmd,
365
        .cable_detect   = via_cable_detect,
366
 
367
        .bmdma_setup    = ata_bmdma_setup,
368
        .bmdma_start    = ata_bmdma_start,
369
        .bmdma_stop     = ata_bmdma_stop,
370
        .bmdma_status   = ata_bmdma_status,
371
 
372
        .qc_prep        = ata_qc_prep,
373
        .qc_issue       = ata_qc_issue_prot,
374
 
375
        .data_xfer      = ata_data_xfer,
376
 
377
        .irq_handler    = ata_interrupt,
378
        .irq_clear      = ata_bmdma_irq_clear,
379
        .irq_on         = ata_irq_on,
380
 
381
        .port_start     = ata_sff_port_start,
382
};
383
 
384
static struct ata_port_operations via_port_ops_noirq = {
385
        .set_piomode    = via_set_piomode,
386
        .set_dmamode    = via_set_dmamode,
387
        .mode_filter    = ata_pci_default_filter,
388
 
389
        .tf_load        = ata_tf_load,
390
        .tf_read        = ata_tf_read,
391
        .check_status   = ata_check_status,
392
        .exec_command   = ata_exec_command,
393
        .dev_select     = ata_std_dev_select,
394
 
395
        .freeze         = ata_bmdma_freeze,
396
        .thaw           = ata_bmdma_thaw,
397
        .error_handler  = via_error_handler,
398
        .post_internal_cmd = ata_bmdma_post_internal_cmd,
399
        .cable_detect   = via_cable_detect,
400
 
401
        .bmdma_setup    = ata_bmdma_setup,
402
        .bmdma_start    = ata_bmdma_start,
403
        .bmdma_stop     = ata_bmdma_stop,
404
        .bmdma_status   = ata_bmdma_status,
405
 
406
        .qc_prep        = ata_qc_prep,
407
        .qc_issue       = ata_qc_issue_prot,
408
 
409
        .data_xfer      = ata_data_xfer_noirq,
410
 
411
        .irq_handler    = ata_interrupt,
412
        .irq_clear      = ata_bmdma_irq_clear,
413
        .irq_on         = ata_irq_on,
414
 
415
        .port_start     = ata_sff_port_start,
416
};
417
 
418
/**
419
 *      via_config_fifo         -       set up the FIFO
420
 *      @pdev: PCI device
421
 *      @flags: configuration flags
422
 *
423
 *      Set the FIFO properties for this device if necessary. Used both on
424
 *      set up and on and the resume path
425
 */
426
 
427
static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
428
{
429
        u8 enable;
430
 
431
        /* 0x40 low bits indicate enabled channels */
432
        pci_read_config_byte(pdev, 0x40 , &enable);
433
        enable &= 3;
434
 
435
        if (flags & VIA_SET_FIFO) {
436
                static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
437
                u8 fifo;
438
 
439
                pci_read_config_byte(pdev, 0x43, &fifo);
440
 
441
                /* Clear PREQ# until DDACK# for errata */
442
                if (flags & VIA_BAD_PREQ)
443
                        fifo &= 0x7F;
444
                else
445
                        fifo &= 0x9f;
446
                /* Turn on FIFO for enabled channels */
447
                fifo |= fifo_setting[enable];
448
                pci_write_config_byte(pdev, 0x43, fifo);
449
        }
450
}
451
 
452
/**
453
 *      via_init_one            -       discovery callback
454
 *      @pdev: PCI device
455
 *      @id: PCI table info
456
 *
457
 *      A VIA IDE interface has been discovered. Figure out what revision
458
 *      and perform configuration work before handing it to the ATA layer
459
 */
460
 
461
static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
462
{
463
        /* Early VIA without UDMA support */
464
        static const struct ata_port_info via_mwdma_info = {
465
                .sht = &via_sht,
466
                .flags = ATA_FLAG_SLAVE_POSS,
467
                .pio_mask = 0x1f,
468
                .mwdma_mask = 0x07,
469
                .port_ops = &via_port_ops
470
        };
471
        /* Ditto with IRQ masking required */
472
        static const struct ata_port_info via_mwdma_info_borked = {
473
                .sht = &via_sht,
474
                .flags = ATA_FLAG_SLAVE_POSS,
475
                .pio_mask = 0x1f,
476
                .mwdma_mask = 0x07,
477
                .port_ops = &via_port_ops_noirq,
478
        };
479
        /* VIA UDMA 33 devices (and borked 66) */
480
        static const struct ata_port_info via_udma33_info = {
481
                .sht = &via_sht,
482
                .flags = ATA_FLAG_SLAVE_POSS,
483
                .pio_mask = 0x1f,
484
                .mwdma_mask = 0x07,
485
                .udma_mask = ATA_UDMA2,
486
                .port_ops = &via_port_ops
487
        };
488
        /* VIA UDMA 66 devices */
489
        static const struct ata_port_info via_udma66_info = {
490
                .sht = &via_sht,
491
                .flags = ATA_FLAG_SLAVE_POSS,
492
                .pio_mask = 0x1f,
493
                .mwdma_mask = 0x07,
494
                .udma_mask = ATA_UDMA4,
495
                .port_ops = &via_port_ops
496
        };
497
        /* VIA UDMA 100 devices */
498
        static const struct ata_port_info via_udma100_info = {
499
                .sht = &via_sht,
500
                .flags = ATA_FLAG_SLAVE_POSS,
501
                .pio_mask = 0x1f,
502
                .mwdma_mask = 0x07,
503
                .udma_mask = ATA_UDMA5,
504
                .port_ops = &via_port_ops
505
        };
506
        /* UDMA133 with bad AST (All current 133) */
507
        static const struct ata_port_info via_udma133_info = {
508
                .sht = &via_sht,
509
                .flags = ATA_FLAG_SLAVE_POSS,
510
                .pio_mask = 0x1f,
511
                .mwdma_mask = 0x07,
512
                .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
513
                .port_ops = &via_port_ops
514
        };
515
        struct ata_port_info type;
516
        const struct ata_port_info *ppi[] = { &type, NULL };
517
        struct pci_dev *isa = NULL;
518
        const struct via_isa_bridge *config;
519
        static int printed_version;
520
        u8 enable;
521
        u32 timing;
522
 
523
        if (!printed_version++)
524
                dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
525
 
526
        /* To find out how the IDE will behave and what features we
527
           actually have to look at the bridge not the IDE controller */
528
        for (config = via_isa_bridges; config->id; config++)
529
                if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
530
                        !!(config->flags & VIA_BAD_ID),
531
                        config->id, NULL))) {
532
 
533
                        if (isa->revision >= config->rev_min &&
534
                            isa->revision <= config->rev_max)
535
                                break;
536
                        pci_dev_put(isa);
537
                }
538
 
539
        if (!config->id) {
540
                printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
541
                return -ENODEV;
542
        }
543
        pci_dev_put(isa);
544
 
545
        /* 0x40 low bits indicate enabled channels */
546
        pci_read_config_byte(pdev, 0x40 , &enable);
547
        enable &= 3;
548
        if (enable == 0) {
549
                return -ENODEV;
550
        }
551
 
552
        /* Initialise the FIFO for the enabled channels. */
553
        via_config_fifo(pdev, config->flags);
554
 
555
        /* Clock set up */
556
        switch(config->flags & VIA_UDMA) {
557
                case VIA_UDMA_NONE:
558
                        if (config->flags & VIA_NO_UNMASK)
559
                                type = via_mwdma_info_borked;
560
                        else
561
                                type = via_mwdma_info;
562
                        break;
563
                case VIA_UDMA_33:
564
                        type = via_udma33_info;
565
                        break;
566
                case VIA_UDMA_66:
567
                        type = via_udma66_info;
568
                        /* The 66 MHz devices require we enable the clock */
569
                        pci_read_config_dword(pdev, 0x50, &timing);
570
                        timing |= 0x80008;
571
                        pci_write_config_dword(pdev, 0x50, timing);
572
                        break;
573
                case VIA_UDMA_100:
574
                        type = via_udma100_info;
575
                        break;
576
                case VIA_UDMA_133:
577
                        type = via_udma133_info;
578
                        break;
579
                default:
580
                        WARN_ON(1);
581
                        return -ENODEV;
582
        }
583
 
584
        if (config->flags & VIA_BAD_CLK66) {
585
                /* Disable the 66MHz clock on problem devices */
586
                pci_read_config_dword(pdev, 0x50, &timing);
587
                timing &= ~0x80008;
588
                pci_write_config_dword(pdev, 0x50, timing);
589
        }
590
 
591
        /* We have established the device type, now fire it up */
592
        type.private_data = (void *)config;
593
 
594
        return ata_pci_init_one(pdev, ppi);
595
}
596
 
597
#ifdef CONFIG_PM
598
/**
599
 *      via_reinit_one          -       reinit after resume
600
 *      @pdev; PCI device
601
 *
602
 *      Called when the VIA PATA device is resumed. We must then
603
 *      reconfigure the fifo and other setup we may have altered. In
604
 *      addition the kernel needs to have the resume methods on PCI
605
 *      quirk supported.
606
 */
607
 
608
static int via_reinit_one(struct pci_dev *pdev)
609
{
610
        u32 timing;
611
        struct ata_host *host = dev_get_drvdata(&pdev->dev);
612
        const struct via_isa_bridge *config = host->private_data;
613
 
614
        via_config_fifo(pdev, config->flags);
615
 
616
        if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
617
                /* The 66 MHz devices require we enable the clock */
618
                pci_read_config_dword(pdev, 0x50, &timing);
619
                timing |= 0x80008;
620
                pci_write_config_dword(pdev, 0x50, timing);
621
        }
622
        if (config->flags & VIA_BAD_CLK66) {
623
                /* Disable the 66MHz clock on problem devices */
624
                pci_read_config_dword(pdev, 0x50, &timing);
625
                timing &= ~0x80008;
626
                pci_write_config_dword(pdev, 0x50, timing);
627
        }
628
        return ata_pci_device_resume(pdev);
629
}
630
#endif
631
 
632
static const struct pci_device_id via[] = {
633
        { PCI_VDEVICE(VIA, 0x0571), },
634
        { PCI_VDEVICE(VIA, 0x0581), },
635
        { PCI_VDEVICE(VIA, 0x1571), },
636
        { PCI_VDEVICE(VIA, 0x3164), },
637
        { PCI_VDEVICE(VIA, 0x5324), },
638
 
639
        { },
640
};
641
 
642
static struct pci_driver via_pci_driver = {
643
        .name           = DRV_NAME,
644
        .id_table       = via,
645
        .probe          = via_init_one,
646
        .remove         = ata_pci_remove_one,
647
#ifdef CONFIG_PM
648
        .suspend        = ata_pci_device_suspend,
649
        .resume         = via_reinit_one,
650
#endif
651
};
652
 
653
static int __init via_init(void)
654
{
655
        return pci_register_driver(&via_pci_driver);
656
}
657
 
658
static void __exit via_exit(void)
659
{
660
        pci_unregister_driver(&via_pci_driver);
661
}
662
 
663
MODULE_AUTHOR("Alan Cox");
664
MODULE_DESCRIPTION("low-level driver for VIA PATA");
665
MODULE_LICENSE("GPL");
666
MODULE_DEVICE_TABLE(pci, via);
667
MODULE_VERSION(DRV_VERSION);
668
 
669
module_init(via_init);
670
module_exit(via_exit);

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