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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [atm/] [eni.h] - Blame information for rev 62

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1 62 marcus.erl
/* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
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/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
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#ifndef DRIVER_ATM_ENI_H
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#define DRIVER_ATM_ENI_H
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#include <linux/atm.h>
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#include <linux/atmdev.h>
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#include <linux/sonet.h>
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#include <linux/skbuff.h>
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#include <linux/time.h>
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#include <linux/pci.h>
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#include <linux/spinlock.h>
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#include <asm/atomic.h>
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#include "midway.h"
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#define KERNEL_OFFSET   0xC0000000      /* kernel 0x0 is at phys 0xC0000000 */
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#define DEV_LABEL       "eni"
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#define UBR_BUFFER      (128*1024)      /* UBR buffer size */
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#define RX_DMA_BUF        8             /* burst and skip a few things */
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#define TX_DMA_BUF      100             /* should be enough for 64 kB */
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#define DEFAULT_RX_MULT 300             /* max_sdu*3 */
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#define DEFAULT_TX_MULT 300             /* max_sdu*3 */
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#define ENI_ZEROES_SIZE   4             /* need that many DMA-able zero bytes */
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struct eni_free {
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        void __iomem *start;            /* counting in bytes */
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        int order;
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};
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struct eni_tx {
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        void __iomem *send;             /* base, 0 if unused */
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        int prescaler;                  /* shaping prescaler */
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        int resolution;                 /* shaping divider */
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        unsigned long tx_pos;           /* current TX write position */
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        unsigned long words;            /* size of TX queue */
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        int index;                      /* TX channel number */
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        int reserved;                   /* reserved peak cell rate */
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        int shaping;                    /* shaped peak cell rate */
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        struct sk_buff_head backlog;    /* queue of waiting TX buffers */
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};
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struct eni_vcc {
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        int (*rx)(struct atm_vcc *vcc); /* RX function, NULL if none */
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        void __iomem *recv;             /* receive buffer */
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        unsigned long words;            /* its size in words */
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        unsigned long descr;            /* next descriptor (RX) */
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        unsigned long rx_pos;           /* current RX descriptor pos */
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        struct eni_tx *tx;              /* TXer, NULL if none */
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        int rxing;                      /* number of pending PDUs */
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        int servicing;                  /* number of waiting VCs (0 or 1) */
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        int txing;                      /* number of pending TX bytes */
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        ktime_t timestamp;              /* for RX timing */
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        struct atm_vcc *next;           /* next pending RX */
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        struct sk_buff *last;           /* last PDU being DMAed (used to carry
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                                           discard information) */
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};
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struct eni_dev {
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        /*-------------------------------- spinlock */
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        spinlock_t lock;                /* sync with interrupt */
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        struct tasklet_struct task;     /* tasklet for interrupt work */
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        u32 events;                     /* pending events */
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        /*-------------------------------- base pointers into Midway address
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                                           space */
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        void __iomem *phy;              /* PHY interface chip registers */
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        void __iomem *reg;              /* register base */
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        void __iomem *ram;              /* RAM base */
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        void __iomem *vci;              /* VCI table */
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        void __iomem *rx_dma;           /* RX DMA queue */
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        void __iomem *tx_dma;           /* TX DMA queue */
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        void __iomem *service;          /* service list */
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        /*-------------------------------- TX part */
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        struct eni_tx tx[NR_CHAN];      /* TX channels */
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        struct eni_tx *ubr;             /* UBR channel */
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        struct sk_buff_head tx_queue;   /* PDUs currently being TX DMAed*/
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        wait_queue_head_t tx_wait;      /* for close */
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        int tx_bw;                      /* remaining bandwidth */
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        u32 dma[TX_DMA_BUF*2];          /* DMA request scratch area */
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        int tx_mult;                    /* buffer size multiplier (percent) */
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        /*-------------------------------- RX part */
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        u32 serv_read;                  /* host service read index */
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        struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */
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        struct atm_vcc *slow,*last_slow;
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        struct atm_vcc **rx_map;        /* for fast lookups */
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        struct sk_buff_head rx_queue;   /* PDUs currently being RX-DMAed */
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        wait_queue_head_t rx_wait;      /* for close */
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        int rx_mult;                    /* buffer size multiplier (percent) */
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        /*-------------------------------- statistics */
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        unsigned long lost;             /* number of lost cells (RX) */
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        /*-------------------------------- memory management */
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        unsigned long base_diff;        /* virtual-real base address */
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        int free_len;                   /* free list length */
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        struct eni_free *free_list;     /* free list */
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        int free_list_size;             /* maximum size of free list */
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        /*-------------------------------- ENI links */
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        struct atm_dev *more;           /* other ENI devices */
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        /*-------------------------------- general information */
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        int mem;                        /* RAM on board (in bytes) */
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        int asic;                       /* PCI interface type, 0 for FPGA */
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        unsigned int irq;               /* IRQ */
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        struct pci_dev *pci_dev;        /* PCI stuff */
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};
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#define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data)
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#define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data)
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struct eni_skb_prv {
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        struct atm_skb_data _;          /* reserved */
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        unsigned long pos;              /* position of next descriptor */
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        int size;                       /* PDU size in reassembly buffer */
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        dma_addr_t paddr;               /* DMA handle */
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};
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#define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size)
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#define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos)
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#define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr)
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#endif

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