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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [isdn/] [hardware/] [eicon/] [pc_maint.h] - Blame information for rev 62

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Line No. Rev Author Line
1 62 marcus.erl
 
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/*
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 *
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  Copyright (c) Eicon Networks, 2002.
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 *
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  This source file is supplied for the use with
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  Eicon Networks range of DIVA Server Adapters.
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 *
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  Eicon File Revision :    2.1
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 *
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  This program is free software; you can redistribute it and/or modify
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  it under the terms of the GNU General Public License as published by
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  the Free Software Foundation; either version 2, or (at your option)
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  any later version.
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 *
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  This program is distributed in the hope that it will be useful,
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  but WITHOUT ANY WARRANTY OF ANY KIND WHATSOEVER INCLUDING ANY
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  implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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  See the GNU General Public License for more details.
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 *
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  You should have received a copy of the GNU General Public License
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  along with this program; if not, write to the Free Software
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  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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 *
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 */
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#ifdef PLATFORM_GT_32BIT
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/* #define POINTER_32BIT byte * __ptr32 */
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#define POINTER_32BIT dword 
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#else
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#define POINTER_32BIT byte *
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#endif
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#if !defined(MIPS_SCOM)
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#define BUFFER_SZ  48
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#define MAINT_OFFS 0x380
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#else
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#define BUFFER_SZ  128
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#if defined(PRI)
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#define MAINT_OFFS 0xef00
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#else
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#define MAINT_OFFS 0xff00
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#endif
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#endif
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#define MIPS_BUFFER_SZ  128
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#if defined(PRI)
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#define MIPS_MAINT_OFFS 0xef00
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#else
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#define MIPS_MAINT_OFFS 0xff00
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#endif
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#define LOG                     1
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#define MEMR                    2
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#define MEMW                    3
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#define IOR                     4
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#define IOW                     5
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#define B1TEST                  6
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#define B2TEST                  7
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#define BTESTOFF                8
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#define DSIG_STATS              9
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#define B_CH_STATS              10
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#define D_CH_STATS              11
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#define BL1_STATS               12
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#define BL1_STATS_C             13
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#define GET_VERSION             14
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#define OS_STATS                15
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#define XLOG_SET_MASK           16
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#define XLOG_GET_MASK           17
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#define DSP_READ                20
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#define DSP_WRITE               21
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#define OK 0xff
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#define MORE_EVENTS 0xfe
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#define NO_EVENT 1
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struct DSigStruc
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{
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  byte Id;
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  byte u;
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  byte listen;
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  byte active;
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  byte sin[3];
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  byte bc[6];
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  byte llc[6];
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  byte hlc[6];
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  byte oad[20];
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};
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struct BL1Struc {
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  dword cx_b1;
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  dword cx_b2;
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  dword cr_b1;
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  dword cr_b2;
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  dword px_b1;
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  dword px_b2;
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  dword pr_b1;
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  dword pr_b2;
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  word er_b1;
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  word er_b2;
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};
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struct L2Struc {
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  dword XTotal;
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  dword RTotal;
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  word XError;
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  word RError;
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};
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struct OSStruc {
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  dword free_n;
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};
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typedef union
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{
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  struct DSigStruc DSigStats;
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  struct BL1Struc BL1Stats;
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  struct L2Struc L2Stats;
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  struct OSStruc OSStats;
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  byte   b[BUFFER_SZ];
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  word   w[BUFFER_SZ>>1];
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  word   l[BUFFER_SZ>>2]; /* word is wrong, do not use! Use 'd' instead. */
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  dword  d[BUFFER_SZ>>2];
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} BUFFER;
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typedef union
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{
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  struct DSigStruc DSigStats;
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  struct BL1Struc BL1Stats;
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  struct L2Struc L2Stats;
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  struct OSStruc OSStats;
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  byte   b[MIPS_BUFFER_SZ];
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  word   w[MIPS_BUFFER_SZ>>1];
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  word   l[BUFFER_SZ>>2]; /* word is wrong, do not use! Use 'd' instead. */
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  dword  d[MIPS_BUFFER_SZ>>2];
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} MIPS_BUFFER;
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#if !defined(MIPS_SCOM)
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struct pc_maint
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{
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  byte req;
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  byte rc;
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  POINTER_32BIT mem;
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  short length;
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  word port;
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  byte fill[6];
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  BUFFER data;
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};
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#else
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struct pc_maint
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{
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  byte req;
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  byte rc;
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  byte reserved[2];     /* R3000 alignment ... */
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  POINTER_32BIT mem;
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  short length;
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  word port;
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  byte fill[4];         /* data at offset 16   */
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  BUFFER data;
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};
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#endif
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struct mi_pc_maint
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{
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  byte req;
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  byte rc;
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  byte reserved[2];     /* R3000 alignment ... */
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  POINTER_32BIT mem;
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  short length;
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  word port;
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  byte fill[4];         /* data at offset 16   */
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  MIPS_BUFFER data;
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};

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