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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [mfd/] [mcp-sa11x0.c] - Blame information for rev 78

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Line No. Rev Author Line
1 62 marcus.erl
/*
2
 *  linux/drivers/mfd/mcp-sa11x0.c
3
 *
4
 *  Copyright (C) 2001-2005 Russell King
5
 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License.
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 *
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 *  SA11x0 MCP (Multimedia Communications Port) driver.
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 *
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 *  MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
13
 */
14
#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
22
 
23
#include <asm/dma.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/system.h>
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#include <asm/arch/mcp.h>
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#include <asm/arch/assabet.h>
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#include "mcp.h"
32
 
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struct mcp_sa11x0 {
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        u32     mccr0;
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        u32     mccr1;
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};
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#define priv(mcp)       ((struct mcp_sa11x0 *)mcp_priv(mcp))
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40
static void
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mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
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{
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        unsigned int mccr0;
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        divisor /= 32;
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        mccr0 = Ser4MCCR0 & ~0x00007f00;
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        mccr0 |= divisor << 8;
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        Ser4MCCR0 = mccr0;
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}
51
 
52
static void
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mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
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{
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        unsigned int mccr0;
56
 
57
        divisor /= 32;
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        mccr0 = Ser4MCCR0 & ~0x0000007f;
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        mccr0 |= divisor;
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        Ser4MCCR0 = mccr0;
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}
63
 
64
/*
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 * Write data to the device.  The bit should be set after 3 subframe
66
 * times (each frame is 64 clocks).  We wait a maximum of 6 subframes.
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 * We really should try doing something more productive while we
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 * wait.
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 */
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static void
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mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
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{
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        int ret = -ETIME;
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        int i;
75
 
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        Ser4MCDR2 = reg << 17 | MCDR2_Wr | (val & 0xffff);
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        for (i = 0; i < 2; i++) {
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                udelay(mcp->rw_timeout);
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                if (Ser4MCSR & MCSR_CWC) {
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                        ret = 0;
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                        break;
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                }
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        }
85
 
86
        if (ret < 0)
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                printk(KERN_WARNING "mcp: write timed out\n");
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}
89
 
90
/*
91
 * Read data from the device.  The bit should be set after 3 subframe
92
 * times (each frame is 64 clocks).  We wait a maximum of 6 subframes.
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 * We really should try doing something more productive while we
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 * wait.
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 */
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static unsigned int
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mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
98
{
99
        int ret = -ETIME;
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        int i;
101
 
102
        Ser4MCDR2 = reg << 17 | MCDR2_Rd;
103
 
104
        for (i = 0; i < 2; i++) {
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                udelay(mcp->rw_timeout);
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                if (Ser4MCSR & MCSR_CRC) {
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                        ret = Ser4MCDR2 & 0xffff;
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                        break;
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                }
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        }
111
 
112
        if (ret < 0)
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                printk(KERN_WARNING "mcp: read timed out\n");
114
 
115
        return ret;
116
}
117
 
118
static void mcp_sa11x0_enable(struct mcp *mcp)
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{
120
        Ser4MCSR = -1;
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        Ser4MCCR0 |= MCCR0_MCE;
122
}
123
 
124
static void mcp_sa11x0_disable(struct mcp *mcp)
125
{
126
        Ser4MCCR0 &= ~MCCR0_MCE;
127
}
128
 
129
/*
130
 * Our methods.
131
 */
132
static struct mcp_ops mcp_sa11x0 = {
133
        .set_telecom_divisor    = mcp_sa11x0_set_telecom_divisor,
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        .set_audio_divisor      = mcp_sa11x0_set_audio_divisor,
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        .reg_write              = mcp_sa11x0_write,
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        .reg_read               = mcp_sa11x0_read,
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        .enable                 = mcp_sa11x0_enable,
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        .disable                = mcp_sa11x0_disable,
139
};
140
 
141
static int mcp_sa11x0_probe(struct platform_device *pdev)
142
{
143
        struct mcp_plat_data *data = pdev->dev.platform_data;
144
        struct mcp *mcp;
145
        int ret;
146
 
147
        if (!data)
148
                return -ENODEV;
149
 
150
        if (!request_mem_region(0x80060000, 0x60, "sa11x0-mcp"))
151
                return -EBUSY;
152
 
153
        mcp = mcp_host_alloc(&pdev->dev, sizeof(struct mcp_sa11x0));
154
        if (!mcp) {
155
                ret = -ENOMEM;
156
                goto release;
157
        }
158
 
159
        mcp->owner              = THIS_MODULE;
160
        mcp->ops                = &mcp_sa11x0;
161
        mcp->sclk_rate          = data->sclk_rate;
162
        mcp->dma_audio_rd       = DMA_Ser4MCP0Rd;
163
        mcp->dma_audio_wr       = DMA_Ser4MCP0Wr;
164
        mcp->dma_telco_rd       = DMA_Ser4MCP1Rd;
165
        mcp->dma_telco_wr       = DMA_Ser4MCP1Wr;
166
 
167
        platform_set_drvdata(pdev, mcp);
168
 
169
        if (machine_is_assabet()) {
170
                ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
171
        }
172
 
173
        /*
174
         * Setup the PPC unit correctly.
175
         */
176
        PPDR &= ~PPC_RXD4;
177
        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
178
        PSDR |= PPC_RXD4;
179
        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
180
        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
181
 
182
        /*
183
         * Initialise device.  Note that we initially
184
         * set the sampling rate to minimum.
185
         */
186
        Ser4MCSR = -1;
187
        Ser4MCCR1 = data->mccr1;
188
        Ser4MCCR0 = data->mccr0 | 0x7f7f;
189
 
190
        /*
191
         * Calculate the read/write timeout (us) from the bit clock
192
         * rate.  This is the period for 3 64-bit frames.  Always
193
         * round this time up.
194
         */
195
        mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
196
                          mcp->sclk_rate;
197
 
198
        ret = mcp_host_register(mcp);
199
        if (ret == 0)
200
                goto out;
201
 
202
 release:
203
        release_mem_region(0x80060000, 0x60);
204
        platform_set_drvdata(pdev, NULL);
205
 
206
 out:
207
        return ret;
208
}
209
 
210
static int mcp_sa11x0_remove(struct platform_device *dev)
211
{
212
        struct mcp *mcp = platform_get_drvdata(dev);
213
 
214
        platform_set_drvdata(dev, NULL);
215
        mcp_host_unregister(mcp);
216
        release_mem_region(0x80060000, 0x60);
217
 
218
        return 0;
219
}
220
 
221
static int mcp_sa11x0_suspend(struct platform_device *dev, pm_message_t state)
222
{
223
        struct mcp *mcp = platform_get_drvdata(dev);
224
 
225
        priv(mcp)->mccr0 = Ser4MCCR0;
226
        priv(mcp)->mccr1 = Ser4MCCR1;
227
        Ser4MCCR0 &= ~MCCR0_MCE;
228
 
229
        return 0;
230
}
231
 
232
static int mcp_sa11x0_resume(struct platform_device *dev)
233
{
234
        struct mcp *mcp = platform_get_drvdata(dev);
235
 
236
        Ser4MCCR1 = priv(mcp)->mccr1;
237
        Ser4MCCR0 = priv(mcp)->mccr0;
238
 
239
        return 0;
240
}
241
 
242
/*
243
 * The driver for the SA11x0 MCP port.
244
 */
245
static struct platform_driver mcp_sa11x0_driver = {
246
        .probe          = mcp_sa11x0_probe,
247
        .remove         = mcp_sa11x0_remove,
248
        .suspend        = mcp_sa11x0_suspend,
249
        .resume         = mcp_sa11x0_resume,
250
        .driver         = {
251
                .name   = "sa11x0-mcp",
252
        },
253
};
254
 
255
/*
256
 * This needs re-working
257
 */
258
static int __init mcp_sa11x0_init(void)
259
{
260
        return platform_driver_register(&mcp_sa11x0_driver);
261
}
262
 
263
static void __exit mcp_sa11x0_exit(void)
264
{
265
        platform_driver_unregister(&mcp_sa11x0_driver);
266
}
267
 
268
module_init(mcp_sa11x0_init);
269
module_exit(mcp_sa11x0_exit);
270
 
271
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
272
MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
273
MODULE_LICENSE("GPL");

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