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marcus.erl |
/*
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* MTD SPI driver for ST M25Pxx (and similar) serial flash chips
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*
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* Author: Mike Lavender, mike@steroidmicros.com
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*
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* Copyright (c) 2005, Intec Automation Inc.
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*
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* Some parts are based on lart.c by Abraham Van Der Merwe
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*
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* Cleaned up and generalized based on mtd_dataflash.c
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*
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* This code is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#define FLASH_PAGESIZE 256
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/* Flash opcodes. */
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#define OPCODE_WREN 0x06 /* Write enable */
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#define OPCODE_RDSR 0x05 /* Read status register */
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#define OPCODE_READ 0x03 /* Read data bytes (low frequency) */
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#define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */
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#define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */
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#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */
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#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */
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#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */
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#define OPCODE_RDID 0x9f /* Read JEDEC ID */
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/* Status Register bits. */
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#define SR_WIP 1 /* Write in progress */
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#define SR_WEL 2 /* Write enable latch */
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/* meaning of other SR_* bits may differ between vendors */
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#define SR_BP0 4 /* Block protect 0 */
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#define SR_BP1 8 /* Block protect 1 */
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#define SR_BP2 0x10 /* Block protect 2 */
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#define SR_SRWD 0x80 /* SR write protect */
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/* Define max times to check status register before we give up. */
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#define MAX_READY_WAIT_COUNT 100000
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#ifdef CONFIG_MTD_PARTITIONS
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#define mtd_has_partitions() (1)
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#else
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#define mtd_has_partitions() (0)
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#endif
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/****************************************************************************/
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struct m25p {
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struct spi_device *spi;
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struct mutex lock;
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struct mtd_info mtd;
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unsigned partitioned:1;
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u8 erase_opcode;
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u8 command[4];
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};
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static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
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{
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return container_of(mtd, struct m25p, mtd);
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}
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/****************************************************************************/
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/*
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* Internal helper functions
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*/
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/*
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* Read the status register, returning its value in the location
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* Return the status register value.
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* Returns negative if error occurred.
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*/
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static int read_sr(struct m25p *flash)
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{
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ssize_t retval;
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u8 code = OPCODE_RDSR;
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u8 val;
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retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
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if (retval < 0) {
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dev_err(&flash->spi->dev, "error %d reading SR\n",
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(int) retval);
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return retval;
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}
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return val;
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}
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/*
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* Set write enable latch with Write Enable command.
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* Returns negative if error occurred.
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*/
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static inline int write_enable(struct m25p *flash)
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{
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u8 code = OPCODE_WREN;
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return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
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}
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/*
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* Service routine to read status register until ready, or timeout occurs.
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* Returns non-zero if error.
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*/
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static int wait_till_ready(struct m25p *flash)
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{
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int count;
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int sr;
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/* one chip guarantees max 5 msec wait here after page writes,
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* but potentially three seconds (!) after page erase.
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*/
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for (count = 0; count < MAX_READY_WAIT_COUNT; count++) {
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if ((sr = read_sr(flash)) < 0)
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break;
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else if (!(sr & SR_WIP))
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return 0;
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/* REVISIT sometimes sleeping would be best */
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}
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return 1;
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}
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/*
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* Erase one sector of flash memory at offset ``offset'' which is any
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* address within the sector which should be erased.
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*
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* Returns 0 if successful, non-zero otherwise.
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*/
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static int erase_sector(struct m25p *flash, u32 offset)
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{
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DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %dKiB at 0x%08x\n",
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flash->spi->dev.bus_id, __FUNCTION__,
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flash->mtd.erasesize / 1024, offset);
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/* Wait until finished previous write command. */
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if (wait_till_ready(flash))
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return 1;
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/* Send write enable, then erase commands. */
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write_enable(flash);
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/* Set up command buffer. */
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flash->command[0] = flash->erase_opcode;
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flash->command[1] = offset >> 16;
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flash->command[2] = offset >> 8;
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flash->command[3] = offset;
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spi_write(flash->spi, flash->command, sizeof(flash->command));
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return 0;
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}
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/****************************************************************************/
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/*
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* MTD implementation
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*/
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/*
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* Erase an address range on the flash chip. The address range may extend
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* one or more erase sectors. Return an error is there is a problem erasing.
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*/
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static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
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{
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struct m25p *flash = mtd_to_m25p(mtd);
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u32 addr,len;
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DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %d\n",
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flash->spi->dev.bus_id, __FUNCTION__, "at",
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(u32)instr->addr, instr->len);
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/* sanity checks */
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if (instr->addr + instr->len > flash->mtd.size)
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return -EINVAL;
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if ((instr->addr % mtd->erasesize) != 0
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|| (instr->len % mtd->erasesize) != 0) {
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return -EINVAL;
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}
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addr = instr->addr;
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len = instr->len;
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mutex_lock(&flash->lock);
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/* REVISIT in some cases we could speed up erasing large regions
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* by using OPCODE_SE instead of OPCODE_BE_4K
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*/
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/* now erase those sectors */
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while (len) {
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if (erase_sector(flash, addr)) {
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instr->state = MTD_ERASE_FAILED;
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mutex_unlock(&flash->lock);
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return -EIO;
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}
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addr += mtd->erasesize;
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len -= mtd->erasesize;
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}
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mutex_unlock(&flash->lock);
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instr->state = MTD_ERASE_DONE;
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mtd_erase_callback(instr);
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return 0;
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}
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/*
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* Read an address range from the flash chip. The address range
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* may be any size provided it is within the physical boundaries.
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*/
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static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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struct m25p *flash = mtd_to_m25p(mtd);
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struct spi_transfer t[2];
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struct spi_message m;
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DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
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flash->spi->dev.bus_id, __FUNCTION__, "from",
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(u32)from, len);
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/* sanity checks */
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if (!len)
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return 0;
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if (from + len > flash->mtd.size)
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return -EINVAL;
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spi_message_init(&m);
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memset(t, 0, (sizeof t));
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| 256 |
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t[0].tx_buf = flash->command;
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t[0].len = sizeof(flash->command);
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spi_message_add_tail(&t[0], &m);
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t[1].rx_buf = buf;
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t[1].len = len;
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spi_message_add_tail(&t[1], &m);
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| 264 |
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/* Byte count starts at zero. */
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if (retlen)
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*retlen = 0;
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| 268 |
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mutex_lock(&flash->lock);
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/* Wait till previous write/erase is done. */
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if (wait_till_ready(flash)) {
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/* REVISIT status return?? */
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mutex_unlock(&flash->lock);
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return 1;
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}
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| 276 |
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| 277 |
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/* FIXME switch to OPCODE_FAST_READ. It's required for higher
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| 278 |
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* clocks; and at this writing, every chip this driver handles
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| 279 |
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* supports that opcode.
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| 280 |
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*/
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| 281 |
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| 282 |
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/* Set up the write data buffer. */
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| 283 |
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flash->command[0] = OPCODE_READ;
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flash->command[1] = from >> 16;
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flash->command[2] = from >> 8;
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flash->command[3] = from;
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| 287 |
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| 288 |
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spi_sync(flash->spi, &m);
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| 289 |
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| 290 |
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*retlen = m.actual_length - sizeof(flash->command);
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| 291 |
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| 292 |
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mutex_unlock(&flash->lock);
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| 293 |
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| 294 |
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return 0;
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| 295 |
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}
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| 296 |
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| 297 |
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/*
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| 298 |
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* Write an address range to the flash chip. Data must be written in
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| 299 |
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* FLASH_PAGESIZE chunks. The address range may be any size provided
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| 300 |
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* it is within the physical boundaries.
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| 301 |
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*/
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| 302 |
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static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
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| 303 |
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size_t *retlen, const u_char *buf)
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| 304 |
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{
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| 305 |
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struct m25p *flash = mtd_to_m25p(mtd);
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| 306 |
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u32 page_offset, page_size;
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| 307 |
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struct spi_transfer t[2];
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| 308 |
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struct spi_message m;
|
| 309 |
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|
| 310 |
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DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
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| 311 |
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flash->spi->dev.bus_id, __FUNCTION__, "to",
|
| 312 |
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(u32)to, len);
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| 313 |
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|
| 314 |
|
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if (retlen)
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| 315 |
|
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*retlen = 0;
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| 316 |
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| 317 |
|
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/* sanity checks */
|
| 318 |
|
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if (!len)
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| 319 |
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return(0);
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| 320 |
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|
| 321 |
|
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if (to + len > flash->mtd.size)
|
| 322 |
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return -EINVAL;
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| 323 |
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|
| 324 |
|
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spi_message_init(&m);
|
| 325 |
|
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memset(t, 0, (sizeof t));
|
| 326 |
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| 327 |
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t[0].tx_buf = flash->command;
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| 328 |
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t[0].len = sizeof(flash->command);
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| 329 |
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spi_message_add_tail(&t[0], &m);
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| 330 |
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| 331 |
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t[1].tx_buf = buf;
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| 332 |
|
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spi_message_add_tail(&t[1], &m);
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| 333 |
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| 334 |
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mutex_lock(&flash->lock);
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| 335 |
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|
| 336 |
|
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/* Wait until finished previous write command. */
|
| 337 |
|
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if (wait_till_ready(flash))
|
| 338 |
|
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return 1;
|
| 339 |
|
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|
| 340 |
|
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write_enable(flash);
|
| 341 |
|
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|
| 342 |
|
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/* Set up the opcode in the write buffer. */
|
| 343 |
|
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flash->command[0] = OPCODE_PP;
|
| 344 |
|
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flash->command[1] = to >> 16;
|
| 345 |
|
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flash->command[2] = to >> 8;
|
| 346 |
|
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flash->command[3] = to;
|
| 347 |
|
|
|
| 348 |
|
|
/* what page do we start with? */
|
| 349 |
|
|
page_offset = to % FLASH_PAGESIZE;
|
| 350 |
|
|
|
| 351 |
|
|
/* do all the bytes fit onto one page? */
|
| 352 |
|
|
if (page_offset + len <= FLASH_PAGESIZE) {
|
| 353 |
|
|
t[1].len = len;
|
| 354 |
|
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|
| 355 |
|
|
spi_sync(flash->spi, &m);
|
| 356 |
|
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|
| 357 |
|
|
*retlen = m.actual_length - sizeof(flash->command);
|
| 358 |
|
|
} else {
|
| 359 |
|
|
u32 i;
|
| 360 |
|
|
|
| 361 |
|
|
/* the size of data remaining on the first page */
|
| 362 |
|
|
page_size = FLASH_PAGESIZE - page_offset;
|
| 363 |
|
|
|
| 364 |
|
|
t[1].len = page_size;
|
| 365 |
|
|
spi_sync(flash->spi, &m);
|
| 366 |
|
|
|
| 367 |
|
|
*retlen = m.actual_length - sizeof(flash->command);
|
| 368 |
|
|
|
| 369 |
|
|
/* write everything in PAGESIZE chunks */
|
| 370 |
|
|
for (i = page_size; i < len; i += page_size) {
|
| 371 |
|
|
page_size = len - i;
|
| 372 |
|
|
if (page_size > FLASH_PAGESIZE)
|
| 373 |
|
|
page_size = FLASH_PAGESIZE;
|
| 374 |
|
|
|
| 375 |
|
|
/* write the next page to flash */
|
| 376 |
|
|
flash->command[1] = (to + i) >> 16;
|
| 377 |
|
|
flash->command[2] = (to + i) >> 8;
|
| 378 |
|
|
flash->command[3] = (to + i);
|
| 379 |
|
|
|
| 380 |
|
|
t[1].tx_buf = buf + i;
|
| 381 |
|
|
t[1].len = page_size;
|
| 382 |
|
|
|
| 383 |
|
|
wait_till_ready(flash);
|
| 384 |
|
|
|
| 385 |
|
|
write_enable(flash);
|
| 386 |
|
|
|
| 387 |
|
|
spi_sync(flash->spi, &m);
|
| 388 |
|
|
|
| 389 |
|
|
if (retlen)
|
| 390 |
|
|
*retlen += m.actual_length
|
| 391 |
|
|
- sizeof(flash->command);
|
| 392 |
|
|
}
|
| 393 |
|
|
}
|
| 394 |
|
|
|
| 395 |
|
|
mutex_unlock(&flash->lock);
|
| 396 |
|
|
|
| 397 |
|
|
return 0;
|
| 398 |
|
|
}
|
| 399 |
|
|
|
| 400 |
|
|
|
| 401 |
|
|
/****************************************************************************/
|
| 402 |
|
|
|
| 403 |
|
|
/*
|
| 404 |
|
|
* SPI device driver setup and teardown
|
| 405 |
|
|
*/
|
| 406 |
|
|
|
| 407 |
|
|
struct flash_info {
|
| 408 |
|
|
char *name;
|
| 409 |
|
|
|
| 410 |
|
|
/* JEDEC id zero means "no ID" (most older chips); otherwise it has
|
| 411 |
|
|
* a high byte of zero plus three data bytes: the manufacturer id,
|
| 412 |
|
|
* then a two byte device id.
|
| 413 |
|
|
*/
|
| 414 |
|
|
u32 jedec_id;
|
| 415 |
|
|
|
| 416 |
|
|
/* The size listed here is what works with OPCODE_SE, which isn't
|
| 417 |
|
|
* necessarily called a "sector" by the vendor.
|
| 418 |
|
|
*/
|
| 419 |
|
|
unsigned sector_size;
|
| 420 |
|
|
u16 n_sectors;
|
| 421 |
|
|
|
| 422 |
|
|
u16 flags;
|
| 423 |
|
|
#define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
|
| 424 |
|
|
};
|
| 425 |
|
|
|
| 426 |
|
|
|
| 427 |
|
|
/* NOTE: double check command sets and memory organization when you add
|
| 428 |
|
|
* more flash chips. This current list focusses on newer chips, which
|
| 429 |
|
|
* have been converging on command sets which including JEDEC ID.
|
| 430 |
|
|
*/
|
| 431 |
|
|
static struct flash_info __devinitdata m25p_data [] = {
|
| 432 |
|
|
|
| 433 |
|
|
/* Atmel -- some are (confusingly) marketed as "DataFlash" */
|
| 434 |
|
|
{ "at25fs010", 0x1f6601, 32 * 1024, 4, SECT_4K, },
|
| 435 |
|
|
{ "at25fs040", 0x1f6604, 64 * 1024, 8, SECT_4K, },
|
| 436 |
|
|
|
| 437 |
|
|
{ "at25df041a", 0x1f4401, 64 * 1024, 8, SECT_4K, },
|
| 438 |
|
|
|
| 439 |
|
|
{ "at26f004", 0x1f0400, 64 * 1024, 8, SECT_4K, },
|
| 440 |
|
|
{ "at26df081a", 0x1f4501, 64 * 1024, 16, SECT_4K, },
|
| 441 |
|
|
{ "at26df161a", 0x1f4601, 64 * 1024, 32, SECT_4K, },
|
| 442 |
|
|
{ "at26df321", 0x1f4701, 64 * 1024, 64, SECT_4K, },
|
| 443 |
|
|
|
| 444 |
|
|
/* Spansion -- single (large) sector size only, at least
|
| 445 |
|
|
* for the chips listed here (without boot sectors).
|
| 446 |
|
|
*/
|
| 447 |
|
|
{ "s25sl004a", 0x010212, 64 * 1024, 8, },
|
| 448 |
|
|
{ "s25sl008a", 0x010213, 64 * 1024, 16, },
|
| 449 |
|
|
{ "s25sl016a", 0x010214, 64 * 1024, 32, },
|
| 450 |
|
|
{ "s25sl032a", 0x010215, 64 * 1024, 64, },
|
| 451 |
|
|
{ "s25sl064a", 0x010216, 64 * 1024, 128, },
|
| 452 |
|
|
|
| 453 |
|
|
/* SST -- large erase sizes are "overlays", "sectors" are 4K */
|
| 454 |
|
|
{ "sst25vf040b", 0xbf258d, 64 * 1024, 8, SECT_4K, },
|
| 455 |
|
|
{ "sst25vf080b", 0xbf258e, 64 * 1024, 16, SECT_4K, },
|
| 456 |
|
|
{ "sst25vf016b", 0xbf2541, 64 * 1024, 32, SECT_4K, },
|
| 457 |
|
|
{ "sst25vf032b", 0xbf254a, 64 * 1024, 64, SECT_4K, },
|
| 458 |
|
|
|
| 459 |
|
|
/* ST Microelectronics -- newer production may have feature updates */
|
| 460 |
|
|
{ "m25p05", 0x202010, 32 * 1024, 2, },
|
| 461 |
|
|
{ "m25p10", 0x202011, 32 * 1024, 4, },
|
| 462 |
|
|
{ "m25p20", 0x202012, 64 * 1024, 4, },
|
| 463 |
|
|
{ "m25p40", 0x202013, 64 * 1024, 8, },
|
| 464 |
|
|
{ "m25p80", 0, 64 * 1024, 16, },
|
| 465 |
|
|
{ "m25p16", 0x202015, 64 * 1024, 32, },
|
| 466 |
|
|
{ "m25p32", 0x202016, 64 * 1024, 64, },
|
| 467 |
|
|
{ "m25p64", 0x202017, 64 * 1024, 128, },
|
| 468 |
|
|
{ "m25p128", 0x202018, 256 * 1024, 64, },
|
| 469 |
|
|
|
| 470 |
|
|
{ "m45pe80", 0x204014, 64 * 1024, 16, },
|
| 471 |
|
|
{ "m45pe16", 0x204015, 64 * 1024, 32, },
|
| 472 |
|
|
|
| 473 |
|
|
{ "m25pe80", 0x208014, 64 * 1024, 16, },
|
| 474 |
|
|
{ "m25pe16", 0x208015, 64 * 1024, 32, SECT_4K, },
|
| 475 |
|
|
|
| 476 |
|
|
/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
|
| 477 |
|
|
{ "w25x10", 0xef3011, 64 * 1024, 2, SECT_4K, },
|
| 478 |
|
|
{ "w25x20", 0xef3012, 64 * 1024, 4, SECT_4K, },
|
| 479 |
|
|
{ "w25x40", 0xef3013, 64 * 1024, 8, SECT_4K, },
|
| 480 |
|
|
{ "w25x80", 0xef3014, 64 * 1024, 16, SECT_4K, },
|
| 481 |
|
|
{ "w25x16", 0xef3015, 64 * 1024, 32, SECT_4K, },
|
| 482 |
|
|
{ "w25x32", 0xef3016, 64 * 1024, 64, SECT_4K, },
|
| 483 |
|
|
{ "w25x64", 0xef3017, 64 * 1024, 128, SECT_4K, },
|
| 484 |
|
|
};
|
| 485 |
|
|
|
| 486 |
|
|
static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
|
| 487 |
|
|
{
|
| 488 |
|
|
int tmp;
|
| 489 |
|
|
u8 code = OPCODE_RDID;
|
| 490 |
|
|
u8 id[3];
|
| 491 |
|
|
u32 jedec;
|
| 492 |
|
|
struct flash_info *info;
|
| 493 |
|
|
|
| 494 |
|
|
/* JEDEC also defines an optional "extended device information"
|
| 495 |
|
|
* string for after vendor-specific data, after the three bytes
|
| 496 |
|
|
* we use here. Supporting some chips might require using it.
|
| 497 |
|
|
*/
|
| 498 |
|
|
tmp = spi_write_then_read(spi, &code, 1, id, 3);
|
| 499 |
|
|
if (tmp < 0) {
|
| 500 |
|
|
DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
|
| 501 |
|
|
spi->dev.bus_id, tmp);
|
| 502 |
|
|
return NULL;
|
| 503 |
|
|
}
|
| 504 |
|
|
jedec = id[0];
|
| 505 |
|
|
jedec = jedec << 8;
|
| 506 |
|
|
jedec |= id[1];
|
| 507 |
|
|
jedec = jedec << 8;
|
| 508 |
|
|
jedec |= id[2];
|
| 509 |
|
|
|
| 510 |
|
|
for (tmp = 0, info = m25p_data;
|
| 511 |
|
|
tmp < ARRAY_SIZE(m25p_data);
|
| 512 |
|
|
tmp++, info++) {
|
| 513 |
|
|
if (info->jedec_id == jedec)
|
| 514 |
|
|
return info;
|
| 515 |
|
|
}
|
| 516 |
|
|
dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec);
|
| 517 |
|
|
return NULL;
|
| 518 |
|
|
}
|
| 519 |
|
|
|
| 520 |
|
|
|
| 521 |
|
|
/*
|
| 522 |
|
|
* board specific setup should have ensured the SPI clock used here
|
| 523 |
|
|
* matches what the READ command supports, at least until this driver
|
| 524 |
|
|
* understands FAST_READ (for clocks over 25 MHz).
|
| 525 |
|
|
*/
|
| 526 |
|
|
static int __devinit m25p_probe(struct spi_device *spi)
|
| 527 |
|
|
{
|
| 528 |
|
|
struct flash_platform_data *data;
|
| 529 |
|
|
struct m25p *flash;
|
| 530 |
|
|
struct flash_info *info;
|
| 531 |
|
|
unsigned i;
|
| 532 |
|
|
|
| 533 |
|
|
/* Platform data helps sort out which chip type we have, as
|
| 534 |
|
|
* well as how this board partitions it. If we don't have
|
| 535 |
|
|
* a chip ID, try the JEDEC id commands; they'll work for most
|
| 536 |
|
|
* newer chips, even if we don't recognize the particular chip.
|
| 537 |
|
|
*/
|
| 538 |
|
|
data = spi->dev.platform_data;
|
| 539 |
|
|
if (data && data->type) {
|
| 540 |
|
|
for (i = 0, info = m25p_data;
|
| 541 |
|
|
i < ARRAY_SIZE(m25p_data);
|
| 542 |
|
|
i++, info++) {
|
| 543 |
|
|
if (strcmp(data->type, info->name) == 0)
|
| 544 |
|
|
break;
|
| 545 |
|
|
}
|
| 546 |
|
|
|
| 547 |
|
|
/* unrecognized chip? */
|
| 548 |
|
|
if (i == ARRAY_SIZE(m25p_data)) {
|
| 549 |
|
|
DEBUG(MTD_DEBUG_LEVEL0, "%s: unrecognized id %s\n",
|
| 550 |
|
|
spi->dev.bus_id, data->type);
|
| 551 |
|
|
info = NULL;
|
| 552 |
|
|
|
| 553 |
|
|
/* recognized; is that chip really what's there? */
|
| 554 |
|
|
} else if (info->jedec_id) {
|
| 555 |
|
|
struct flash_info *chip = jedec_probe(spi);
|
| 556 |
|
|
|
| 557 |
|
|
if (!chip || chip != info) {
|
| 558 |
|
|
dev_warn(&spi->dev, "found %s, expected %s\n",
|
| 559 |
|
|
chip ? chip->name : "UNKNOWN",
|
| 560 |
|
|
info->name);
|
| 561 |
|
|
info = NULL;
|
| 562 |
|
|
}
|
| 563 |
|
|
}
|
| 564 |
|
|
} else
|
| 565 |
|
|
info = jedec_probe(spi);
|
| 566 |
|
|
|
| 567 |
|
|
if (!info)
|
| 568 |
|
|
return -ENODEV;
|
| 569 |
|
|
|
| 570 |
|
|
flash = kzalloc(sizeof *flash, GFP_KERNEL);
|
| 571 |
|
|
if (!flash)
|
| 572 |
|
|
return -ENOMEM;
|
| 573 |
|
|
|
| 574 |
|
|
flash->spi = spi;
|
| 575 |
|
|
mutex_init(&flash->lock);
|
| 576 |
|
|
dev_set_drvdata(&spi->dev, flash);
|
| 577 |
|
|
|
| 578 |
|
|
if (data && data->name)
|
| 579 |
|
|
flash->mtd.name = data->name;
|
| 580 |
|
|
else
|
| 581 |
|
|
flash->mtd.name = spi->dev.bus_id;
|
| 582 |
|
|
|
| 583 |
|
|
flash->mtd.type = MTD_NORFLASH;
|
| 584 |
|
|
flash->mtd.writesize = 1;
|
| 585 |
|
|
flash->mtd.flags = MTD_CAP_NORFLASH;
|
| 586 |
|
|
flash->mtd.size = info->sector_size * info->n_sectors;
|
| 587 |
|
|
flash->mtd.erase = m25p80_erase;
|
| 588 |
|
|
flash->mtd.read = m25p80_read;
|
| 589 |
|
|
flash->mtd.write = m25p80_write;
|
| 590 |
|
|
|
| 591 |
|
|
/* prefer "small sector" erase if possible */
|
| 592 |
|
|
if (info->flags & SECT_4K) {
|
| 593 |
|
|
flash->erase_opcode = OPCODE_BE_4K;
|
| 594 |
|
|
flash->mtd.erasesize = 4096;
|
| 595 |
|
|
} else {
|
| 596 |
|
|
flash->erase_opcode = OPCODE_SE;
|
| 597 |
|
|
flash->mtd.erasesize = info->sector_size;
|
| 598 |
|
|
}
|
| 599 |
|
|
|
| 600 |
|
|
dev_info(&spi->dev, "%s (%d Kbytes)\n", info->name,
|
| 601 |
|
|
flash->mtd.size / 1024);
|
| 602 |
|
|
|
| 603 |
|
|
DEBUG(MTD_DEBUG_LEVEL2,
|
| 604 |
|
|
"mtd .name = %s, .size = 0x%.8x (%uMiB) "
|
| 605 |
|
|
".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
|
| 606 |
|
|
flash->mtd.name,
|
| 607 |
|
|
flash->mtd.size, flash->mtd.size / (1024*1024),
|
| 608 |
|
|
flash->mtd.erasesize, flash->mtd.erasesize / 1024,
|
| 609 |
|
|
flash->mtd.numeraseregions);
|
| 610 |
|
|
|
| 611 |
|
|
if (flash->mtd.numeraseregions)
|
| 612 |
|
|
for (i = 0; i < flash->mtd.numeraseregions; i++)
|
| 613 |
|
|
DEBUG(MTD_DEBUG_LEVEL2,
|
| 614 |
|
|
"mtd.eraseregions[%d] = { .offset = 0x%.8x, "
|
| 615 |
|
|
".erasesize = 0x%.8x (%uKiB), "
|
| 616 |
|
|
".numblocks = %d }\n",
|
| 617 |
|
|
i, flash->mtd.eraseregions[i].offset,
|
| 618 |
|
|
flash->mtd.eraseregions[i].erasesize,
|
| 619 |
|
|
flash->mtd.eraseregions[i].erasesize / 1024,
|
| 620 |
|
|
flash->mtd.eraseregions[i].numblocks);
|
| 621 |
|
|
|
| 622 |
|
|
|
| 623 |
|
|
/* partitions should match sector boundaries; and it may be good to
|
| 624 |
|
|
* use readonly partitions for writeprotected sectors (BP2..BP0).
|
| 625 |
|
|
*/
|
| 626 |
|
|
if (mtd_has_partitions()) {
|
| 627 |
|
|
struct mtd_partition *parts = NULL;
|
| 628 |
|
|
int nr_parts = 0;
|
| 629 |
|
|
|
| 630 |
|
|
#ifdef CONFIG_MTD_CMDLINE_PARTS
|
| 631 |
|
|
static const char *part_probes[] = { "cmdlinepart", NULL, };
|
| 632 |
|
|
|
| 633 |
|
|
nr_parts = parse_mtd_partitions(&flash->mtd,
|
| 634 |
|
|
part_probes, &parts, 0);
|
| 635 |
|
|
#endif
|
| 636 |
|
|
|
| 637 |
|
|
if (nr_parts <= 0 && data && data->parts) {
|
| 638 |
|
|
parts = data->parts;
|
| 639 |
|
|
nr_parts = data->nr_parts;
|
| 640 |
|
|
}
|
| 641 |
|
|
|
| 642 |
|
|
if (nr_parts > 0) {
|
| 643 |
|
|
for (i = 0; i < nr_parts; i++) {
|
| 644 |
|
|
DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
|
| 645 |
|
|
"{.name = %s, .offset = 0x%.8x, "
|
| 646 |
|
|
".size = 0x%.8x (%uKiB) }\n",
|
| 647 |
|
|
i, parts[i].name,
|
| 648 |
|
|
parts[i].offset,
|
| 649 |
|
|
parts[i].size,
|
| 650 |
|
|
parts[i].size / 1024);
|
| 651 |
|
|
}
|
| 652 |
|
|
flash->partitioned = 1;
|
| 653 |
|
|
return add_mtd_partitions(&flash->mtd, parts, nr_parts);
|
| 654 |
|
|
}
|
| 655 |
|
|
} else if (data->nr_parts)
|
| 656 |
|
|
dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
|
| 657 |
|
|
data->nr_parts, data->name);
|
| 658 |
|
|
|
| 659 |
|
|
return add_mtd_device(&flash->mtd) == 1 ? -ENODEV : 0;
|
| 660 |
|
|
}
|
| 661 |
|
|
|
| 662 |
|
|
|
| 663 |
|
|
static int __devexit m25p_remove(struct spi_device *spi)
|
| 664 |
|
|
{
|
| 665 |
|
|
struct m25p *flash = dev_get_drvdata(&spi->dev);
|
| 666 |
|
|
int status;
|
| 667 |
|
|
|
| 668 |
|
|
/* Clean up MTD stuff. */
|
| 669 |
|
|
if (mtd_has_partitions() && flash->partitioned)
|
| 670 |
|
|
status = del_mtd_partitions(&flash->mtd);
|
| 671 |
|
|
else
|
| 672 |
|
|
status = del_mtd_device(&flash->mtd);
|
| 673 |
|
|
if (status == 0)
|
| 674 |
|
|
kfree(flash);
|
| 675 |
|
|
return 0;
|
| 676 |
|
|
}
|
| 677 |
|
|
|
| 678 |
|
|
|
| 679 |
|
|
static struct spi_driver m25p80_driver = {
|
| 680 |
|
|
.driver = {
|
| 681 |
|
|
.name = "m25p80",
|
| 682 |
|
|
.bus = &spi_bus_type,
|
| 683 |
|
|
.owner = THIS_MODULE,
|
| 684 |
|
|
},
|
| 685 |
|
|
.probe = m25p_probe,
|
| 686 |
|
|
.remove = __devexit_p(m25p_remove),
|
| 687 |
|
|
|
| 688 |
|
|
/* REVISIT: many of these chips have deep power-down modes, which
|
| 689 |
|
|
* should clearly be entered on suspend() to minimize power use.
|
| 690 |
|
|
* And also when they're otherwise idle...
|
| 691 |
|
|
*/
|
| 692 |
|
|
};
|
| 693 |
|
|
|
| 694 |
|
|
|
| 695 |
|
|
static int m25p80_init(void)
|
| 696 |
|
|
{
|
| 697 |
|
|
return spi_register_driver(&m25p80_driver);
|
| 698 |
|
|
}
|
| 699 |
|
|
|
| 700 |
|
|
|
| 701 |
|
|
static void m25p80_exit(void)
|
| 702 |
|
|
{
|
| 703 |
|
|
spi_unregister_driver(&m25p80_driver);
|
| 704 |
|
|
}
|
| 705 |
|
|
|
| 706 |
|
|
|
| 707 |
|
|
module_init(m25p80_init);
|
| 708 |
|
|
module_exit(m25p80_exit);
|
| 709 |
|
|
|
| 710 |
|
|
MODULE_LICENSE("GPL");
|
| 711 |
|
|
MODULE_AUTHOR("Mike Lavender");
|
| 712 |
|
|
MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");
|
