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marcus.erl |
/*
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* Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
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*
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* Largely derived from at91_dataflash.c:
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* Copyright (C) 2003-2005 SAN People (Pty) Ltd
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/mutex.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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/*
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* DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
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* each chip, which may be used for double buffered I/O; but this driver
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* doesn't (yet) use these for any kind of i/o overlap or prefetching.
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*
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* Sometimes DataFlash is packaged in MMC-format cards, although the
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* MMC stack can't use SPI (yet), or distinguish between MMC and DataFlash
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* protocols during enumeration.
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*/
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#define CONFIG_DATAFLASH_WRITE_VERIFY
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/* reads can bypass the buffers */
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#define OP_READ_CONTINUOUS 0xE8
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#define OP_READ_PAGE 0xD2
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/* group B requests can run even while status reports "busy" */
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#define OP_READ_STATUS 0xD7 /* group B */
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/* move data between host and buffer */
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#define OP_READ_BUFFER1 0xD4 /* group B */
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#define OP_READ_BUFFER2 0xD6 /* group B */
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#define OP_WRITE_BUFFER1 0x84 /* group B */
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#define OP_WRITE_BUFFER2 0x87 /* group B */
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/* erasing flash */
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#define OP_ERASE_PAGE 0x81
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#define OP_ERASE_BLOCK 0x50
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/* move data between buffer and flash */
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#define OP_TRANSFER_BUF1 0x53
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#define OP_TRANSFER_BUF2 0x55
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#define OP_MREAD_BUFFER1 0xD4
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#define OP_MREAD_BUFFER2 0xD6
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#define OP_MWERASE_BUFFER1 0x83
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#define OP_MWERASE_BUFFER2 0x86
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#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
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#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
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/* write to buffer, then write-erase to flash */
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#define OP_PROGRAM_VIA_BUF1 0x82
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#define OP_PROGRAM_VIA_BUF2 0x85
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/* compare buffer to flash */
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#define OP_COMPARE_BUF1 0x60
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#define OP_COMPARE_BUF2 0x61
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/* read flash to buffer, then write-erase to flash */
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#define OP_REWRITE_VIA_BUF1 0x58
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#define OP_REWRITE_VIA_BUF2 0x59
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/* newer chips report JEDEC manufacturer and device IDs; chip
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* serial number and OTP bits; and per-sector writeprotect.
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*/
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#define OP_READ_ID 0x9F
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#define OP_READ_SECURITY 0x77
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#define OP_WRITE_SECURITY 0x9A /* OTP bits */
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struct dataflash {
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u8 command[4];
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char name[24];
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unsigned partitioned:1;
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unsigned short page_offset; /* offset in flash address */
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unsigned int page_size; /* of bytes per page */
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struct mutex lock;
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struct spi_device *spi;
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struct mtd_info mtd;
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};
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#ifdef CONFIG_MTD_PARTITIONS
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#define mtd_has_partitions() (1)
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#else
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#define mtd_has_partitions() (0)
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#endif
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/* ......................................................................... */
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/*
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* Return the status of the DataFlash device.
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*/
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static inline int dataflash_status(struct spi_device *spi)
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{
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/* NOTE: at45db321c over 25 MHz wants to write
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* a dummy byte after the opcode...
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*/
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return spi_w8r8(spi, OP_READ_STATUS);
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}
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/*
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* Poll the DataFlash device until it is READY.
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* This usually takes 5-20 msec or so; more for sector erase.
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*/
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static int dataflash_waitready(struct spi_device *spi)
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{
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int status;
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for (;;) {
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status = dataflash_status(spi);
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if (status < 0) {
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DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n",
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spi->dev.bus_id, status);
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status = 0;
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}
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if (status & (1 << 7)) /* RDY/nBSY */
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return status;
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msleep(3);
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}
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}
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/* ......................................................................... */
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/*
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* Erase pages of flash.
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*/
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static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
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{
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struct dataflash *priv = (struct dataflash *)mtd->priv;
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struct spi_device *spi = priv->spi;
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struct spi_transfer x = { .tx_dma = 0, };
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struct spi_message msg;
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unsigned blocksize = priv->page_size << 3;
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u8 *command;
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DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%x len 0x%x\n",
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spi->dev.bus_id,
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instr->addr, instr->len);
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/* Sanity checks */
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if ((instr->addr + instr->len) > mtd->size
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|| (instr->len % priv->page_size) != 0
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|| (instr->addr % priv->page_size) != 0)
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return -EINVAL;
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spi_message_init(&msg);
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x.tx_buf = command = priv->command;
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x.len = 4;
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spi_message_add_tail(&x, &msg);
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mutex_lock(&priv->lock);
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while (instr->len > 0) {
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unsigned int pageaddr;
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int status;
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int do_block;
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/* Calculate flash page address; use block erase (for speed) if
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* we're at a block boundary and need to erase the whole block.
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*/
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pageaddr = instr->addr / priv->page_size;
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do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
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pageaddr = pageaddr << priv->page_offset;
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command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
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command[1] = (u8)(pageaddr >> 16);
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command[2] = (u8)(pageaddr >> 8);
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command[3] = 0;
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DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n",
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do_block ? "block" : "page",
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command[0], command[1], command[2], command[3],
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pageaddr);
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status = spi_sync(spi, &msg);
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(void) dataflash_waitready(spi);
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if (status < 0) {
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printk(KERN_ERR "%s: erase %x, err %d\n",
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spi->dev.bus_id, pageaddr, status);
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/* REVISIT: can retry instr->retries times; or
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* giveup and instr->fail_addr = instr->addr;
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*/
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continue;
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}
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if (do_block) {
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instr->addr += blocksize;
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instr->len -= blocksize;
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} else {
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instr->addr += priv->page_size;
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instr->len -= priv->page_size;
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}
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}
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mutex_unlock(&priv->lock);
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/* Inform MTD subsystem that erase is complete */
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instr->state = MTD_ERASE_DONE;
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mtd_erase_callback(instr);
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return 0;
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}
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/*
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* Read from the DataFlash device.
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* from : Start offset in flash device
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* len : Amount to read
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* retlen : About of data actually read
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* buf : Buffer containing the data
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*/
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static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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struct dataflash *priv = (struct dataflash *)mtd->priv;
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struct spi_transfer x[2] = { { .tx_dma = 0, }, };
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struct spi_message msg;
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unsigned int addr;
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u8 *command;
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int status;
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DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n",
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priv->spi->dev.bus_id, (unsigned)from, (unsigned)(from + len));
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*retlen = 0;
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/* Sanity checks */
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if (!len)
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return 0;
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if (from + len > mtd->size)
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return -EINVAL;
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/* Calculate flash page/byte address */
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addr = (((unsigned)from / priv->page_size) << priv->page_offset)
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+ ((unsigned)from % priv->page_size);
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command = priv->command;
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DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n",
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command[0], command[1], command[2], command[3]);
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spi_message_init(&msg);
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x[0].tx_buf = command;
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x[0].len = 8;
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spi_message_add_tail(&x[0], &msg);
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x[1].rx_buf = buf;
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x[1].len = len;
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spi_message_add_tail(&x[1], &msg);
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mutex_lock(&priv->lock);
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/* Continuous read, max clock = f(car) which may be less than
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* the peak rate available. Some chips support commands with
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* fewer "don't care" bytes. Both buffers stay unchanged.
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*/
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command[0] = OP_READ_CONTINUOUS;
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command[1] = (u8)(addr >> 16);
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command[2] = (u8)(addr >> 8);
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command[3] = (u8)(addr >> 0);
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/* plus 4 "don't care" bytes */
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281 |
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status = spi_sync(priv->spi, &msg);
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mutex_unlock(&priv->lock);
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285 |
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if (status >= 0) {
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*retlen = msg.actual_length - 8;
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status = 0;
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} else
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DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n",
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priv->spi->dev.bus_id,
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(unsigned)from, (unsigned)(from + len),
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status);
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return status;
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}
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/*
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297 |
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* Write to the DataFlash device.
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* to : Start offset in flash device
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* len : Amount to write
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* retlen : Amount of data actually written
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* buf : Buffer containing the data
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*/
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static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t * retlen, const u_char * buf)
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{
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306 |
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struct dataflash *priv = (struct dataflash *)mtd->priv;
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struct spi_device *spi = priv->spi;
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struct spi_transfer x[2] = { { .tx_dma = 0, }, };
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309 |
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struct spi_message msg;
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310 |
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unsigned int pageaddr, addr, offset, writelen;
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311 |
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size_t remaining = len;
|
312 |
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u_char *writebuf = (u_char *) buf;
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313 |
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int status = -EINVAL;
|
314 |
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u8 *command;
|
315 |
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|
316 |
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DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n",
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spi->dev.bus_id, (unsigned)to, (unsigned)(to + len));
|
318 |
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|
319 |
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*retlen = 0;
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320 |
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321 |
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/* Sanity checks */
|
322 |
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if (!len)
|
323 |
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return 0;
|
324 |
|
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if ((to + len) > mtd->size)
|
325 |
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return -EINVAL;
|
326 |
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|
327 |
|
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spi_message_init(&msg);
|
328 |
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|
329 |
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x[0].tx_buf = command = priv->command;
|
330 |
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x[0].len = 4;
|
331 |
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spi_message_add_tail(&x[0], &msg);
|
332 |
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|
333 |
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pageaddr = ((unsigned)to / priv->page_size);
|
334 |
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offset = ((unsigned)to % priv->page_size);
|
335 |
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if (offset + len > priv->page_size)
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336 |
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writelen = priv->page_size - offset;
|
337 |
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else
|
338 |
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writelen = len;
|
339 |
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|
340 |
|
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mutex_lock(&priv->lock);
|
341 |
|
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while (remaining > 0) {
|
342 |
|
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DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n",
|
343 |
|
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pageaddr, offset, writelen);
|
344 |
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|
345 |
|
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/* REVISIT:
|
346 |
|
|
* (a) each page in a sector must be rewritten at least
|
347 |
|
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* once every 10K sibling erase/program operations.
|
348 |
|
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* (b) for pages that are already erased, we could
|
349 |
|
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* use WRITE+MWRITE not PROGRAM for ~30% speedup.
|
350 |
|
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* (c) WRITE to buffer could be done while waiting for
|
351 |
|
|
* a previous MWRITE/MWERASE to complete ...
|
352 |
|
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* (d) error handling here seems to be mostly missing.
|
353 |
|
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*
|
354 |
|
|
* Two persistent bits per page, plus a per-sector counter,
|
355 |
|
|
* could support (a) and (b) ... we might consider using
|
356 |
|
|
* the second half of sector zero, which is just one block,
|
357 |
|
|
* to track that state. (On AT91, that sector should also
|
358 |
|
|
* support boot-from-DataFlash.)
|
359 |
|
|
*/
|
360 |
|
|
|
361 |
|
|
addr = pageaddr << priv->page_offset;
|
362 |
|
|
|
363 |
|
|
/* (1) Maybe transfer partial page to Buffer1 */
|
364 |
|
|
if (writelen != priv->page_size) {
|
365 |
|
|
command[0] = OP_TRANSFER_BUF1;
|
366 |
|
|
command[1] = (addr & 0x00FF0000) >> 16;
|
367 |
|
|
command[2] = (addr & 0x0000FF00) >> 8;
|
368 |
|
|
command[3] = 0;
|
369 |
|
|
|
370 |
|
|
DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n",
|
371 |
|
|
command[0], command[1], command[2], command[3]);
|
372 |
|
|
|
373 |
|
|
status = spi_sync(spi, &msg);
|
374 |
|
|
if (status < 0)
|
375 |
|
|
DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n",
|
376 |
|
|
spi->dev.bus_id, addr, status);
|
377 |
|
|
|
378 |
|
|
(void) dataflash_waitready(priv->spi);
|
379 |
|
|
}
|
380 |
|
|
|
381 |
|
|
/* (2) Program full page via Buffer1 */
|
382 |
|
|
addr += offset;
|
383 |
|
|
command[0] = OP_PROGRAM_VIA_BUF1;
|
384 |
|
|
command[1] = (addr & 0x00FF0000) >> 16;
|
385 |
|
|
command[2] = (addr & 0x0000FF00) >> 8;
|
386 |
|
|
command[3] = (addr & 0x000000FF);
|
387 |
|
|
|
388 |
|
|
DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n",
|
389 |
|
|
command[0], command[1], command[2], command[3]);
|
390 |
|
|
|
391 |
|
|
x[1].tx_buf = writebuf;
|
392 |
|
|
x[1].len = writelen;
|
393 |
|
|
spi_message_add_tail(x + 1, &msg);
|
394 |
|
|
status = spi_sync(spi, &msg);
|
395 |
|
|
spi_transfer_del(x + 1);
|
396 |
|
|
if (status < 0)
|
397 |
|
|
DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n",
|
398 |
|
|
spi->dev.bus_id, addr, writelen, status);
|
399 |
|
|
|
400 |
|
|
(void) dataflash_waitready(priv->spi);
|
401 |
|
|
|
402 |
|
|
|
403 |
|
|
#ifdef CONFIG_DATAFLASH_WRITE_VERIFY
|
404 |
|
|
|
405 |
|
|
/* (3) Compare to Buffer1 */
|
406 |
|
|
addr = pageaddr << priv->page_offset;
|
407 |
|
|
command[0] = OP_COMPARE_BUF1;
|
408 |
|
|
command[1] = (addr & 0x00FF0000) >> 16;
|
409 |
|
|
command[2] = (addr & 0x0000FF00) >> 8;
|
410 |
|
|
command[3] = 0;
|
411 |
|
|
|
412 |
|
|
DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n",
|
413 |
|
|
command[0], command[1], command[2], command[3]);
|
414 |
|
|
|
415 |
|
|
status = spi_sync(spi, &msg);
|
416 |
|
|
if (status < 0)
|
417 |
|
|
DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n",
|
418 |
|
|
spi->dev.bus_id, addr, status);
|
419 |
|
|
|
420 |
|
|
status = dataflash_waitready(priv->spi);
|
421 |
|
|
|
422 |
|
|
/* Check result of the compare operation */
|
423 |
|
|
if ((status & (1 << 6)) == 1) {
|
424 |
|
|
printk(KERN_ERR "%s: compare page %u, err %d\n",
|
425 |
|
|
spi->dev.bus_id, pageaddr, status);
|
426 |
|
|
remaining = 0;
|
427 |
|
|
status = -EIO;
|
428 |
|
|
break;
|
429 |
|
|
} else
|
430 |
|
|
status = 0;
|
431 |
|
|
|
432 |
|
|
#endif /* CONFIG_DATAFLASH_WRITE_VERIFY */
|
433 |
|
|
|
434 |
|
|
remaining = remaining - writelen;
|
435 |
|
|
pageaddr++;
|
436 |
|
|
offset = 0;
|
437 |
|
|
writebuf += writelen;
|
438 |
|
|
*retlen += writelen;
|
439 |
|
|
|
440 |
|
|
if (remaining > priv->page_size)
|
441 |
|
|
writelen = priv->page_size;
|
442 |
|
|
else
|
443 |
|
|
writelen = remaining;
|
444 |
|
|
}
|
445 |
|
|
mutex_unlock(&priv->lock);
|
446 |
|
|
|
447 |
|
|
return status;
|
448 |
|
|
}
|
449 |
|
|
|
450 |
|
|
/* ......................................................................... */
|
451 |
|
|
|
452 |
|
|
/*
|
453 |
|
|
* Register DataFlash device with MTD subsystem.
|
454 |
|
|
*/
|
455 |
|
|
static int __devinit
|
456 |
|
|
add_dataflash(struct spi_device *spi, char *name,
|
457 |
|
|
int nr_pages, int pagesize, int pageoffset)
|
458 |
|
|
{
|
459 |
|
|
struct dataflash *priv;
|
460 |
|
|
struct mtd_info *device;
|
461 |
|
|
struct flash_platform_data *pdata = spi->dev.platform_data;
|
462 |
|
|
|
463 |
|
|
priv = kzalloc(sizeof *priv, GFP_KERNEL);
|
464 |
|
|
if (!priv)
|
465 |
|
|
return -ENOMEM;
|
466 |
|
|
|
467 |
|
|
mutex_init(&priv->lock);
|
468 |
|
|
priv->spi = spi;
|
469 |
|
|
priv->page_size = pagesize;
|
470 |
|
|
priv->page_offset = pageoffset;
|
471 |
|
|
|
472 |
|
|
/* name must be usable with cmdlinepart */
|
473 |
|
|
sprintf(priv->name, "spi%d.%d-%s",
|
474 |
|
|
spi->master->bus_num, spi->chip_select,
|
475 |
|
|
name);
|
476 |
|
|
|
477 |
|
|
device = &priv->mtd;
|
478 |
|
|
device->name = (pdata && pdata->name) ? pdata->name : priv->name;
|
479 |
|
|
device->size = nr_pages * pagesize;
|
480 |
|
|
device->erasesize = pagesize;
|
481 |
|
|
device->writesize = pagesize;
|
482 |
|
|
device->owner = THIS_MODULE;
|
483 |
|
|
device->type = MTD_DATAFLASH;
|
484 |
|
|
device->flags = MTD_WRITEABLE;
|
485 |
|
|
device->erase = dataflash_erase;
|
486 |
|
|
device->read = dataflash_read;
|
487 |
|
|
device->write = dataflash_write;
|
488 |
|
|
device->priv = priv;
|
489 |
|
|
|
490 |
|
|
dev_info(&spi->dev, "%s (%d KBytes)\n", name, device->size/1024);
|
491 |
|
|
dev_set_drvdata(&spi->dev, priv);
|
492 |
|
|
|
493 |
|
|
if (mtd_has_partitions()) {
|
494 |
|
|
struct mtd_partition *parts;
|
495 |
|
|
int nr_parts = 0;
|
496 |
|
|
|
497 |
|
|
#ifdef CONFIG_MTD_CMDLINE_PARTS
|
498 |
|
|
static const char *part_probes[] = { "cmdlinepart", NULL, };
|
499 |
|
|
|
500 |
|
|
nr_parts = parse_mtd_partitions(device, part_probes, &parts, 0);
|
501 |
|
|
#endif
|
502 |
|
|
|
503 |
|
|
if (nr_parts <= 0 && pdata && pdata->parts) {
|
504 |
|
|
parts = pdata->parts;
|
505 |
|
|
nr_parts = pdata->nr_parts;
|
506 |
|
|
}
|
507 |
|
|
|
508 |
|
|
if (nr_parts > 0) {
|
509 |
|
|
priv->partitioned = 1;
|
510 |
|
|
return add_mtd_partitions(device, parts, nr_parts);
|
511 |
|
|
}
|
512 |
|
|
} else if (pdata && pdata->nr_parts)
|
513 |
|
|
dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
|
514 |
|
|
pdata->nr_parts, device->name);
|
515 |
|
|
|
516 |
|
|
return add_mtd_device(device) == 1 ? -ENODEV : 0;
|
517 |
|
|
}
|
518 |
|
|
|
519 |
|
|
/*
|
520 |
|
|
* Detect and initialize DataFlash device:
|
521 |
|
|
*
|
522 |
|
|
* Device Density ID code #Pages PageSize Offset
|
523 |
|
|
* AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
|
524 |
|
|
* AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1025 264 9
|
525 |
|
|
* AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
|
526 |
|
|
* AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
|
527 |
|
|
* AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
|
528 |
|
|
* AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
|
529 |
|
|
* AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
|
530 |
|
|
* AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
|
531 |
|
|
*/
|
532 |
|
|
static int __devinit dataflash_probe(struct spi_device *spi)
|
533 |
|
|
{
|
534 |
|
|
int status;
|
535 |
|
|
|
536 |
|
|
status = dataflash_status(spi);
|
537 |
|
|
if (status <= 0 || status == 0xff) {
|
538 |
|
|
DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n",
|
539 |
|
|
spi->dev.bus_id, status);
|
540 |
|
|
if (status == 0 || status == 0xff)
|
541 |
|
|
status = -ENODEV;
|
542 |
|
|
return status;
|
543 |
|
|
}
|
544 |
|
|
|
545 |
|
|
/* if there's a device there, assume it's dataflash.
|
546 |
|
|
* board setup should have set spi->max_speed_max to
|
547 |
|
|
* match f(car) for continuous reads, mode 0 or 3.
|
548 |
|
|
*/
|
549 |
|
|
switch (status & 0x3c) {
|
550 |
|
|
case 0x0c: /* 0 0 1 1 x x */
|
551 |
|
|
status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
|
552 |
|
|
break;
|
553 |
|
|
case 0x14: /* 0 1 0 1 x x */
|
554 |
|
|
status = add_dataflash(spi, "AT45DB021B", 1025, 264, 9);
|
555 |
|
|
break;
|
556 |
|
|
case 0x1c: /* 0 1 1 1 x x */
|
557 |
|
|
status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
|
558 |
|
|
break;
|
559 |
|
|
case 0x24: /* 1 0 0 1 x x */
|
560 |
|
|
status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
|
561 |
|
|
break;
|
562 |
|
|
case 0x2c: /* 1 0 1 1 x x */
|
563 |
|
|
status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
|
564 |
|
|
break;
|
565 |
|
|
case 0x34: /* 1 1 0 1 x x */
|
566 |
|
|
status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
|
567 |
|
|
break;
|
568 |
|
|
case 0x38: /* 1 1 1 x x x */
|
569 |
|
|
case 0x3c:
|
570 |
|
|
status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
|
571 |
|
|
break;
|
572 |
|
|
/* obsolete AT45DB1282 not (yet?) supported */
|
573 |
|
|
default:
|
574 |
|
|
DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n",
|
575 |
|
|
spi->dev.bus_id, status & 0x3c);
|
576 |
|
|
status = -ENODEV;
|
577 |
|
|
}
|
578 |
|
|
|
579 |
|
|
if (status < 0)
|
580 |
|
|
DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n",
|
581 |
|
|
spi->dev.bus_id, status);
|
582 |
|
|
|
583 |
|
|
return status;
|
584 |
|
|
}
|
585 |
|
|
|
586 |
|
|
static int __devexit dataflash_remove(struct spi_device *spi)
|
587 |
|
|
{
|
588 |
|
|
struct dataflash *flash = dev_get_drvdata(&spi->dev);
|
589 |
|
|
int status;
|
590 |
|
|
|
591 |
|
|
DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", spi->dev.bus_id);
|
592 |
|
|
|
593 |
|
|
if (mtd_has_partitions() && flash->partitioned)
|
594 |
|
|
status = del_mtd_partitions(&flash->mtd);
|
595 |
|
|
else
|
596 |
|
|
status = del_mtd_device(&flash->mtd);
|
597 |
|
|
if (status == 0)
|
598 |
|
|
kfree(flash);
|
599 |
|
|
return status;
|
600 |
|
|
}
|
601 |
|
|
|
602 |
|
|
static struct spi_driver dataflash_driver = {
|
603 |
|
|
.driver = {
|
604 |
|
|
.name = "mtd_dataflash",
|
605 |
|
|
.bus = &spi_bus_type,
|
606 |
|
|
.owner = THIS_MODULE,
|
607 |
|
|
},
|
608 |
|
|
|
609 |
|
|
.probe = dataflash_probe,
|
610 |
|
|
.remove = __devexit_p(dataflash_remove),
|
611 |
|
|
|
612 |
|
|
/* FIXME: investigate suspend and resume... */
|
613 |
|
|
};
|
614 |
|
|
|
615 |
|
|
static int __init dataflash_init(void)
|
616 |
|
|
{
|
617 |
|
|
return spi_register_driver(&dataflash_driver);
|
618 |
|
|
}
|
619 |
|
|
module_init(dataflash_init);
|
620 |
|
|
|
621 |
|
|
static void __exit dataflash_exit(void)
|
622 |
|
|
{
|
623 |
|
|
spi_unregister_driver(&dataflash_driver);
|
624 |
|
|
}
|
625 |
|
|
module_exit(dataflash_exit);
|
626 |
|
|
|
627 |
|
|
|
628 |
|
|
MODULE_LICENSE("GPL");
|
629 |
|
|
MODULE_AUTHOR("Andrew Victor, David Brownell");
|
630 |
|
|
MODULE_DESCRIPTION("MTD DataFlash driver");
|