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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [net/] [irda/] [nsc-ircc.c] - Blame information for rev 62

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1 62 marcus.erl
/*********************************************************************
2
 *
3
 * Filename:      nsc-ircc.c
4
 * Version:       1.0
5
 * Description:   Driver for the NSC PC'108 and PC'338 IrDA chipsets
6
 * Status:        Stable.
7
 * Author:        Dag Brattli <dagb@cs.uit.no>
8
 * Created at:    Sat Nov  7 21:43:15 1998
9
 * Modified at:   Wed Mar  1 11:29:34 2000
10
 * Modified by:   Dag Brattli <dagb@cs.uit.no>
11
 *
12
 *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13
 *     Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14
 *     Copyright (c) 1998 Actisys Corp., www.actisys.com
15
 *     Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
16
 *     All Rights Reserved
17
 *
18
 *     This program is free software; you can redistribute it and/or
19
 *     modify it under the terms of the GNU General Public License as
20
 *     published by the Free Software Foundation; either version 2 of
21
 *     the License, or (at your option) any later version.
22
 *
23
 *     Neither Dag Brattli nor University of Tromsø admit liability nor
24
 *     provide warranty for any of this software. This material is
25
 *     provided "AS-IS" and at no charge.
26
 *
27
 *     Notice that all functions that needs to access the chip in _any_
28
 *     way, must save BSR register on entry, and restore it on exit.
29
 *     It is _very_ important to follow this policy!
30
 *
31
 *         __u8 bank;
32
 *
33
 *         bank = inb(iobase+BSR);
34
 *
35
 *         do_your_stuff_here();
36
 *
37
 *         outb(bank, iobase+BSR);
38
 *
39
 *    If you find bugs in this file, its very likely that the same bug
40
 *    will also be in w83977af_ir.c since the implementations are quite
41
 *    similar.
42
 *
43
 ********************************************************************/
44
 
45
#include <linux/module.h>
46
 
47
#include <linux/kernel.h>
48
#include <linux/types.h>
49
#include <linux/skbuff.h>
50
#include <linux/netdevice.h>
51
#include <linux/ioport.h>
52
#include <linux/delay.h>
53
#include <linux/slab.h>
54
#include <linux/init.h>
55
#include <linux/rtnetlink.h>
56
#include <linux/dma-mapping.h>
57
#include <linux/pnp.h>
58
#include <linux/platform_device.h>
59
 
60
#include <asm/io.h>
61
#include <asm/dma.h>
62
#include <asm/byteorder.h>
63
 
64
#include <net/irda/wrapper.h>
65
#include <net/irda/irda.h>
66
#include <net/irda/irda_device.h>
67
 
68
#include "nsc-ircc.h"
69
 
70
#define CHIP_IO_EXTENT 8
71
#define BROKEN_DONGLE_ID
72
 
73
static char *driver_name = "nsc-ircc";
74
 
75
/* Power Management */
76
#define NSC_IRCC_DRIVER_NAME                  "nsc-ircc"
77
static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
78
static int nsc_ircc_resume(struct platform_device *dev);
79
 
80
static struct platform_driver nsc_ircc_driver = {
81
        .suspend        = nsc_ircc_suspend,
82
        .resume         = nsc_ircc_resume,
83
        .driver         = {
84
                .name   = NSC_IRCC_DRIVER_NAME,
85
        },
86
};
87
 
88
/* Module parameters */
89
static int qos_mtt_bits = 0x07;  /* 1 ms or more */
90
static int dongle_id;
91
 
92
/* Use BIOS settions by default, but user may supply module parameters */
93
static unsigned int io[]  = { ~0, ~0, ~0, ~0, ~0 };
94
static unsigned int irq[] = {  0,  0,  0,  0,  0 };
95
static unsigned int dma[] = {  0,  0,  0,  0,  0 };
96
 
97
static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
98
static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
99
static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
100
static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
101
static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
102
static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
103
static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
104
 
105
/* These are the known NSC chips */
106
static nsc_chip_t chips[] = {
107
/*  Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
108
        { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
109
          nsc_ircc_probe_108, nsc_ircc_init_108 },
110
        { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
111
          nsc_ircc_probe_338, nsc_ircc_init_338 },
112
        /* Contributed by Steffen Pingel - IBM X40 */
113
        { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
114
          nsc_ircc_probe_39x, nsc_ircc_init_39x },
115
        /* Contributed by Jan Frey - IBM A30/A31 */
116
        { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
117
          nsc_ircc_probe_39x, nsc_ircc_init_39x },
118
        /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
119
        { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
120
          nsc_ircc_probe_39x, nsc_ircc_init_39x },
121
        /* IBM ThinkPads using PC8394T (T43/R52/?) */
122
        { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
123
          nsc_ircc_probe_39x, nsc_ircc_init_39x },
124
        { NULL }
125
};
126
 
127
static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
128
 
129
static char *dongle_types[] = {
130
        "Differential serial interface",
131
        "Differential serial interface",
132
        "Reserved",
133
        "Reserved",
134
        "Sharp RY5HD01",
135
        "Reserved",
136
        "Single-ended serial interface",
137
        "Consumer-IR only",
138
        "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
139
        "IBM31T1100 or Temic TFDS6000/TFDS6500",
140
        "Reserved",
141
        "Reserved",
142
        "HP HSDL-1100/HSDL-2100",
143
        "HP HSDL-1100/HSDL-2100",
144
        "Supports SIR Mode only",
145
        "No dongle connected",
146
};
147
 
148
/* PNP probing */
149
static chipio_t pnp_info;
150
static const struct pnp_device_id nsc_ircc_pnp_table[] = {
151
        { .id = "NSC6001", .driver_data = 0 },
152
        { .id = "IBM0071", .driver_data = 0 },
153
        { }
154
};
155
 
156
MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
157
 
158
static struct pnp_driver nsc_ircc_pnp_driver = {
159
        .name = "nsc-ircc",
160
        .id_table = nsc_ircc_pnp_table,
161
        .probe = nsc_ircc_pnp_probe,
162
};
163
 
164
/* Some prototypes */
165
static int  nsc_ircc_open(chipio_t *info);
166
static int  nsc_ircc_close(struct nsc_ircc_cb *self);
167
static int  nsc_ircc_setup(chipio_t *info);
168
static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
169
static int  nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
170
static int  nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
171
static int  nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
172
static int  nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
173
static int  nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
174
static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
175
static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
176
static int  nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
177
static int  nsc_ircc_read_dongle_id (int iobase);
178
static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
179
 
180
static int  nsc_ircc_net_open(struct net_device *dev);
181
static int  nsc_ircc_net_close(struct net_device *dev);
182
static int  nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
183
static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
184
 
185
/* Globals */
186
static int pnp_registered;
187
static int pnp_succeeded;
188
 
189
/*
190
 * Function nsc_ircc_init ()
191
 *
192
 *    Initialize chip. Just try to find out how many chips we are dealing with
193
 *    and where they are
194
 */
195
static int __init nsc_ircc_init(void)
196
{
197
        chipio_t info;
198
        nsc_chip_t *chip;
199
        int ret;
200
        int cfg_base;
201
        int cfg, id;
202
        int reg;
203
        int i = 0;
204
 
205
        ret = platform_driver_register(&nsc_ircc_driver);
206
        if (ret) {
207
                IRDA_ERROR("%s, Can't register driver!\n", driver_name);
208
                return ret;
209
        }
210
 
211
        /* Register with PnP subsystem to detect disable ports */
212
        ret = pnp_register_driver(&nsc_ircc_pnp_driver);
213
 
214
        if (!ret)
215
                pnp_registered = 1;
216
 
217
        ret = -ENODEV;
218
 
219
        /* Probe for all the NSC chipsets we know about */
220
        for (chip = chips; chip->name ; chip++) {
221
                IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
222
                           chip->name);
223
 
224
                /* Try all config registers for this chip */
225
                for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
226
                        cfg_base = chip->cfg[cfg];
227
                        if (!cfg_base)
228
                                continue;
229
 
230
                        /* Read index register */
231
                        reg = inb(cfg_base);
232
                        if (reg == 0xff) {
233
                                IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
234
                                continue;
235
                        }
236
 
237
                        /* Read chip identification register */
238
                        outb(chip->cid_index, cfg_base);
239
                        id = inb(cfg_base+1);
240
                        if ((id & chip->cid_mask) == chip->cid_value) {
241
                                IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
242
                                           __FUNCTION__, chip->name, id & ~chip->cid_mask);
243
 
244
                                /*
245
                                 * If we found a correct PnP setting,
246
                                 * we first try it.
247
                                 */
248
                                if (pnp_succeeded) {
249
                                        memset(&info, 0, sizeof(chipio_t));
250
                                        info.cfg_base = cfg_base;
251
                                        info.fir_base = pnp_info.fir_base;
252
                                        info.dma = pnp_info.dma;
253
                                        info.irq = pnp_info.irq;
254
 
255
                                        if (info.fir_base < 0x2000) {
256
                                                IRDA_MESSAGE("%s, chip->init\n", driver_name);
257
                                                chip->init(chip, &info);
258
                                        } else
259
                                                chip->probe(chip, &info);
260
 
261
                                        if (nsc_ircc_open(&info) >= 0)
262
                                                ret = 0;
263
                                }
264
 
265
                                /*
266
                                 * Opening based on PnP values failed.
267
                                 * Let's fallback to user values, or probe
268
                                 * the chip.
269
                                 */
270
                                if (ret) {
271
                                        IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
272
                                        memset(&info, 0, sizeof(chipio_t));
273
                                        info.cfg_base = cfg_base;
274
                                        info.fir_base = io[i];
275
                                        info.dma = dma[i];
276
                                        info.irq = irq[i];
277
 
278
                                        /*
279
                                         * If the user supplies the base address, then
280
                                         * we init the chip, if not we probe the values
281
                                         * set by the BIOS
282
                                         */
283
                                        if (io[i] < 0x2000) {
284
                                                chip->init(chip, &info);
285
                                        } else
286
                                                chip->probe(chip, &info);
287
 
288
                                        if (nsc_ircc_open(&info) >= 0)
289
                                                ret = 0;
290
                                }
291
                                i++;
292
                        } else {
293
                                IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
294
                        }
295
                }
296
        }
297
 
298
        if (ret) {
299
                platform_driver_unregister(&nsc_ircc_driver);
300
                pnp_unregister_driver(&nsc_ircc_pnp_driver);
301
                pnp_registered = 0;
302
        }
303
 
304
        return ret;
305
}
306
 
307
/*
308
 * Function nsc_ircc_cleanup ()
309
 *
310
 *    Close all configured chips
311
 *
312
 */
313
static void __exit nsc_ircc_cleanup(void)
314
{
315
        int i;
316
 
317
        for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
318
                if (dev_self[i])
319
                        nsc_ircc_close(dev_self[i]);
320
        }
321
 
322
        platform_driver_unregister(&nsc_ircc_driver);
323
 
324
        if (pnp_registered)
325
                pnp_unregister_driver(&nsc_ircc_pnp_driver);
326
 
327
        pnp_registered = 0;
328
}
329
 
330
/*
331
 * Function nsc_ircc_open (iobase, irq)
332
 *
333
 *    Open driver instance
334
 *
335
 */
336
static int __init nsc_ircc_open(chipio_t *info)
337
{
338
        struct net_device *dev;
339
        struct nsc_ircc_cb *self;
340
        void *ret;
341
        int err, chip_index;
342
 
343
        IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
344
 
345
 
346
        for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
347
                if (!dev_self[chip_index])
348
                        break;
349
        }
350
 
351
        if (chip_index == ARRAY_SIZE(dev_self)) {
352
                IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __FUNCTION__);
353
                return -ENOMEM;
354
        }
355
 
356
        IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
357
                     info->cfg_base);
358
 
359
        if ((nsc_ircc_setup(info)) == -1)
360
                return -1;
361
 
362
        IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
363
 
364
        dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
365
        if (dev == NULL) {
366
                IRDA_ERROR("%s(), can't allocate memory for "
367
                           "control block!\n", __FUNCTION__);
368
                return -ENOMEM;
369
        }
370
 
371
        self = dev->priv;
372
        self->netdev = dev;
373
        spin_lock_init(&self->lock);
374
 
375
        /* Need to store self somewhere */
376
        dev_self[chip_index] = self;
377
        self->index = chip_index;
378
 
379
        /* Initialize IO */
380
        self->io.cfg_base  = info->cfg_base;
381
        self->io.fir_base  = info->fir_base;
382
        self->io.irq       = info->irq;
383
        self->io.fir_ext   = CHIP_IO_EXTENT;
384
        self->io.dma       = info->dma;
385
        self->io.fifo_size = 32;
386
 
387
        /* Reserve the ioports that we need */
388
        ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
389
        if (!ret) {
390
                IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
391
                             __FUNCTION__, self->io.fir_base);
392
                err = -ENODEV;
393
                goto out1;
394
        }
395
 
396
        /* Initialize QoS for this device */
397
        irda_init_max_qos_capabilies(&self->qos);
398
 
399
        /* The only value we must override it the baudrate */
400
        self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
401
                IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
402
 
403
        self->qos.min_turn_time.bits = qos_mtt_bits;
404
        irda_qos_bits_to_value(&self->qos);
405
 
406
        /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
407
        self->rx_buff.truesize = 14384;
408
        self->tx_buff.truesize = 14384;
409
 
410
        /* Allocate memory if needed */
411
        self->rx_buff.head =
412
                dma_alloc_coherent(NULL, self->rx_buff.truesize,
413
                                   &self->rx_buff_dma, GFP_KERNEL);
414
        if (self->rx_buff.head == NULL) {
415
                err = -ENOMEM;
416
                goto out2;
417
 
418
        }
419
        memset(self->rx_buff.head, 0, self->rx_buff.truesize);
420
 
421
        self->tx_buff.head =
422
                dma_alloc_coherent(NULL, self->tx_buff.truesize,
423
                                   &self->tx_buff_dma, GFP_KERNEL);
424
        if (self->tx_buff.head == NULL) {
425
                err = -ENOMEM;
426
                goto out3;
427
        }
428
        memset(self->tx_buff.head, 0, self->tx_buff.truesize);
429
 
430
        self->rx_buff.in_frame = FALSE;
431
        self->rx_buff.state = OUTSIDE_FRAME;
432
        self->tx_buff.data = self->tx_buff.head;
433
        self->rx_buff.data = self->rx_buff.head;
434
 
435
        /* Reset Tx queue info */
436
        self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
437
        self->tx_fifo.tail = self->tx_buff.head;
438
 
439
        /* Override the network functions we need to use */
440
        dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
441
        dev->open            = nsc_ircc_net_open;
442
        dev->stop            = nsc_ircc_net_close;
443
        dev->do_ioctl        = nsc_ircc_net_ioctl;
444
        dev->get_stats       = nsc_ircc_net_get_stats;
445
 
446
        err = register_netdev(dev);
447
        if (err) {
448
                IRDA_ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
449
                goto out4;
450
        }
451
        IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
452
 
453
        /* Check if user has supplied a valid dongle id or not */
454
        if ((dongle_id <= 0) ||
455
            (dongle_id >= ARRAY_SIZE(dongle_types))) {
456
                dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
457
 
458
                IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
459
                             dongle_types[dongle_id]);
460
        } else {
461
                IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
462
                             dongle_types[dongle_id]);
463
        }
464
 
465
        self->io.dongle_id = dongle_id;
466
        nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
467
 
468
        self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
469
                                                      self->index, NULL, 0);
470
        if (IS_ERR(self->pldev)) {
471
                err = PTR_ERR(self->pldev);
472
                goto out5;
473
        }
474
        platform_set_drvdata(self->pldev, self);
475
 
476
        return chip_index;
477
 
478
 out5:
479
        unregister_netdev(dev);
480
 out4:
481
        dma_free_coherent(NULL, self->tx_buff.truesize,
482
                          self->tx_buff.head, self->tx_buff_dma);
483
 out3:
484
        dma_free_coherent(NULL, self->rx_buff.truesize,
485
                          self->rx_buff.head, self->rx_buff_dma);
486
 out2:
487
        release_region(self->io.fir_base, self->io.fir_ext);
488
 out1:
489
        free_netdev(dev);
490
        dev_self[chip_index] = NULL;
491
        return err;
492
}
493
 
494
/*
495
 * Function nsc_ircc_close (self)
496
 *
497
 *    Close driver instance
498
 *
499
 */
500
static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
501
{
502
        int iobase;
503
 
504
        IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
505
 
506
        IRDA_ASSERT(self != NULL, return -1;);
507
 
508
        iobase = self->io.fir_base;
509
 
510
        platform_device_unregister(self->pldev);
511
 
512
        /* Remove netdevice */
513
        unregister_netdev(self->netdev);
514
 
515
        /* Release the PORT that this driver is using */
516
        IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
517
                   __FUNCTION__, self->io.fir_base);
518
        release_region(self->io.fir_base, self->io.fir_ext);
519
 
520
        if (self->tx_buff.head)
521
                dma_free_coherent(NULL, self->tx_buff.truesize,
522
                                  self->tx_buff.head, self->tx_buff_dma);
523
 
524
        if (self->rx_buff.head)
525
                dma_free_coherent(NULL, self->rx_buff.truesize,
526
                                  self->rx_buff.head, self->rx_buff_dma);
527
 
528
        dev_self[self->index] = NULL;
529
        free_netdev(self->netdev);
530
 
531
        return 0;
532
}
533
 
534
/*
535
 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
536
 *
537
 *    Initialize the NSC '108 chip
538
 *
539
 */
540
static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
541
{
542
        int cfg_base = info->cfg_base;
543
        __u8 temp=0;
544
 
545
        outb(2, cfg_base);      /* Mode Control Register (MCTL) */
546
        outb(0x00, cfg_base+1); /* Disable device */
547
 
548
        /* Base Address and Interrupt Control Register (BAIC) */
549
        outb(CFG_108_BAIC, cfg_base);
550
        switch (info->fir_base) {
551
        case 0x3e8: outb(0x14, cfg_base+1); break;
552
        case 0x2e8: outb(0x15, cfg_base+1); break;
553
        case 0x3f8: outb(0x16, cfg_base+1); break;
554
        case 0x2f8: outb(0x17, cfg_base+1); break;
555
        default: IRDA_ERROR("%s(), invalid base_address", __FUNCTION__);
556
        }
557
 
558
        /* Control Signal Routing Register (CSRT) */
559
        switch (info->irq) {
560
        case 3:  temp = 0x01; break;
561
        case 4:  temp = 0x02; break;
562
        case 5:  temp = 0x03; break;
563
        case 7:  temp = 0x04; break;
564
        case 9:  temp = 0x05; break;
565
        case 11: temp = 0x06; break;
566
        case 15: temp = 0x07; break;
567
        default: IRDA_ERROR("%s(), invalid irq", __FUNCTION__);
568
        }
569
        outb(CFG_108_CSRT, cfg_base);
570
 
571
        switch (info->dma) {
572
        case 0: outb(0x08+temp, cfg_base+1); break;
573
        case 1: outb(0x10+temp, cfg_base+1); break;
574
        case 3: outb(0x18+temp, cfg_base+1); break;
575
        default: IRDA_ERROR("%s(), invalid dma", __FUNCTION__);
576
        }
577
 
578
        outb(CFG_108_MCTL, cfg_base);      /* Mode Control Register (MCTL) */
579
        outb(0x03, cfg_base+1); /* Enable device */
580
 
581
        return 0;
582
}
583
 
584
/*
585
 * Function nsc_ircc_probe_108 (chip, info)
586
 *
587
 *
588
 *
589
 */
590
static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
591
{
592
        int cfg_base = info->cfg_base;
593
        int reg;
594
 
595
        /* Read address and interrupt control register (BAIC) */
596
        outb(CFG_108_BAIC, cfg_base);
597
        reg = inb(cfg_base+1);
598
 
599
        switch (reg & 0x03) {
600
        case 0:
601
                info->fir_base = 0x3e8;
602
                break;
603
        case 1:
604
                info->fir_base = 0x2e8;
605
                break;
606
        case 2:
607
                info->fir_base = 0x3f8;
608
                break;
609
        case 3:
610
                info->fir_base = 0x2f8;
611
                break;
612
        }
613
        info->sir_base = info->fir_base;
614
        IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
615
                   info->fir_base);
616
 
617
        /* Read control signals routing register (CSRT) */
618
        outb(CFG_108_CSRT, cfg_base);
619
        reg = inb(cfg_base+1);
620
 
621
        switch (reg & 0x07) {
622
        case 0:
623
                info->irq = -1;
624
                break;
625
        case 1:
626
                info->irq = 3;
627
                break;
628
        case 2:
629
                info->irq = 4;
630
                break;
631
        case 3:
632
                info->irq = 5;
633
                break;
634
        case 4:
635
                info->irq = 7;
636
                break;
637
        case 5:
638
                info->irq = 9;
639
                break;
640
        case 6:
641
                info->irq = 11;
642
                break;
643
        case 7:
644
                info->irq = 15;
645
                break;
646
        }
647
        IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
648
 
649
        /* Currently we only read Rx DMA but it will also be used for Tx */
650
        switch ((reg >> 3) & 0x03) {
651
        case 0:
652
                info->dma = -1;
653
                break;
654
        case 1:
655
                info->dma = 0;
656
                break;
657
        case 2:
658
                info->dma = 1;
659
                break;
660
        case 3:
661
                info->dma = 3;
662
                break;
663
        }
664
        IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
665
 
666
        /* Read mode control register (MCTL) */
667
        outb(CFG_108_MCTL, cfg_base);
668
        reg = inb(cfg_base+1);
669
 
670
        info->enabled = reg & 0x01;
671
        info->suspended = !((reg >> 1) & 0x01);
672
 
673
        return 0;
674
}
675
 
676
/*
677
 * Function nsc_ircc_init_338 (chip, info)
678
 *
679
 *    Initialize the NSC '338 chip. Remember that the 87338 needs two
680
 *    consecutive writes to the data registers while CPU interrupts are
681
 *    disabled. The 97338 does not require this, but shouldn't be any
682
 *    harm if we do it anyway.
683
 */
684
static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
685
{
686
        /* No init yet */
687
 
688
        return 0;
689
}
690
 
691
/*
692
 * Function nsc_ircc_probe_338 (chip, info)
693
 *
694
 *
695
 *
696
 */
697
static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
698
{
699
        int cfg_base = info->cfg_base;
700
        int reg, com = 0;
701
        int pnp;
702
 
703
        /* Read funtion enable register (FER) */
704
        outb(CFG_338_FER, cfg_base);
705
        reg = inb(cfg_base+1);
706
 
707
        info->enabled = (reg >> 2) & 0x01;
708
 
709
        /* Check if we are in Legacy or PnP mode */
710
        outb(CFG_338_PNP0, cfg_base);
711
        reg = inb(cfg_base+1);
712
 
713
        pnp = (reg >> 3) & 0x01;
714
        if (pnp) {
715
                IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
716
                outb(0x46, cfg_base);
717
                reg = (inb(cfg_base+1) & 0xfe) << 2;
718
 
719
                outb(0x47, cfg_base);
720
                reg |= ((inb(cfg_base+1) & 0xfc) << 8);
721
 
722
                info->fir_base = reg;
723
        } else {
724
                /* Read function address register (FAR) */
725
                outb(CFG_338_FAR, cfg_base);
726
                reg = inb(cfg_base+1);
727
 
728
                switch ((reg >> 4) & 0x03) {
729
                case 0:
730
                        info->fir_base = 0x3f8;
731
                        break;
732
                case 1:
733
                        info->fir_base = 0x2f8;
734
                        break;
735
                case 2:
736
                        com = 3;
737
                        break;
738
                case 3:
739
                        com = 4;
740
                        break;
741
                }
742
 
743
                if (com) {
744
                        switch ((reg >> 6) & 0x03) {
745
                        case 0:
746
                                if (com == 3)
747
                                        info->fir_base = 0x3e8;
748
                                else
749
                                        info->fir_base = 0x2e8;
750
                                break;
751
                        case 1:
752
                                if (com == 3)
753
                                        info->fir_base = 0x338;
754
                                else
755
                                        info->fir_base = 0x238;
756
                                break;
757
                        case 2:
758
                                if (com == 3)
759
                                        info->fir_base = 0x2e8;
760
                                else
761
                                        info->fir_base = 0x2e0;
762
                                break;
763
                        case 3:
764
                                if (com == 3)
765
                                        info->fir_base = 0x220;
766
                                else
767
                                        info->fir_base = 0x228;
768
                                break;
769
                        }
770
                }
771
        }
772
        info->sir_base = info->fir_base;
773
 
774
        /* Read PnP register 1 (PNP1) */
775
        outb(CFG_338_PNP1, cfg_base);
776
        reg = inb(cfg_base+1);
777
 
778
        info->irq = reg >> 4;
779
 
780
        /* Read PnP register 3 (PNP3) */
781
        outb(CFG_338_PNP3, cfg_base);
782
        reg = inb(cfg_base+1);
783
 
784
        info->dma = (reg & 0x07) - 1;
785
 
786
        /* Read power and test register (PTR) */
787
        outb(CFG_338_PTR, cfg_base);
788
        reg = inb(cfg_base+1);
789
 
790
        info->suspended = reg & 0x01;
791
 
792
        return 0;
793
}
794
 
795
 
796
/*
797
 * Function nsc_ircc_init_39x (chip, info)
798
 *
799
 *    Now that we know it's a '39x (see probe below), we need to
800
 *    configure it so we can use it.
801
 *
802
 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
803
 * the configuration of the different functionality (serial, parallel,
804
 * floppy...) are each in a different bank (Logical Device Number).
805
 * The base address, irq and dma configuration registers are common
806
 * to all functionalities (index 0x30 to 0x7F).
807
 * There is only one configuration register specific to the
808
 * serial port, CFG_39X_SPC.
809
 * JeanII
810
 *
811
 * Note : this code was written by Jan Frey <janfrey@web.de>
812
 */
813
static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
814
{
815
        int cfg_base = info->cfg_base;
816
        int enabled;
817
 
818
        /* User is sure about his config... accept it. */
819
        IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
820
                   "io=0x%04x, irq=%d, dma=%d\n",
821
                   __FUNCTION__, info->fir_base, info->irq, info->dma);
822
 
823
        /* Access bank for SP2 */
824
        outb(CFG_39X_LDN, cfg_base);
825
        outb(0x02, cfg_base+1);
826
 
827
        /* Configure SP2 */
828
 
829
        /* We want to enable the device if not enabled */
830
        outb(CFG_39X_ACT, cfg_base);
831
        enabled = inb(cfg_base+1) & 0x01;
832
 
833
        if (!enabled) {
834
                /* Enable the device */
835
                outb(CFG_39X_SIOCF1, cfg_base);
836
                outb(0x01, cfg_base+1);
837
                /* May want to update info->enabled. Jean II */
838
        }
839
 
840
        /* Enable UART bank switching (bit 7) ; Sets the chip to normal
841
         * power mode (wake up from sleep mode) (bit 1) */
842
        outb(CFG_39X_SPC, cfg_base);
843
        outb(0x82, cfg_base+1);
844
 
845
        return 0;
846
}
847
 
848
/*
849
 * Function nsc_ircc_probe_39x (chip, info)
850
 *
851
 *    Test if we really have a '39x chip at the given address
852
 *
853
 * Note : this code was written by Jan Frey <janfrey@web.de>
854
 */
855
static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
856
{
857
        int cfg_base = info->cfg_base;
858
        int reg1, reg2, irq, irqt, dma1, dma2;
859
        int enabled, susp;
860
 
861
        IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
862
                   __FUNCTION__, cfg_base);
863
 
864
        /* This function should be executed with irq off to avoid
865
         * another driver messing with the Super I/O bank - Jean II */
866
 
867
        /* Access bank for SP2 */
868
        outb(CFG_39X_LDN, cfg_base);
869
        outb(0x02, cfg_base+1);
870
 
871
        /* Read infos about SP2 ; store in info struct */
872
        outb(CFG_39X_BASEH, cfg_base);
873
        reg1 = inb(cfg_base+1);
874
        outb(CFG_39X_BASEL, cfg_base);
875
        reg2 = inb(cfg_base+1);
876
        info->fir_base = (reg1 << 8) | reg2;
877
 
878
        outb(CFG_39X_IRQNUM, cfg_base);
879
        irq = inb(cfg_base+1);
880
        outb(CFG_39X_IRQSEL, cfg_base);
881
        irqt = inb(cfg_base+1);
882
        info->irq = irq;
883
 
884
        outb(CFG_39X_DMA0, cfg_base);
885
        dma1 = inb(cfg_base+1);
886
        outb(CFG_39X_DMA1, cfg_base);
887
        dma2 = inb(cfg_base+1);
888
        info->dma = dma1 -1;
889
 
890
        outb(CFG_39X_ACT, cfg_base);
891
        info->enabled = enabled = inb(cfg_base+1) & 0x01;
892
 
893
        outb(CFG_39X_SPC, cfg_base);
894
        susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
895
 
896
        IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
897
 
898
        /* Configure SP2 */
899
 
900
        /* We want to enable the device if not enabled */
901
        outb(CFG_39X_ACT, cfg_base);
902
        enabled = inb(cfg_base+1) & 0x01;
903
 
904
        if (!enabled) {
905
                /* Enable the device */
906
                outb(CFG_39X_SIOCF1, cfg_base);
907
                outb(0x01, cfg_base+1);
908
                /* May want to update info->enabled. Jean II */
909
        }
910
 
911
        /* Enable UART bank switching (bit 7) ; Sets the chip to normal
912
         * power mode (wake up from sleep mode) (bit 1) */
913
        outb(CFG_39X_SPC, cfg_base);
914
        outb(0x82, cfg_base+1);
915
 
916
        return 0;
917
}
918
 
919
/* PNP probing */
920
static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
921
{
922
        memset(&pnp_info, 0, sizeof(chipio_t));
923
        pnp_info.irq = -1;
924
        pnp_info.dma = -1;
925
        pnp_succeeded = 1;
926
 
927
        /* There don't seem to be any way to get the cfg_base.
928
         * On my box, cfg_base is in the PnP descriptor of the
929
         * motherboard. Oh well... Jean II */
930
 
931
        if (pnp_port_valid(dev, 0) &&
932
                !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
933
                pnp_info.fir_base = pnp_port_start(dev, 0);
934
 
935
        if (pnp_irq_valid(dev, 0) &&
936
                !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
937
                pnp_info.irq = pnp_irq(dev, 0);
938
 
939
        if (pnp_dma_valid(dev, 0) &&
940
                !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
941
                pnp_info.dma = pnp_dma(dev, 0);
942
 
943
        IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
944
                   __FUNCTION__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
945
 
946
        if((pnp_info.fir_base == 0) ||
947
           (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
948
                /* Returning an error will disable the device. Yuck ! */
949
                //return -EINVAL;
950
                pnp_succeeded = 0;
951
        }
952
 
953
        return 0;
954
}
955
 
956
/*
957
 * Function nsc_ircc_setup (info)
958
 *
959
 *    Returns non-negative on success.
960
 *
961
 */
962
static int nsc_ircc_setup(chipio_t *info)
963
{
964
        int version;
965
        int iobase = info->fir_base;
966
 
967
        /* Read the Module ID */
968
        switch_bank(iobase, BANK3);
969
        version = inb(iobase+MID);
970
 
971
        IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
972
                   __FUNCTION__, driver_name, version);
973
 
974
        /* Should be 0x2? */
975
        if (0x20 != (version & 0xf0)) {
976
                IRDA_ERROR("%s, Wrong chip version %02x\n",
977
                           driver_name, version);
978
                return -1;
979
        }
980
 
981
        /* Switch to advanced mode */
982
        switch_bank(iobase, BANK2);
983
        outb(ECR1_EXT_SL, iobase+ECR1);
984
        switch_bank(iobase, BANK0);
985
 
986
        /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
987
        switch_bank(iobase, BANK0);
988
        outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
989
 
990
        outb(0x03, iobase+LCR);         /* 8 bit word length */
991
        outb(MCR_SIR, iobase+MCR);      /* Start at SIR-mode, also clears LSR*/
992
 
993
        /* Set FIFO size to 32 */
994
        switch_bank(iobase, BANK2);
995
        outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
996
 
997
        /* IRCR2: FEND_MD is not set */
998
        switch_bank(iobase, BANK5);
999
        outb(0x02, iobase+4);
1000
 
1001
        /* Make sure that some defaults are OK */
1002
        switch_bank(iobase, BANK6);
1003
        outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1004
        outb(0x0a, iobase+1); /* Set MIR pulse width */
1005
        outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1006
        outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1007
 
1008
        /* Enable receive interrupts */
1009
        switch_bank(iobase, BANK0);
1010
        outb(IER_RXHDL_IE, iobase+IER);
1011
 
1012
        return 0;
1013
}
1014
 
1015
/*
1016
 * Function nsc_ircc_read_dongle_id (void)
1017
 *
1018
 * Try to read dongle indentification. This procedure needs to be executed
1019
 * once after power-on/reset. It also needs to be used whenever you suspect
1020
 * that the user may have plugged/unplugged the IrDA Dongle.
1021
 */
1022
static int nsc_ircc_read_dongle_id (int iobase)
1023
{
1024
        int dongle_id;
1025
        __u8 bank;
1026
 
1027
        bank = inb(iobase+BSR);
1028
 
1029
        /* Select Bank 7 */
1030
        switch_bank(iobase, BANK7);
1031
 
1032
        /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1033
        outb(0x00, iobase+7);
1034
 
1035
        /* ID0, 1, and 2 are pulled up/down very slowly */
1036
        udelay(50);
1037
 
1038
        /* IRCFG1: read the ID bits */
1039
        dongle_id = inb(iobase+4) & 0x0f;
1040
 
1041
#ifdef BROKEN_DONGLE_ID
1042
        if (dongle_id == 0x0a)
1043
                dongle_id = 0x09;
1044
#endif  
1045
        /* Go back to  bank 0 before returning */
1046
        switch_bank(iobase, BANK0);
1047
 
1048
        outb(bank, iobase+BSR);
1049
 
1050
        return dongle_id;
1051
}
1052
 
1053
/*
1054
 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1055
 *
1056
 *     This function initializes the dongle for the transceiver that is
1057
 *     used. This procedure needs to be executed once after
1058
 *     power-on/reset. It also needs to be used whenever you suspect that
1059
 *     the dongle is changed.
1060
 */
1061
static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1062
{
1063
        int bank;
1064
 
1065
        /* Save current bank */
1066
        bank = inb(iobase+BSR);
1067
 
1068
        /* Select Bank 7 */
1069
        switch_bank(iobase, BANK7);
1070
 
1071
        /* IRCFG4: set according to dongle_id */
1072
        switch (dongle_id) {
1073
        case 0x00: /* same as */
1074
        case 0x01: /* Differential serial interface */
1075
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1076
                           __FUNCTION__, dongle_types[dongle_id]);
1077
                break;
1078
        case 0x02: /* same as */
1079
        case 0x03: /* Reserved */
1080
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1081
                           __FUNCTION__, dongle_types[dongle_id]);
1082
                break;
1083
        case 0x04: /* Sharp RY5HD01 */
1084
                break;
1085
        case 0x05: /* Reserved, but this is what the Thinkpad reports */
1086
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1087
                           __FUNCTION__, dongle_types[dongle_id]);
1088
                break;
1089
        case 0x06: /* Single-ended serial interface */
1090
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1091
                           __FUNCTION__, dongle_types[dongle_id]);
1092
                break;
1093
        case 0x07: /* Consumer-IR only */
1094
                IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1095
                           __FUNCTION__, dongle_types[dongle_id]);
1096
                break;
1097
        case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1098
                IRDA_DEBUG(0, "%s(), %s\n",
1099
                           __FUNCTION__, dongle_types[dongle_id]);
1100
                break;
1101
        case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1102
                outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1103
                break;
1104
        case 0x0A: /* same as */
1105
        case 0x0B: /* Reserved */
1106
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1107
                           __FUNCTION__, dongle_types[dongle_id]);
1108
                break;
1109
        case 0x0C: /* same as */
1110
        case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1111
                /*
1112
                 * Set irsl0 as input, irsl[1-2] as output, and separate
1113
                 * inputs are used for SIR and MIR/FIR
1114
                 */
1115
                outb(0x48, iobase+7);
1116
                break;
1117
        case 0x0E: /* Supports SIR Mode only */
1118
                outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1119
                break;
1120
        case 0x0F: /* No dongle connected */
1121
                IRDA_DEBUG(0, "%s(), %s\n",
1122
                           __FUNCTION__, dongle_types[dongle_id]);
1123
 
1124
                switch_bank(iobase, BANK0);
1125
                outb(0x62, iobase+MCR);
1126
                break;
1127
        default:
1128
                IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
1129
                           __FUNCTION__, dongle_id);
1130
        }
1131
 
1132
        /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1133
        outb(0x00, iobase+4);
1134
 
1135
        /* Restore bank register */
1136
        outb(bank, iobase+BSR);
1137
 
1138
} /* set_up_dongle_interface */
1139
 
1140
/*
1141
 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1142
 *
1143
 *    Change speed of the attach dongle
1144
 *
1145
 */
1146
static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1147
{
1148
        __u8 bank;
1149
 
1150
        /* Save current bank */
1151
        bank = inb(iobase+BSR);
1152
 
1153
        /* Select Bank 7 */
1154
        switch_bank(iobase, BANK7);
1155
 
1156
        /* IRCFG1: set according to dongle_id */
1157
        switch (dongle_id) {
1158
        case 0x00: /* same as */
1159
        case 0x01: /* Differential serial interface */
1160
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1161
                           __FUNCTION__, dongle_types[dongle_id]);
1162
                break;
1163
        case 0x02: /* same as */
1164
        case 0x03: /* Reserved */
1165
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1166
                           __FUNCTION__, dongle_types[dongle_id]);
1167
                break;
1168
        case 0x04: /* Sharp RY5HD01 */
1169
                break;
1170
        case 0x05: /* Reserved */
1171
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1172
                           __FUNCTION__, dongle_types[dongle_id]);
1173
                break;
1174
        case 0x06: /* Single-ended serial interface */
1175
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1176
                           __FUNCTION__, dongle_types[dongle_id]);
1177
                break;
1178
        case 0x07: /* Consumer-IR only */
1179
                IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1180
                           __FUNCTION__, dongle_types[dongle_id]);
1181
                break;
1182
        case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1183
                IRDA_DEBUG(0, "%s(), %s\n",
1184
                           __FUNCTION__, dongle_types[dongle_id]);
1185
                outb(0x00, iobase+4);
1186
                if (speed > 115200)
1187
                        outb(0x01, iobase+4);
1188
                break;
1189
        case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1190
                outb(0x01, iobase+4);
1191
 
1192
                if (speed == 4000000) {
1193
                        /* There was a cli() there, but we now are already
1194
                         * under spin_lock_irqsave() - JeanII */
1195
                        outb(0x81, iobase+4);
1196
                        outb(0x80, iobase+4);
1197
                } else
1198
                        outb(0x00, iobase+4);
1199
                break;
1200
        case 0x0A: /* same as */
1201
        case 0x0B: /* Reserved */
1202
                IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1203
                           __FUNCTION__, dongle_types[dongle_id]);
1204
                break;
1205
        case 0x0C: /* same as */
1206
        case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1207
                break;
1208
        case 0x0E: /* Supports SIR Mode only */
1209
                break;
1210
        case 0x0F: /* No dongle connected */
1211
                IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1212
                           __FUNCTION__, dongle_types[dongle_id]);
1213
 
1214
                switch_bank(iobase, BANK0);
1215
                outb(0x62, iobase+MCR);
1216
                break;
1217
        default:
1218
                IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1219
        }
1220
        /* Restore bank register */
1221
        outb(bank, iobase+BSR);
1222
}
1223
 
1224
/*
1225
 * Function nsc_ircc_change_speed (self, baud)
1226
 *
1227
 *    Change the speed of the device
1228
 *
1229
 * This function *must* be called with irq off and spin-lock.
1230
 */
1231
static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1232
{
1233
        struct net_device *dev = self->netdev;
1234
        __u8 mcr = MCR_SIR;
1235
        int iobase;
1236
        __u8 bank;
1237
        __u8 ier;                  /* Interrupt enable register */
1238
 
1239
        IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1240
 
1241
        IRDA_ASSERT(self != NULL, return 0;);
1242
 
1243
        iobase = self->io.fir_base;
1244
 
1245
        /* Update accounting for new speed */
1246
        self->io.speed = speed;
1247
 
1248
        /* Save current bank */
1249
        bank = inb(iobase+BSR);
1250
 
1251
        /* Disable interrupts */
1252
        switch_bank(iobase, BANK0);
1253
        outb(0, iobase+IER);
1254
 
1255
        /* Select Bank 2 */
1256
        switch_bank(iobase, BANK2);
1257
 
1258
        outb(0x00, iobase+BGDH);
1259
        switch (speed) {
1260
        case 9600:   outb(0x0c, iobase+BGDL); break;
1261
        case 19200:  outb(0x06, iobase+BGDL); break;
1262
        case 38400:  outb(0x03, iobase+BGDL); break;
1263
        case 57600:  outb(0x02, iobase+BGDL); break;
1264
        case 115200: outb(0x01, iobase+BGDL); break;
1265
        case 576000:
1266
                switch_bank(iobase, BANK5);
1267
 
1268
                /* IRCR2: MDRS is set */
1269
                outb(inb(iobase+4) | 0x04, iobase+4);
1270
 
1271
                mcr = MCR_MIR;
1272
                IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1273
                break;
1274
        case 1152000:
1275
                mcr = MCR_MIR;
1276
                IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1277
                break;
1278
        case 4000000:
1279
                mcr = MCR_FIR;
1280
                IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1281
                break;
1282
        default:
1283
                mcr = MCR_FIR;
1284
                IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1285
                           __FUNCTION__, speed);
1286
                break;
1287
        }
1288
 
1289
        /* Set appropriate speed mode */
1290
        switch_bank(iobase, BANK0);
1291
        outb(mcr | MCR_TX_DFR, iobase+MCR);
1292
 
1293
        /* Give some hits to the transceiver */
1294
        nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1295
 
1296
        /* Set FIFO threshold to TX17, RX16 */
1297
        switch_bank(iobase, BANK0);
1298
        outb(0x00, iobase+FCR);
1299
        outb(FCR_FIFO_EN, iobase+FCR);
1300
        outb(FCR_RXTH|     /* Set Rx FIFO threshold */
1301
             FCR_TXTH|     /* Set Tx FIFO threshold */
1302
             FCR_TXSR|     /* Reset Tx FIFO */
1303
             FCR_RXSR|     /* Reset Rx FIFO */
1304
             FCR_FIFO_EN,  /* Enable FIFOs */
1305
             iobase+FCR);
1306
 
1307
        /* Set FIFO size to 32 */
1308
        switch_bank(iobase, BANK2);
1309
        outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1310
 
1311
        /* Enable some interrupts so we can receive frames */
1312
        switch_bank(iobase, BANK0);
1313
        if (speed > 115200) {
1314
                /* Install FIR xmit handler */
1315
                dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1316
                ier = IER_SFIF_IE;
1317
                nsc_ircc_dma_receive(self);
1318
        } else {
1319
                /* Install SIR xmit handler */
1320
                dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1321
                ier = IER_RXHDL_IE;
1322
        }
1323
        /* Set our current interrupt mask */
1324
        outb(ier, iobase+IER);
1325
 
1326
        /* Restore BSR */
1327
        outb(bank, iobase+BSR);
1328
 
1329
        /* Make sure interrupt handlers keep the proper interrupt mask */
1330
        return(ier);
1331
}
1332
 
1333
/*
1334
 * Function nsc_ircc_hard_xmit (skb, dev)
1335
 *
1336
 *    Transmit the frame!
1337
 *
1338
 */
1339
static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1340
{
1341
        struct nsc_ircc_cb *self;
1342
        unsigned long flags;
1343
        int iobase;
1344
        __s32 speed;
1345
        __u8 bank;
1346
 
1347
        self = (struct nsc_ircc_cb *) dev->priv;
1348
 
1349
        IRDA_ASSERT(self != NULL, return 0;);
1350
 
1351
        iobase = self->io.fir_base;
1352
 
1353
        netif_stop_queue(dev);
1354
 
1355
        /* Make sure tests *& speed change are atomic */
1356
        spin_lock_irqsave(&self->lock, flags);
1357
 
1358
        /* Check if we need to change the speed */
1359
        speed = irda_get_next_speed(skb);
1360
        if ((speed != self->io.speed) && (speed != -1)) {
1361
                /* Check for empty frame. */
1362
                if (!skb->len) {
1363
                        /* If we just sent a frame, we get called before
1364
                         * the last bytes get out (because of the SIR FIFO).
1365
                         * If this is the case, let interrupt handler change
1366
                         * the speed itself... Jean II */
1367
                        if (self->io.direction == IO_RECV) {
1368
                                nsc_ircc_change_speed(self, speed);
1369
                                /* TODO : For SIR->SIR, the next packet
1370
                                 * may get corrupted - Jean II */
1371
                                netif_wake_queue(dev);
1372
                        } else {
1373
                                self->new_speed = speed;
1374
                                /* Queue will be restarted after speed change
1375
                                 * to make sure packets gets through the
1376
                                 * proper xmit handler - Jean II */
1377
                        }
1378
                        dev->trans_start = jiffies;
1379
                        spin_unlock_irqrestore(&self->lock, flags);
1380
                        dev_kfree_skb(skb);
1381
                        return 0;
1382
                } else
1383
                        self->new_speed = speed;
1384
        }
1385
 
1386
        /* Save current bank */
1387
        bank = inb(iobase+BSR);
1388
 
1389
        self->tx_buff.data = self->tx_buff.head;
1390
 
1391
        self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1392
                                           self->tx_buff.truesize);
1393
 
1394
        self->stats.tx_bytes += self->tx_buff.len;
1395
 
1396
        /* Add interrupt on tx low level (will fire immediately) */
1397
        switch_bank(iobase, BANK0);
1398
        outb(IER_TXLDL_IE, iobase+IER);
1399
 
1400
        /* Restore bank register */
1401
        outb(bank, iobase+BSR);
1402
 
1403
        dev->trans_start = jiffies;
1404
        spin_unlock_irqrestore(&self->lock, flags);
1405
 
1406
        dev_kfree_skb(skb);
1407
 
1408
        return 0;
1409
}
1410
 
1411
static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1412
{
1413
        struct nsc_ircc_cb *self;
1414
        unsigned long flags;
1415
        int iobase;
1416
        __s32 speed;
1417
        __u8 bank;
1418
        int mtt, diff;
1419
 
1420
        self = (struct nsc_ircc_cb *) dev->priv;
1421
        iobase = self->io.fir_base;
1422
 
1423
        netif_stop_queue(dev);
1424
 
1425
        /* Make sure tests *& speed change are atomic */
1426
        spin_lock_irqsave(&self->lock, flags);
1427
 
1428
        /* Check if we need to change the speed */
1429
        speed = irda_get_next_speed(skb);
1430
        if ((speed != self->io.speed) && (speed != -1)) {
1431
                /* Check for empty frame. */
1432
                if (!skb->len) {
1433
                        /* If we are currently transmitting, defer to
1434
                         * interrupt handler. - Jean II */
1435
                        if(self->tx_fifo.len == 0) {
1436
                                nsc_ircc_change_speed(self, speed);
1437
                                netif_wake_queue(dev);
1438
                        } else {
1439
                                self->new_speed = speed;
1440
                                /* Keep queue stopped :
1441
                                 * the speed change operation may change the
1442
                                 * xmit handler, and we want to make sure
1443
                                 * the next packet get through the proper
1444
                                 * Tx path, so block the Tx queue until
1445
                                 * the speed change has been done.
1446
                                 * Jean II */
1447
                        }
1448
                        dev->trans_start = jiffies;
1449
                        spin_unlock_irqrestore(&self->lock, flags);
1450
                        dev_kfree_skb(skb);
1451
                        return 0;
1452
                } else {
1453
                        /* Change speed after current frame */
1454
                        self->new_speed = speed;
1455
                }
1456
        }
1457
 
1458
        /* Save current bank */
1459
        bank = inb(iobase+BSR);
1460
 
1461
        /* Register and copy this frame to DMA memory */
1462
        self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1463
        self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1464
        self->tx_fifo.tail += skb->len;
1465
 
1466
        self->stats.tx_bytes += skb->len;
1467
 
1468
        skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1469
                      skb->len);
1470
        self->tx_fifo.len++;
1471
        self->tx_fifo.free++;
1472
 
1473
        /* Start transmit only if there is currently no transmit going on */
1474
        if (self->tx_fifo.len == 1) {
1475
                /* Check if we must wait the min turn time or not */
1476
                mtt = irda_get_mtt(skb);
1477
                if (mtt) {
1478
                        /* Check how much time we have used already */
1479
                        do_gettimeofday(&self->now);
1480
                        diff = self->now.tv_usec - self->stamp.tv_usec;
1481
                        if (diff < 0)
1482
                                diff += 1000000;
1483
 
1484
                        /* Check if the mtt is larger than the time we have
1485
                         * already used by all the protocol processing
1486
                         */
1487
                        if (mtt > diff) {
1488
                                mtt -= diff;
1489
 
1490
                                /*
1491
                                 * Use timer if delay larger than 125 us, and
1492
                                 * use udelay for smaller values which should
1493
                                 * be acceptable
1494
                                 */
1495
                                if (mtt > 125) {
1496
                                        /* Adjust for timer resolution */
1497
                                        mtt = mtt / 125;
1498
 
1499
                                        /* Setup timer */
1500
                                        switch_bank(iobase, BANK4);
1501
                                        outb(mtt & 0xff, iobase+TMRL);
1502
                                        outb((mtt >> 8) & 0x0f, iobase+TMRH);
1503
 
1504
                                        /* Start timer */
1505
                                        outb(IRCR1_TMR_EN, iobase+IRCR1);
1506
                                        self->io.direction = IO_XMIT;
1507
 
1508
                                        /* Enable timer interrupt */
1509
                                        switch_bank(iobase, BANK0);
1510
                                        outb(IER_TMR_IE, iobase+IER);
1511
 
1512
                                        /* Timer will take care of the rest */
1513
                                        goto out;
1514
                                } else
1515
                                        udelay(mtt);
1516
                        }
1517
                }
1518
                /* Enable DMA interrupt */
1519
                switch_bank(iobase, BANK0);
1520
                outb(IER_DMA_IE, iobase+IER);
1521
 
1522
                /* Transmit frame */
1523
                nsc_ircc_dma_xmit(self, iobase);
1524
        }
1525
 out:
1526
        /* Not busy transmitting anymore if window is not full,
1527
         * and if we don't need to change speed */
1528
        if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1529
                netif_wake_queue(self->netdev);
1530
 
1531
        /* Restore bank register */
1532
        outb(bank, iobase+BSR);
1533
 
1534
        dev->trans_start = jiffies;
1535
        spin_unlock_irqrestore(&self->lock, flags);
1536
        dev_kfree_skb(skb);
1537
 
1538
        return 0;
1539
}
1540
 
1541
/*
1542
 * Function nsc_ircc_dma_xmit (self, iobase)
1543
 *
1544
 *    Transmit data using DMA
1545
 *
1546
 */
1547
static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1548
{
1549
        int bsr;
1550
 
1551
        /* Save current bank */
1552
        bsr = inb(iobase+BSR);
1553
 
1554
        /* Disable DMA */
1555
        switch_bank(iobase, BANK0);
1556
        outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1557
 
1558
        self->io.direction = IO_XMIT;
1559
 
1560
        /* Choose transmit DMA channel  */
1561
        switch_bank(iobase, BANK2);
1562
        outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1563
 
1564
        irda_setup_dma(self->io.dma,
1565
                       ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1566
                        self->tx_buff.head) + self->tx_buff_dma,
1567
                       self->tx_fifo.queue[self->tx_fifo.ptr].len,
1568
                       DMA_TX_MODE);
1569
 
1570
        /* Enable DMA and SIR interaction pulse */
1571
        switch_bank(iobase, BANK0);
1572
        outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1573
 
1574
        /* Restore bank register */
1575
        outb(bsr, iobase+BSR);
1576
}
1577
 
1578
/*
1579
 * Function nsc_ircc_pio_xmit (self, iobase)
1580
 *
1581
 *    Transmit data using PIO. Returns the number of bytes that actually
1582
 *    got transferred
1583
 *
1584
 */
1585
static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1586
{
1587
        int actual = 0;
1588
        __u8 bank;
1589
 
1590
        IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1591
 
1592
        /* Save current bank */
1593
        bank = inb(iobase+BSR);
1594
 
1595
        switch_bank(iobase, BANK0);
1596
        if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1597
                IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1598
                           __FUNCTION__);
1599
 
1600
                /* FIFO may still be filled to the Tx interrupt threshold */
1601
                fifo_size -= 17;
1602
        }
1603
 
1604
        /* Fill FIFO with current frame */
1605
        while ((fifo_size-- > 0) && (actual < len)) {
1606
                /* Transmit next byte */
1607
                outb(buf[actual++], iobase+TXD);
1608
        }
1609
 
1610
        IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1611
                   __FUNCTION__, fifo_size, actual, len);
1612
 
1613
        /* Restore bank */
1614
        outb(bank, iobase+BSR);
1615
 
1616
        return actual;
1617
}
1618
 
1619
/*
1620
 * Function nsc_ircc_dma_xmit_complete (self)
1621
 *
1622
 *    The transfer of a frame in finished. This function will only be called
1623
 *    by the interrupt handler
1624
 *
1625
 */
1626
static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1627
{
1628
        int iobase;
1629
        __u8 bank;
1630
        int ret = TRUE;
1631
 
1632
        IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1633
 
1634
        iobase = self->io.fir_base;
1635
 
1636
        /* Save current bank */
1637
        bank = inb(iobase+BSR);
1638
 
1639
        /* Disable DMA */
1640
        switch_bank(iobase, BANK0);
1641
        outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1642
 
1643
        /* Check for underrrun! */
1644
        if (inb(iobase+ASCR) & ASCR_TXUR) {
1645
                self->stats.tx_errors++;
1646
                self->stats.tx_fifo_errors++;
1647
 
1648
                /* Clear bit, by writing 1 into it */
1649
                outb(ASCR_TXUR, iobase+ASCR);
1650
        } else {
1651
                self->stats.tx_packets++;
1652
        }
1653
 
1654
        /* Finished with this frame, so prepare for next */
1655
        self->tx_fifo.ptr++;
1656
        self->tx_fifo.len--;
1657
 
1658
        /* Any frames to be sent back-to-back? */
1659
        if (self->tx_fifo.len) {
1660
                nsc_ircc_dma_xmit(self, iobase);
1661
 
1662
                /* Not finished yet! */
1663
                ret = FALSE;
1664
        } else {
1665
                /* Reset Tx FIFO info */
1666
                self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1667
                self->tx_fifo.tail = self->tx_buff.head;
1668
        }
1669
 
1670
        /* Make sure we have room for more frames and
1671
         * that we don't need to change speed */
1672
        if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1673
                /* Not busy transmitting anymore */
1674
                /* Tell the network layer, that we can accept more frames */
1675
                netif_wake_queue(self->netdev);
1676
        }
1677
 
1678
        /* Restore bank */
1679
        outb(bank, iobase+BSR);
1680
 
1681
        return ret;
1682
}
1683
 
1684
/*
1685
 * Function nsc_ircc_dma_receive (self)
1686
 *
1687
 *    Get ready for receiving a frame. The device will initiate a DMA
1688
 *    if it starts to receive a frame.
1689
 *
1690
 */
1691
static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1692
{
1693
        int iobase;
1694
        __u8 bsr;
1695
 
1696
        iobase = self->io.fir_base;
1697
 
1698
        /* Reset Tx FIFO info */
1699
        self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1700
        self->tx_fifo.tail = self->tx_buff.head;
1701
 
1702
        /* Save current bank */
1703
        bsr = inb(iobase+BSR);
1704
 
1705
        /* Disable DMA */
1706
        switch_bank(iobase, BANK0);
1707
        outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1708
 
1709
        /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1710
        switch_bank(iobase, BANK2);
1711
        outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1712
 
1713
        self->io.direction = IO_RECV;
1714
        self->rx_buff.data = self->rx_buff.head;
1715
 
1716
        /* Reset Rx FIFO. This will also flush the ST_FIFO */
1717
        switch_bank(iobase, BANK0);
1718
        outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1719
 
1720
        self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1721
        self->st_fifo.tail = self->st_fifo.head = 0;
1722
 
1723
        irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1724
                       DMA_RX_MODE);
1725
 
1726
        /* Enable DMA */
1727
        switch_bank(iobase, BANK0);
1728
        outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1729
 
1730
        /* Restore bank register */
1731
        outb(bsr, iobase+BSR);
1732
 
1733
        return 0;
1734
}
1735
 
1736
/*
1737
 * Function nsc_ircc_dma_receive_complete (self)
1738
 *
1739
 *    Finished with receiving frames
1740
 *
1741
 *
1742
 */
1743
static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1744
{
1745
        struct st_fifo *st_fifo;
1746
        struct sk_buff *skb;
1747
        __u8 status;
1748
        __u8 bank;
1749
        int len;
1750
 
1751
        st_fifo = &self->st_fifo;
1752
 
1753
        /* Save current bank */
1754
        bank = inb(iobase+BSR);
1755
 
1756
        /* Read all entries in status FIFO */
1757
        switch_bank(iobase, BANK5);
1758
        while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1759
                /* We must empty the status FIFO no matter what */
1760
                len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1761
 
1762
                if (st_fifo->tail >= MAX_RX_WINDOW) {
1763
                        IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1764
                        continue;
1765
                }
1766
 
1767
                st_fifo->entries[st_fifo->tail].status = status;
1768
                st_fifo->entries[st_fifo->tail].len = len;
1769
                st_fifo->pending_bytes += len;
1770
                st_fifo->tail++;
1771
                st_fifo->len++;
1772
        }
1773
        /* Try to process all entries in status FIFO */
1774
        while (st_fifo->len > 0) {
1775
                /* Get first entry */
1776
                status = st_fifo->entries[st_fifo->head].status;
1777
                len    = st_fifo->entries[st_fifo->head].len;
1778
                st_fifo->pending_bytes -= len;
1779
                st_fifo->head++;
1780
                st_fifo->len--;
1781
 
1782
                /* Check for errors */
1783
                if (status & FRM_ST_ERR_MSK) {
1784
                        if (status & FRM_ST_LOST_FR) {
1785
                                /* Add number of lost frames to stats */
1786
                                self->stats.rx_errors += len;
1787
                        } else {
1788
                                /* Skip frame */
1789
                                self->stats.rx_errors++;
1790
 
1791
                                self->rx_buff.data += len;
1792
 
1793
                                if (status & FRM_ST_MAX_LEN)
1794
                                        self->stats.rx_length_errors++;
1795
 
1796
                                if (status & FRM_ST_PHY_ERR)
1797
                                        self->stats.rx_frame_errors++;
1798
 
1799
                                if (status & FRM_ST_BAD_CRC)
1800
                                        self->stats.rx_crc_errors++;
1801
                        }
1802
                        /* The errors below can be reported in both cases */
1803
                        if (status & FRM_ST_OVR1)
1804
                                self->stats.rx_fifo_errors++;
1805
 
1806
                        if (status & FRM_ST_OVR2)
1807
                                self->stats.rx_fifo_errors++;
1808
                } else {
1809
                        /*
1810
                         * First we must make sure that the frame we
1811
                         * want to deliver is all in main memory. If we
1812
                         * cannot tell, then we check if the Rx FIFO is
1813
                         * empty. If not then we will have to take a nap
1814
                         * and try again later.
1815
                         */
1816
                        if (st_fifo->pending_bytes < self->io.fifo_size) {
1817
                                switch_bank(iobase, BANK0);
1818
                                if (inb(iobase+LSR) & LSR_RXDA) {
1819
                                        /* Put this entry back in fifo */
1820
                                        st_fifo->head--;
1821
                                        st_fifo->len++;
1822
                                        st_fifo->pending_bytes += len;
1823
                                        st_fifo->entries[st_fifo->head].status = status;
1824
                                        st_fifo->entries[st_fifo->head].len = len;
1825
                                        /*
1826
                                         * DMA not finished yet, so try again
1827
                                         * later, set timer value, resolution
1828
                                         * 125 us
1829
                                         */
1830
                                        switch_bank(iobase, BANK4);
1831
                                        outb(0x02, iobase+TMRL); /* x 125 us */
1832
                                        outb(0x00, iobase+TMRH);
1833
 
1834
                                        /* Start timer */
1835
                                        outb(IRCR1_TMR_EN, iobase+IRCR1);
1836
 
1837
                                        /* Restore bank register */
1838
                                        outb(bank, iobase+BSR);
1839
 
1840
                                        return FALSE; /* I'll be back! */
1841
                                }
1842
                        }
1843
 
1844
                        /*
1845
                         * Remember the time we received this frame, so we can
1846
                         * reduce the min turn time a bit since we will know
1847
                         * how much time we have used for protocol processing
1848
                         */
1849
                        do_gettimeofday(&self->stamp);
1850
 
1851
                        skb = dev_alloc_skb(len+1);
1852
                        if (skb == NULL)  {
1853
                                IRDA_WARNING("%s(), memory squeeze, "
1854
                                             "dropping frame.\n",
1855
                                             __FUNCTION__);
1856
                                self->stats.rx_dropped++;
1857
 
1858
                                /* Restore bank register */
1859
                                outb(bank, iobase+BSR);
1860
 
1861
                                return FALSE;
1862
                        }
1863
 
1864
                        /* Make sure IP header gets aligned */
1865
                        skb_reserve(skb, 1);
1866
 
1867
                        /* Copy frame without CRC */
1868
                        if (self->io.speed < 4000000) {
1869
                                skb_put(skb, len-2);
1870
                                skb_copy_to_linear_data(skb,
1871
                                                        self->rx_buff.data,
1872
                                                        len - 2);
1873
                        } else {
1874
                                skb_put(skb, len-4);
1875
                                skb_copy_to_linear_data(skb,
1876
                                                        self->rx_buff.data,
1877
                                                        len - 4);
1878
                        }
1879
 
1880
                        /* Move to next frame */
1881
                        self->rx_buff.data += len;
1882
                        self->stats.rx_bytes += len;
1883
                        self->stats.rx_packets++;
1884
 
1885
                        skb->dev = self->netdev;
1886
                        skb_reset_mac_header(skb);
1887
                        skb->protocol = htons(ETH_P_IRDA);
1888
                        netif_rx(skb);
1889
                        self->netdev->last_rx = jiffies;
1890
                }
1891
        }
1892
        /* Restore bank register */
1893
        outb(bank, iobase+BSR);
1894
 
1895
        return TRUE;
1896
}
1897
 
1898
/*
1899
 * Function nsc_ircc_pio_receive (self)
1900
 *
1901
 *    Receive all data in receiver FIFO
1902
 *
1903
 */
1904
static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1905
{
1906
        __u8 byte;
1907
        int iobase;
1908
 
1909
        iobase = self->io.fir_base;
1910
 
1911
        /*  Receive all characters in Rx FIFO */
1912
        do {
1913
                byte = inb(iobase+RXD);
1914
                async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1915
                                  byte);
1916
        } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1917
}
1918
 
1919
/*
1920
 * Function nsc_ircc_sir_interrupt (self, eir)
1921
 *
1922
 *    Handle SIR interrupt
1923
 *
1924
 */
1925
static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1926
{
1927
        int actual;
1928
 
1929
        /* Check if transmit FIFO is low on data */
1930
        if (eir & EIR_TXLDL_EV) {
1931
                /* Write data left in transmit buffer */
1932
                actual = nsc_ircc_pio_write(self->io.fir_base,
1933
                                           self->tx_buff.data,
1934
                                           self->tx_buff.len,
1935
                                           self->io.fifo_size);
1936
                self->tx_buff.data += actual;
1937
                self->tx_buff.len  -= actual;
1938
 
1939
                self->io.direction = IO_XMIT;
1940
 
1941
                /* Check if finished */
1942
                if (self->tx_buff.len > 0)
1943
                        self->ier = IER_TXLDL_IE;
1944
                else {
1945
 
1946
                        self->stats.tx_packets++;
1947
                        netif_wake_queue(self->netdev);
1948
                        self->ier = IER_TXEMP_IE;
1949
                }
1950
 
1951
        }
1952
        /* Check if transmission has completed */
1953
        if (eir & EIR_TXEMP_EV) {
1954
                /* Turn around and get ready to receive some data */
1955
                self->io.direction = IO_RECV;
1956
                self->ier = IER_RXHDL_IE;
1957
                /* Check if we need to change the speed?
1958
                 * Need to be after self->io.direction to avoid race with
1959
                 * nsc_ircc_hard_xmit_sir() - Jean II */
1960
                if (self->new_speed) {
1961
                        IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1962
                        self->ier = nsc_ircc_change_speed(self,
1963
                                                          self->new_speed);
1964
                        self->new_speed = 0;
1965
                        netif_wake_queue(self->netdev);
1966
 
1967
                        /* Check if we are going to FIR */
1968
                        if (self->io.speed > 115200) {
1969
                                /* No need to do anymore SIR stuff */
1970
                                return;
1971
                        }
1972
                }
1973
        }
1974
 
1975
        /* Rx FIFO threshold or timeout */
1976
        if (eir & EIR_RXHDL_EV) {
1977
                nsc_ircc_pio_receive(self);
1978
 
1979
                /* Keep receiving */
1980
                self->ier = IER_RXHDL_IE;
1981
        }
1982
}
1983
 
1984
/*
1985
 * Function nsc_ircc_fir_interrupt (self, eir)
1986
 *
1987
 *    Handle MIR/FIR interrupt
1988
 *
1989
 */
1990
static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1991
                                   int eir)
1992
{
1993
        __u8 bank;
1994
 
1995
        bank = inb(iobase+BSR);
1996
 
1997
        /* Status FIFO event*/
1998
        if (eir & EIR_SFIF_EV) {
1999
                /* Check if DMA has finished */
2000
                if (nsc_ircc_dma_receive_complete(self, iobase)) {
2001
                        /* Wait for next status FIFO interrupt */
2002
                        self->ier = IER_SFIF_IE;
2003
                } else {
2004
                        self->ier = IER_SFIF_IE | IER_TMR_IE;
2005
                }
2006
        } else if (eir & EIR_TMR_EV) { /* Timer finished */
2007
                /* Disable timer */
2008
                switch_bank(iobase, BANK4);
2009
                outb(0, iobase+IRCR1);
2010
 
2011
                /* Clear timer event */
2012
                switch_bank(iobase, BANK0);
2013
                outb(ASCR_CTE, iobase+ASCR);
2014
 
2015
                /* Check if this is a Tx timer interrupt */
2016
                if (self->io.direction == IO_XMIT) {
2017
                        nsc_ircc_dma_xmit(self, iobase);
2018
 
2019
                        /* Interrupt on DMA */
2020
                        self->ier = IER_DMA_IE;
2021
                } else {
2022
                        /* Check (again) if DMA has finished */
2023
                        if (nsc_ircc_dma_receive_complete(self, iobase)) {
2024
                                self->ier = IER_SFIF_IE;
2025
                        } else {
2026
                                self->ier = IER_SFIF_IE | IER_TMR_IE;
2027
                        }
2028
                }
2029
        } else if (eir & EIR_DMA_EV) {
2030
                /* Finished with all transmissions? */
2031
                if (nsc_ircc_dma_xmit_complete(self)) {
2032
                        if(self->new_speed != 0) {
2033
                                /* As we stop the Tx queue, the speed change
2034
                                 * need to be done when the Tx fifo is
2035
                                 * empty. Ask for a Tx done interrupt */
2036
                                self->ier = IER_TXEMP_IE;
2037
                        } else {
2038
                                /* Check if there are more frames to be
2039
                                 * transmitted */
2040
                                if (irda_device_txqueue_empty(self->netdev)) {
2041
                                        /* Prepare for receive */
2042
                                        nsc_ircc_dma_receive(self);
2043
                                        self->ier = IER_SFIF_IE;
2044
                                } else
2045
                                        IRDA_WARNING("%s(), potential "
2046
                                                     "Tx queue lockup !\n",
2047
                                                     __FUNCTION__);
2048
                        }
2049
                } else {
2050
                        /*  Not finished yet, so interrupt on DMA again */
2051
                        self->ier = IER_DMA_IE;
2052
                }
2053
        } else if (eir & EIR_TXEMP_EV) {
2054
                /* The Tx FIFO has totally drained out, so now we can change
2055
                 * the speed... - Jean II */
2056
                self->ier = nsc_ircc_change_speed(self, self->new_speed);
2057
                self->new_speed = 0;
2058
                netif_wake_queue(self->netdev);
2059
                /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2060
        }
2061
 
2062
        outb(bank, iobase+BSR);
2063
}
2064
 
2065
/*
2066
 * Function nsc_ircc_interrupt (irq, dev_id, regs)
2067
 *
2068
 *    An interrupt from the chip has arrived. Time to do some work
2069
 *
2070
 */
2071
static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
2072
{
2073
        struct net_device *dev = dev_id;
2074
        struct nsc_ircc_cb *self;
2075
        __u8 bsr, eir;
2076
        int iobase;
2077
 
2078
        self = dev->priv;
2079
 
2080
        spin_lock(&self->lock);
2081
 
2082
        iobase = self->io.fir_base;
2083
 
2084
        bsr = inb(iobase+BSR);  /* Save current bank */
2085
 
2086
        switch_bank(iobase, BANK0);
2087
        self->ier = inb(iobase+IER);
2088
        eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2089
 
2090
        outb(0, iobase+IER); /* Disable interrupts */
2091
 
2092
        if (eir) {
2093
                /* Dispatch interrupt handler for the current speed */
2094
                if (self->io.speed > 115200)
2095
                        nsc_ircc_fir_interrupt(self, iobase, eir);
2096
                else
2097
                        nsc_ircc_sir_interrupt(self, eir);
2098
        }
2099
 
2100
        outb(self->ier, iobase+IER); /* Restore interrupts */
2101
        outb(bsr, iobase+BSR);       /* Restore bank register */
2102
 
2103
        spin_unlock(&self->lock);
2104
        return IRQ_RETVAL(eir);
2105
}
2106
 
2107
/*
2108
 * Function nsc_ircc_is_receiving (self)
2109
 *
2110
 *    Return TRUE is we are currently receiving a frame
2111
 *
2112
 */
2113
static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2114
{
2115
        unsigned long flags;
2116
        int status = FALSE;
2117
        int iobase;
2118
        __u8 bank;
2119
 
2120
        IRDA_ASSERT(self != NULL, return FALSE;);
2121
 
2122
        spin_lock_irqsave(&self->lock, flags);
2123
 
2124
        if (self->io.speed > 115200) {
2125
                iobase = self->io.fir_base;
2126
 
2127
                /* Check if rx FIFO is not empty */
2128
                bank = inb(iobase+BSR);
2129
                switch_bank(iobase, BANK2);
2130
                if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2131
                        /* We are receiving something */
2132
                        status =  TRUE;
2133
                }
2134
                outb(bank, iobase+BSR);
2135
        } else
2136
                status = (self->rx_buff.state != OUTSIDE_FRAME);
2137
 
2138
        spin_unlock_irqrestore(&self->lock, flags);
2139
 
2140
        return status;
2141
}
2142
 
2143
/*
2144
 * Function nsc_ircc_net_open (dev)
2145
 *
2146
 *    Start the device
2147
 *
2148
 */
2149
static int nsc_ircc_net_open(struct net_device *dev)
2150
{
2151
        struct nsc_ircc_cb *self;
2152
        int iobase;
2153
        char hwname[32];
2154
        __u8 bank;
2155
 
2156
        IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2157
 
2158
        IRDA_ASSERT(dev != NULL, return -1;);
2159
        self = (struct nsc_ircc_cb *) dev->priv;
2160
 
2161
        IRDA_ASSERT(self != NULL, return 0;);
2162
 
2163
        iobase = self->io.fir_base;
2164
 
2165
        if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2166
                IRDA_WARNING("%s, unable to allocate irq=%d\n",
2167
                             driver_name, self->io.irq);
2168
                return -EAGAIN;
2169
        }
2170
        /*
2171
         * Always allocate the DMA channel after the IRQ, and clean up on
2172
         * failure.
2173
         */
2174
        if (request_dma(self->io.dma, dev->name)) {
2175
                IRDA_WARNING("%s, unable to allocate dma=%d\n",
2176
                             driver_name, self->io.dma);
2177
                free_irq(self->io.irq, dev);
2178
                return -EAGAIN;
2179
        }
2180
 
2181
        /* Save current bank */
2182
        bank = inb(iobase+BSR);
2183
 
2184
        /* turn on interrupts */
2185
        switch_bank(iobase, BANK0);
2186
        outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2187
 
2188
        /* Restore bank register */
2189
        outb(bank, iobase+BSR);
2190
 
2191
        /* Ready to play! */
2192
        netif_start_queue(dev);
2193
 
2194
        /* Give self a hardware name */
2195
        sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2196
 
2197
        /*
2198
         * Open new IrLAP layer instance, now that everything should be
2199
         * initialized properly
2200
         */
2201
        self->irlap = irlap_open(dev, &self->qos, hwname);
2202
 
2203
        return 0;
2204
}
2205
 
2206
/*
2207
 * Function nsc_ircc_net_close (dev)
2208
 *
2209
 *    Stop the device
2210
 *
2211
 */
2212
static int nsc_ircc_net_close(struct net_device *dev)
2213
{
2214
        struct nsc_ircc_cb *self;
2215
        int iobase;
2216
        __u8 bank;
2217
 
2218
        IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2219
 
2220
        IRDA_ASSERT(dev != NULL, return -1;);
2221
 
2222
        self = (struct nsc_ircc_cb *) dev->priv;
2223
        IRDA_ASSERT(self != NULL, return 0;);
2224
 
2225
        /* Stop device */
2226
        netif_stop_queue(dev);
2227
 
2228
        /* Stop and remove instance of IrLAP */
2229
        if (self->irlap)
2230
                irlap_close(self->irlap);
2231
        self->irlap = NULL;
2232
 
2233
        iobase = self->io.fir_base;
2234
 
2235
        disable_dma(self->io.dma);
2236
 
2237
        /* Save current bank */
2238
        bank = inb(iobase+BSR);
2239
 
2240
        /* Disable interrupts */
2241
        switch_bank(iobase, BANK0);
2242
        outb(0, iobase+IER);
2243
 
2244
        free_irq(self->io.irq, dev);
2245
        free_dma(self->io.dma);
2246
 
2247
        /* Restore bank register */
2248
        outb(bank, iobase+BSR);
2249
 
2250
        return 0;
2251
}
2252
 
2253
/*
2254
 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2255
 *
2256
 *    Process IOCTL commands for this device
2257
 *
2258
 */
2259
static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2260
{
2261
        struct if_irda_req *irq = (struct if_irda_req *) rq;
2262
        struct nsc_ircc_cb *self;
2263
        unsigned long flags;
2264
        int ret = 0;
2265
 
2266
        IRDA_ASSERT(dev != NULL, return -1;);
2267
 
2268
        self = dev->priv;
2269
 
2270
        IRDA_ASSERT(self != NULL, return -1;);
2271
 
2272
        IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2273
 
2274
        switch (cmd) {
2275
        case SIOCSBANDWIDTH: /* Set bandwidth */
2276
                if (!capable(CAP_NET_ADMIN)) {
2277
                        ret = -EPERM;
2278
                        break;
2279
                }
2280
                spin_lock_irqsave(&self->lock, flags);
2281
                nsc_ircc_change_speed(self, irq->ifr_baudrate);
2282
                spin_unlock_irqrestore(&self->lock, flags);
2283
                break;
2284
        case SIOCSMEDIABUSY: /* Set media busy */
2285
                if (!capable(CAP_NET_ADMIN)) {
2286
                        ret = -EPERM;
2287
                        break;
2288
                }
2289
                irda_device_set_media_busy(self->netdev, TRUE);
2290
                break;
2291
        case SIOCGRECEIVING: /* Check if we are receiving right now */
2292
                /* This is already protected */
2293
                irq->ifr_receiving = nsc_ircc_is_receiving(self);
2294
                break;
2295
        default:
2296
                ret = -EOPNOTSUPP;
2297
        }
2298
        return ret;
2299
}
2300
 
2301
static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2302
{
2303
        struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2304
 
2305
        return &self->stats;
2306
}
2307
 
2308
static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2309
{
2310
        struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2311
        int bank;
2312
        unsigned long flags;
2313
        int iobase = self->io.fir_base;
2314
 
2315
        if (self->io.suspended)
2316
                return 0;
2317
 
2318
        IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2319
 
2320
        rtnl_lock();
2321
        if (netif_running(self->netdev)) {
2322
                netif_device_detach(self->netdev);
2323
                spin_lock_irqsave(&self->lock, flags);
2324
                /* Save current bank */
2325
                bank = inb(iobase+BSR);
2326
 
2327
                /* Disable interrupts */
2328
                switch_bank(iobase, BANK0);
2329
                outb(0, iobase+IER);
2330
 
2331
                /* Restore bank register */
2332
                outb(bank, iobase+BSR);
2333
 
2334
                spin_unlock_irqrestore(&self->lock, flags);
2335
                free_irq(self->io.irq, self->netdev);
2336
                disable_dma(self->io.dma);
2337
        }
2338
        self->io.suspended = 1;
2339
        rtnl_unlock();
2340
 
2341
        return 0;
2342
}
2343
 
2344
static int nsc_ircc_resume(struct platform_device *dev)
2345
{
2346
        struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2347
        unsigned long flags;
2348
 
2349
        if (!self->io.suspended)
2350
                return 0;
2351
 
2352
        IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2353
 
2354
        rtnl_lock();
2355
        nsc_ircc_setup(&self->io);
2356
        nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2357
 
2358
        if (netif_running(self->netdev)) {
2359
                if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2360
                                self->netdev->name, self->netdev)) {
2361
                        IRDA_WARNING("%s, unable to allocate irq=%d\n",
2362
                                     driver_name, self->io.irq);
2363
 
2364
                        /*
2365
                         * Don't fail resume process, just kill this
2366
                         * network interface
2367
                         */
2368
                        unregister_netdevice(self->netdev);
2369
                } else {
2370
                        spin_lock_irqsave(&self->lock, flags);
2371
                        nsc_ircc_change_speed(self, self->io.speed);
2372
                        spin_unlock_irqrestore(&self->lock, flags);
2373
                        netif_device_attach(self->netdev);
2374
                }
2375
 
2376
        } else {
2377
                spin_lock_irqsave(&self->lock, flags);
2378
                nsc_ircc_change_speed(self, 9600);
2379
                spin_unlock_irqrestore(&self->lock, flags);
2380
        }
2381
        self->io.suspended = 0;
2382
        rtnl_unlock();
2383
 
2384
        return 0;
2385
}
2386
 
2387
MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2388
MODULE_DESCRIPTION("NSC IrDA Device Driver");
2389
MODULE_LICENSE("GPL");
2390
 
2391
 
2392
module_param(qos_mtt_bits, int, 0);
2393
MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2394
module_param_array(io, int, NULL, 0);
2395
MODULE_PARM_DESC(io, "Base I/O addresses");
2396
module_param_array(irq, int, NULL, 0);
2397
MODULE_PARM_DESC(irq, "IRQ lines");
2398
module_param_array(dma, int, NULL, 0);
2399
MODULE_PARM_DESC(dma, "DMA channels");
2400
module_param(dongle_id, int, 0);
2401
MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2402
 
2403
module_init(nsc_ircc_init);
2404
module_exit(nsc_ircc_cleanup);
2405
 

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