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[/] [test_project/] [trunk/] [linux_sd_driver/] [drivers/] [net/] [ixgbe/] [ixgbe_82598.c] - Blame information for rev 62

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1 62 marcus.erl
/*******************************************************************************
2
 
3
  Intel 10 Gigabit PCI Express Linux driver
4
  Copyright(c) 1999 - 2007 Intel Corporation.
5
 
6
  This program is free software; you can redistribute it and/or modify it
7
  under the terms and conditions of the GNU General Public License,
8
  version 2, as published by the Free Software Foundation.
9
 
10
  This program is distributed in the hope it will be useful, but WITHOUT
11
  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13
  more details.
14
 
15
  You should have received a copy of the GNU General Public License along with
16
  this program; if not, write to the Free Software Foundation, Inc.,
17
  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
 
19
  The full GNU General Public License is included in this distribution in
20
  the file called "COPYING".
21
 
22
  Contact Information:
23
  Linux NICS <linux.nics@intel.com>
24
  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25
  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
 
27
*******************************************************************************/
28
 
29
#include <linux/pci.h>
30
#include <linux/delay.h>
31
#include <linux/sched.h>
32
 
33
#include "ixgbe.h"
34
#include "ixgbe_phy.h"
35
 
36
#define IXGBE_82598_MAX_TX_QUEUES 32
37
#define IXGBE_82598_MAX_RX_QUEUES 64
38
#define IXGBE_82598_RAR_ENTRIES   16
39
 
40
static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw);
41
static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
42
                                         bool *autoneg);
43
static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
44
                                                u32 *speed, bool *autoneg);
45
static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);
46
static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw);
47
static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
48
                                      bool *link_up);
49
static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
50
                                            bool autoneg,
51
                                            bool autoneg_wait_to_complete);
52
static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
53
static s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, u32 *speed,
54
                                         bool *link_up);
55
static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
56
                                               bool autoneg,
57
                                               bool autoneg_wait_to_complete);
58
static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);
59
 
60
 
61
static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
62
{
63
        hw->mac.num_rx_queues = IXGBE_82598_MAX_TX_QUEUES;
64
        hw->mac.num_tx_queues = IXGBE_82598_MAX_RX_QUEUES;
65
        hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES;
66
 
67
        return 0;
68
}
69
 
70
/**
71
 *  ixgbe_get_link_settings_82598 - Determines default link settings
72
 *  @hw: pointer to hardware structure
73
 *  @speed: pointer to link speed
74
 *  @autoneg: boolean auto-negotiation value
75
 *
76
 *  Determines the default link settings by reading the AUTOC register.
77
 **/
78
static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
79
                                         bool *autoneg)
80
{
81
        s32 status = 0;
82
        s32 autoc_reg;
83
 
84
        autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
85
 
86
        if (hw->mac.link_settings_loaded) {
87
                autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
88
                autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
89
                autoc_reg |= hw->mac.link_attach_type;
90
                autoc_reg |= hw->mac.link_mode_select;
91
        }
92
 
93
        switch (autoc_reg & IXGBE_AUTOC_LMS_MASK) {
94
        case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
95
                *speed = IXGBE_LINK_SPEED_1GB_FULL;
96
                *autoneg = false;
97
                break;
98
 
99
        case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
100
                *speed = IXGBE_LINK_SPEED_10GB_FULL;
101
                *autoneg = false;
102
                break;
103
 
104
        case IXGBE_AUTOC_LMS_1G_AN:
105
                *speed = IXGBE_LINK_SPEED_1GB_FULL;
106
                *autoneg = true;
107
                break;
108
 
109
        case IXGBE_AUTOC_LMS_KX4_AN:
110
        case IXGBE_AUTOC_LMS_KX4_AN_1G_AN:
111
                *speed = IXGBE_LINK_SPEED_UNKNOWN;
112
                if (autoc_reg & IXGBE_AUTOC_KX4_SUPP)
113
                        *speed |= IXGBE_LINK_SPEED_10GB_FULL;
114
                if (autoc_reg & IXGBE_AUTOC_KX_SUPP)
115
                        *speed |= IXGBE_LINK_SPEED_1GB_FULL;
116
                *autoneg = true;
117
                break;
118
 
119
        default:
120
                status = IXGBE_ERR_LINK_SETUP;
121
                break;
122
        }
123
 
124
        return status;
125
}
126
 
127
/**
128
 *  ixgbe_get_copper_link_settings_82598 - Determines default link settings
129
 *  @hw: pointer to hardware structure
130
 *  @speed: pointer to link speed
131
 *  @autoneg: boolean auto-negotiation value
132
 *
133
 *  Determines the default link settings by reading the AUTOC register.
134
 **/
135
static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
136
                                                u32 *speed, bool *autoneg)
137
{
138
        s32 status = IXGBE_ERR_LINK_SETUP;
139
        u16 speed_ability;
140
 
141
        *speed = 0;
142
        *autoneg = true;
143
 
144
        status = ixgbe_read_phy_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,
145
                                    IXGBE_MDIO_PMA_PMD_DEV_TYPE,
146
                                    &speed_ability);
147
 
148
        if (status == 0) {
149
                if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G)
150
                    *speed |= IXGBE_LINK_SPEED_10GB_FULL;
151
                if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G)
152
                    *speed |= IXGBE_LINK_SPEED_1GB_FULL;
153
        }
154
 
155
        return status;
156
}
157
 
158
/**
159
 *  ixgbe_get_media_type_82598 - Determines media type
160
 *  @hw: pointer to hardware structure
161
 *
162
 *  Returns the media type (fiber, copper, backplane)
163
 **/
164
static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
165
{
166
        enum ixgbe_media_type media_type;
167
 
168
        /* Media type for I82598 is based on device ID */
169
        switch (hw->device_id) {
170
        case IXGBE_DEV_ID_82598AF_DUAL_PORT:
171
        case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
172
        case IXGBE_DEV_ID_82598EB_CX4:
173
                media_type = ixgbe_media_type_fiber;
174
                break;
175
        case IXGBE_DEV_ID_82598AT_DUAL_PORT:
176
                media_type = ixgbe_media_type_copper;
177
                break;
178
        default:
179
                media_type = ixgbe_media_type_unknown;
180
                break;
181
        }
182
 
183
        return media_type;
184
}
185
 
186
/**
187
 *  ixgbe_setup_mac_link_82598 - Configures MAC link settings
188
 *  @hw: pointer to hardware structure
189
 *
190
 *  Configures link settings based on values in the ixgbe_hw struct.
191
 *  Restarts the link.  Performs autonegotiation if needed.
192
 **/
193
static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw)
194
{
195
        u32 autoc_reg;
196
        u32 links_reg;
197
        u32 i;
198
        s32 status = 0;
199
 
200
        autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
201
 
202
        if (hw->mac.link_settings_loaded) {
203
                autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
204
                autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
205
                autoc_reg |= hw->mac.link_attach_type;
206
                autoc_reg |= hw->mac.link_mode_select;
207
 
208
                IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
209
                msleep(50);
210
        }
211
 
212
        /* Restart link */
213
        autoc_reg |= IXGBE_AUTOC_AN_RESTART;
214
        IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
215
 
216
        /* Only poll for autoneg to complete if specified to do so */
217
        if (hw->phy.autoneg_wait_to_complete) {
218
                if (hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN ||
219
                    hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) {
220
                        links_reg = 0; /* Just in case Autoneg time = 0 */
221
                        for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
222
                                links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
223
                                if (links_reg & IXGBE_LINKS_KX_AN_COMP)
224
                                        break;
225
                                msleep(100);
226
                        }
227
                        if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
228
                                status = IXGBE_ERR_AUTONEG_NOT_COMPLETE;
229
                                hw_dbg(hw,
230
                                       "Autonegotiation did not complete.\n");
231
                        }
232
                }
233
        }
234
 
235
        /*
236
         * We want to save off the original Flow Control configuration just in
237
         * case we get disconnected and then reconnected into a different hub
238
         * or switch with different Flow Control capabilities.
239
         */
240
        hw->fc.type = hw->fc.original_type;
241
        ixgbe_setup_fc(hw, 0);
242
 
243
        /* Add delay to filter out noises during initial link setup */
244
        msleep(50);
245
 
246
        return status;
247
}
248
 
249
/**
250
 *  ixgbe_check_mac_link_82598 - Get link/speed status
251
 *  @hw: pointer to hardware structure
252
 *  @speed: pointer to link speed
253
 *  @link_up: true is link is up, false otherwise
254
 *
255
 *  Reads the links register to determine if link is up and the current speed
256
 **/
257
static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
258
                                      bool *link_up)
259
{
260
        u32 links_reg;
261
 
262
        links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
263
 
264
        if (links_reg & IXGBE_LINKS_UP)
265
                *link_up = true;
266
        else
267
                *link_up = false;
268
 
269
        if (links_reg & IXGBE_LINKS_SPEED)
270
                *speed = IXGBE_LINK_SPEED_10GB_FULL;
271
        else
272
                *speed = IXGBE_LINK_SPEED_1GB_FULL;
273
 
274
        return 0;
275
}
276
 
277
/**
278
 *  ixgbe_setup_mac_link_speed_82598 - Set MAC link speed
279
 *  @hw: pointer to hardware structure
280
 *  @speed: new link speed
281
 *  @autoneg: true if auto-negotiation enabled
282
 *  @autoneg_wait_to_complete: true if waiting is needed to complete
283
 *
284
 *  Set the link speed in the AUTOC register and restarts link.
285
 **/
286
static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
287
                                            u32 speed, bool autoneg,
288
                                            bool autoneg_wait_to_complete)
289
{
290
        s32 status = 0;
291
 
292
        /* If speed is 10G, then check for CX4 or XAUI. */
293
        if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
294
            (!(hw->mac.link_attach_type & IXGBE_AUTOC_10G_KX4)))
295
                hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
296
        else if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && (!autoneg))
297
                hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_LINK_NO_AN;
298
        else if (autoneg) {
299
                /* BX mode - Autonegotiate 1G */
300
                if (!(hw->mac.link_attach_type & IXGBE_AUTOC_1G_PMA_PMD))
301
                        hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_AN;
302
                else /* KX/KX4 mode */
303
                        hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN_1G_AN;
304
        } else {
305
                status = IXGBE_ERR_LINK_SETUP;
306
        }
307
 
308
        if (status == 0) {
309
                hw->phy.autoneg_wait_to_complete = autoneg_wait_to_complete;
310
 
311
                hw->mac.link_settings_loaded = true;
312
                /*
313
                 * Setup and restart the link based on the new values in
314
                 * ixgbe_hw This will write the AUTOC register based on the new
315
                 * stored values
316
                 */
317
                hw->phy.ops.setup(hw);
318
        }
319
 
320
        return status;
321
}
322
 
323
 
324
/**
325
 *  ixgbe_setup_copper_link_82598 - Setup copper link settings
326
 *  @hw: pointer to hardware structure
327
 *
328
 *  Configures link settings based on values in the ixgbe_hw struct.
329
 *  Restarts the link.  Performs autonegotiation if needed.  Restart
330
 *  phy and wait for autonegotiate to finish.  Then synchronize the
331
 *  MAC and PHY.
332
 **/
333
static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
334
{
335
        s32 status;
336
        u32 speed = 0;
337
        bool link_up = false;
338
 
339
        /* Set up MAC */
340
        hw->phy.ops.setup(hw);
341
 
342
        /* Restart autonegotiation on PHY */
343
        status = hw->phy.ops.setup(hw);
344
 
345
        /* Synchronize MAC to PHY speed */
346
        if (status == 0)
347
                status = hw->phy.ops.check(hw, &speed, &link_up);
348
 
349
        return status;
350
}
351
 
352
/**
353
 *  ixgbe_check_copper_link_82598 - Syncs MAC & PHY link settings
354
 *  @hw: pointer to hardware structure
355
 *  @speed: pointer to link speed
356
 *  @link_up: true if link is up, false otherwise
357
 *
358
 *  Reads the mac link, phy link, and synchronizes the MAC to PHY.
359
 **/
360
static s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, u32 *speed,
361
                                         bool *link_up)
362
{
363
        s32 status;
364
        u32 phy_speed = 0;
365
        bool phy_link = false;
366
 
367
        /* This is the speed and link the MAC is set at */
368
        hw->phy.ops.check(hw, speed, link_up);
369
 
370
        /*
371
         * Check current speed and link status of the PHY register.
372
         * This is a vendor specific register and may have to
373
         * be changed for other copper PHYs.
374
         */
375
        status = hw->phy.ops.check(hw, &phy_speed, &phy_link);
376
 
377
        if ((status == 0) && (phy_link)) {
378
                /*
379
                 * Check current link status of the MACs link's register
380
                 * matches that of the speed in the PHY register
381
                 */
382
                if (*speed != phy_speed) {
383
                        /*
384
                         * The copper PHY requires 82598 attach type to be XAUI
385
                         * for 10G and BX for 1G
386
                         */
387
                        hw->mac.link_attach_type =
388
                                (IXGBE_AUTOC_10G_XAUI | IXGBE_AUTOC_1G_BX);
389
 
390
                        /* Synchronize the MAC speed to the PHY speed */
391
                        status = hw->phy.ops.setup_speed(hw, phy_speed, false,
392
                                                          false);
393
                        if (status == 0)
394
                                hw->phy.ops.check(hw, speed, link_up);
395
                        else
396
                                status = IXGBE_ERR_LINK_SETUP;
397
                }
398
        } else {
399
                *link_up = phy_link;
400
        }
401
 
402
        return status;
403
}
404
 
405
/**
406
 *  ixgbe_setup_copper_link_speed_82598 - Set the PHY autoneg advertised field
407
 *  @hw: pointer to hardware structure
408
 *  @speed: new link speed
409
 *  @autoneg: true if autonegotiation enabled
410
 *  @autoneg_wait_to_complete: true if waiting is needed to complete
411
 *
412
 *  Sets the link speed in the AUTOC register in the MAC and restarts link.
413
 **/
414
static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
415
                                               bool autoneg,
416
                                               bool autoneg_wait_to_complete)
417
{
418
        s32 status;
419
        bool link_up = 0;
420
 
421
        /* Setup the PHY according to input speed */
422
        status = hw->phy.ops.setup_speed(hw, speed, autoneg,
423
                                          autoneg_wait_to_complete);
424
 
425
        /* Synchronize MAC to PHY speed */
426
        if (status == 0)
427
                status = hw->phy.ops.check(hw, &speed, &link_up);
428
 
429
        return status;
430
}
431
 
432
/**
433
 *  ixgbe_reset_hw_82598 - Performs hardware reset
434
 *  @hw: pointer to hardware structure
435
 *
436
 *  Resets the hardware by reseting the transmit and receive units, masks and
437
 *  clears all interrupts, performing a PHY reset, and performing a link (MAC)
438
 *  reset.
439
 **/
440
static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
441
{
442
        s32 status = 0;
443
        u32 ctrl;
444
        u32 gheccr;
445
        u32 i;
446
        u32 autoc;
447
        u8  analog_val;
448
 
449
        /* Call adapter stop to disable tx/rx and clear interrupts */
450
        ixgbe_stop_adapter(hw);
451
 
452
        /*
453
         * Power up the Atlas TX lanes if they are currently powered down.
454
         * Atlas TX lanes are powered down for MAC loopback tests, but
455
         * they are not automatically restored on reset.
456
         */
457
        ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
458
        if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) {
459
                /* Enable TX Atlas so packets can be transmitted again */
460
                ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
461
                analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN;
462
                ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, analog_val);
463
 
464
                ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &analog_val);
465
                analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
466
                ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, analog_val);
467
 
468
                ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &analog_val);
469
                analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
470
                ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, analog_val);
471
 
472
                ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &analog_val);
473
                analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
474
                ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, analog_val);
475
        }
476
 
477
        /* Reset PHY */
478
        ixgbe_reset_phy(hw);
479
 
480
        /*
481
         * Prevent the PCI-E bus from from hanging by disabling PCI-E master
482
         * access and verify no pending requests before reset
483
         */
484
        if (ixgbe_disable_pcie_master(hw) != 0) {
485
                status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
486
                hw_dbg(hw, "PCI-E Master disable polling has failed.\n");
487
        }
488
 
489
        /*
490
         * Issue global reset to the MAC.  This needs to be a SW reset.
491
         * If link reset is used, it might reset the MAC when mng is using it
492
         */
493
        ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
494
        IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST));
495
        IXGBE_WRITE_FLUSH(hw);
496
 
497
        /* Poll for reset bit to self-clear indicating reset is complete */
498
        for (i = 0; i < 10; i++) {
499
                udelay(1);
500
                ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
501
                if (!(ctrl & IXGBE_CTRL_RST))
502
                        break;
503
        }
504
        if (ctrl & IXGBE_CTRL_RST) {
505
                status = IXGBE_ERR_RESET_FAILED;
506
                hw_dbg(hw, "Reset polling failed to complete.\n");
507
        }
508
 
509
        msleep(50);
510
 
511
        gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR);
512
        gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6));
513
        IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr);
514
 
515
        /*
516
         * AUTOC register which stores link settings gets cleared
517
         * and reloaded from EEPROM after reset. We need to restore
518
         * our stored value from init in case SW changed the attach
519
         * type or speed.  If this is the first time and link settings
520
         * have not been stored, store default settings from AUTOC.
521
         */
522
        autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
523
        if (hw->mac.link_settings_loaded) {
524
                autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE);
525
                autoc &= ~(IXGBE_AUTOC_LMS_MASK);
526
                autoc |= hw->mac.link_attach_type;
527
                autoc |= hw->mac.link_mode_select;
528
                IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
529
        } else {
530
                hw->mac.link_attach_type =
531
                                         (autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE);
532
                hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK);
533
                hw->mac.link_settings_loaded = true;
534
        }
535
 
536
        /* Store the permanent mac address */
537
        ixgbe_get_mac_addr(hw, hw->mac.perm_addr);
538
 
539
        return status;
540
}
541
 
542
static struct ixgbe_mac_operations mac_ops_82598 = {
543
        .reset                  = &ixgbe_reset_hw_82598,
544
        .get_media_type         = &ixgbe_get_media_type_82598,
545
};
546
 
547
static struct ixgbe_phy_operations phy_ops_82598EB = {
548
        .setup                  = &ixgbe_setup_copper_link_82598,
549
        .check                  = &ixgbe_check_copper_link_82598,
550
        .setup_speed            = &ixgbe_setup_copper_link_speed_82598,
551
        .get_settings           = &ixgbe_get_copper_link_settings_82598,
552
};
553
 
554
struct ixgbe_info ixgbe_82598EB_info = {
555
        .mac                    = ixgbe_mac_82598EB,
556
        .get_invariants         = &ixgbe_get_invariants_82598,
557
        .mac_ops                = &mac_ops_82598,
558
        .phy_ops                = &phy_ops_82598EB,
559
};
560
 
561
static struct ixgbe_phy_operations phy_ops_82598AT = {
562
        .setup                  = &ixgbe_setup_tnx_phy_link,
563
        .check                  = &ixgbe_check_tnx_phy_link,
564
        .setup_speed            = &ixgbe_setup_tnx_phy_link_speed,
565
        .get_settings           = &ixgbe_get_copper_link_settings_82598,
566
};
567
 
568
struct ixgbe_info ixgbe_82598AT_info = {
569
        .mac                    = ixgbe_mac_82598EB,
570
        .get_invariants         = &ixgbe_get_invariants_82598,
571
        .mac_ops                = &mac_ops_82598,
572
        .phy_ops                = &phy_ops_82598AT,
573
};
574
 
575
static struct ixgbe_phy_operations phy_ops_82598AF = {
576
        .setup                  = &ixgbe_setup_mac_link_82598,
577
        .check                  = &ixgbe_check_mac_link_82598,
578
        .setup_speed            = &ixgbe_setup_mac_link_speed_82598,
579
        .get_settings           = &ixgbe_get_link_settings_82598,
580
};
581
 
582
struct ixgbe_info ixgbe_82598AF_info = {
583
        .mac                    = ixgbe_mac_82598EB,
584
        .get_invariants         = &ixgbe_get_invariants_82598,
585
        .mac_ops                = &mac_ops_82598,
586
        .phy_ops                = &phy_ops_82598AF,
587
};
588
 

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