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/* sundance.c: A Linux device driver for the Sundance ST201 "Alta". */

/*

        Written 1999-2000 by Donald Becker.

        This software may be used and distributed according to the terms of

        the GNU General Public License (GPL), incorporated herein by reference.

        Drivers based on or derived from this code fall under the GPL and must

        retain the authorship, copyright and license notice.  This file is not

        a complete program and may only be used when the entire operating

        system is licensed under the GPL.

        The author may be reached as becker@scyld.com, or C/O

        Scyld Computing Corporation

        410 Severn Ave., Suite 210

        Annapolis MD 21403

        Support and updates available at

        http://www.scyld.com/network/sundance.html

        [link no longer provides useful info -jgarzik]

        Archives of the mailing list are still available at

        http://www.beowulf.org/pipermail/netdrivers/

*/

#define DRV_NAME        "sundance"

#define DRV_VERSION     "1.2"

#define DRV_RELDATE     "11-Sep-2006"

/* The user-configurable values.

   These may be modified when a driver module is loaded.*/

static int debug = 1;                   /* 1 normal messages, 0 quiet .. 7 verbose. */

/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).

   Typical is a 64 element hash table based on the Ethernet CRC.  */

static const int multicast_filter_limit = 32;

/* Set the copy breakpoint for the copy-only-tiny-frames scheme.

   Setting to > 1518 effectively disables this feature.

   This chip can receive into offset buffers, so the Alpha does not

   need a copy-align. */

static int rx_copybreak;

static int flowctrl=1;

/* media[] specifies the media type the NIC operates at.

                 autosense      Autosensing active media.

                 10mbps_hd      10Mbps half duplex.

                 10mbps_fd      10Mbps full duplex.

                 100mbps_hd     100Mbps half duplex.

                 100mbps_fd     100Mbps full duplex.

                 1              10Mbps half duplex.

                 2              10Mbps full duplex.

                 3              100Mbps half duplex.

                 4              100Mbps full duplex.

*/

#define MAX_UNITS 8

static char *media[MAX_UNITS];

/* Operational parameters that are set at compile time. */

/* Keep the ring sizes a power of two for compile efficiency.

   The compiler will convert <unsigned>'%'<2^N> into a bit mask.

   Making the Tx ring too large decreases the effectiveness of channel

   bonding and packet priority, and more than 128 requires modifying the

   Tx error recovery.

   Large receive rings merely waste memory. */

#define TX_RING_SIZE    32

#define TX_QUEUE_LEN    (TX_RING_SIZE - 1) /* Limit ring entries actually used.  */

#define RX_RING_SIZE    64

#define RX_BUDGET       32

#define TX_TOTAL_SIZE   TX_RING_SIZE*sizeof(struct netdev_desc)

#define RX_TOTAL_SIZE   RX_RING_SIZE*sizeof(struct netdev_desc)

/* Operational parameters that usually are not changed. */

/* Time in jiffies before concluding the transmitter is hung. */

#define TX_TIMEOUT  (4*HZ)

#define PKT_BUF_SZ              1536    /* Size of each temporary Rx buffer.*/

/* Include files, designed to support most kernel versions 2.0.0 and later. */

#include <linux/module.h>

#include <linux/kernel.h>

#include <linux/string.h>

#include <linux/timer.h>

#include <linux/errno.h>

#include <linux/ioport.h>

#include <linux/slab.h>

#include <linux/interrupt.h>

#include <linux/pci.h>

#include <linux/netdevice.h>

#include <linux/etherdevice.h>

#include <linux/skbuff.h>

#include <linux/init.h>

#include <linux/bitops.h>

#include <asm/uaccess.h>

#include <asm/processor.h>              /* Processor type for cache alignment. */

#include <asm/io.h>

#include <linux/delay.h>

#include <linux/spinlock.h>

#ifndef _COMPAT_WITH_OLD_KERNEL

#include <linux/crc32.h>

#include <linux/ethtool.h>

#include <linux/mii.h>

#else

#include "crc32.h"

#include "ethtool.h"

#include "mii.h"

#include "compat.h"

#endif

/* These identify the driver base version and may not be removed. */

static char version[] =

KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE "  Written by Donald Becker\n";

MODULE_AUTHOR("Donald Becker <becker@scyld.com>");

MODULE_DESCRIPTION("Sundance Alta Ethernet driver");

MODULE_LICENSE("GPL");

module_param(debug, int, 0);

module_param(rx_copybreak, int, 0);

module_param_array(media, charp, NULL, 0);

module_param(flowctrl, int, 0);

MODULE_PARM_DESC(debug, "Sundance Alta debug level (0-5)");

MODULE_PARM_DESC(rx_copybreak, "Sundance Alta copy breakpoint for copy-only-tiny-frames");

MODULE_PARM_DESC(flowctrl, "Sundance Alta flow control [0|1]");

/*

                                Theory of Operation

I. Board Compatibility

This driver is designed for the Sundance Technologies "Alta" ST201 chip.

II. Board-specific settings

III. Driver operation

IIIa. Ring buffers

This driver uses two statically allocated fixed-size descriptor lists

formed into rings by a branch from the final descriptor to the beginning of

the list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.

Some chips explicitly use only 2^N sized rings, while others use a

'next descriptor' pointer that the driver forms into rings.

IIIb/c. Transmit/Receive Structure

This driver uses a zero-copy receive and transmit scheme.

The driver allocates full frame size skbuffs for the Rx ring buffers at

open() time and passes the skb->data field to the chip as receive data

buffers.  When an incoming frame is less than RX_COPYBREAK bytes long,

a fresh skbuff is allocated and the frame is copied to the new skbuff.

When the incoming frame is larger, the skbuff is passed directly up the

protocol stack.  Buffers consumed this way are replaced by newly allocated

skbuffs in a later phase of receives.

The RX_COPYBREAK value is chosen to trade-off the memory wasted by

using a full-sized skbuff for small frames vs. the copying costs of larger

frames.  New boards are typically used in generously configured machines

and the underfilled buffers have negligible impact compared to the benefit of

a single allocation size, so the default value of zero results in never

copying packets.  When copying is done, the cost is usually mitigated by using

a combined copy/checksum routine.  Copying also preloads the cache, which is

most useful with small frames.

A subtle aspect of the operation is that the IP header at offset 14 in an

ethernet frame isn't longword aligned for further processing.

Unaligned buffers are permitted by the Sundance hardware, so

frames are received into the skbuff at an offset of "+2", 16-byte aligning

the IP header.

IIId. Synchronization

The driver runs as two independent, single-threaded flows of control.  One

is the send-packet routine, which enforces single-threaded use by the

dev->tbusy flag.  The other thread is the interrupt handler, which is single

threaded by the hardware and interrupt handling software.

The send packet thread has partial control over the Tx ring and 'dev->tbusy'

flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the next

queue slot is empty, it clears the tbusy flag when finished otherwise it sets

the 'lp->tx_full' flag.

The interrupt handler has exclusive control over the Rx ring and records stats

from the Tx ring.  After reaping the stats, it marks the Tx queue entry as

empty by incrementing the dirty_tx mark. Iff the 'lp->tx_full' flag is set, it

clears both the tx_full and tbusy flags.

IV. Notes

IVb. References

The Sundance ST201 datasheet, preliminary version.

The Kendin KS8723 datasheet, preliminary version.

The ICplus IP100 datasheet, preliminary version.

http://www.scyld.com/expert/100mbps.html

http://www.scyld.com/expert/NWay.html

IVc. Errata

*/

/* Work-around for Kendin chip bugs. */

#ifndef CONFIG_SUNDANCE_MMIO

#define USE_IO_OPS 1

#endif

static const struct pci_device_id sundance_pci_tbl[] = {

        { 0x1186, 0x1002, 0x1186, 0x1002, 0, 0, 0 },

        { 0x1186, 0x1002, 0x1186, 0x1003, 0, 0, 1 },

        { 0x1186, 0x1002, 0x1186, 0x1012, 0, 0, 2 },

        { 0x1186, 0x1002, 0x1186, 0x1040, 0, 0, 3 },

        { 0x1186, 0x1002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },

        { 0x13F0, 0x0201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },

        { 0x13F0, 0x0200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },

        { }

};

MODULE_DEVICE_TABLE(pci, sundance_pci_tbl);

enum {

        netdev_io_size = 128

};

struct pci_id_info {

        const char *name;

};

static const struct pci_id_info pci_id_tbl[] __devinitdata = {

        {"D-Link DFE-550TX FAST Ethernet Adapter"},

        {"D-Link DFE-550FX 100Mbps Fiber-optics Adapter"},

        {"D-Link DFE-580TX 4 port Server Adapter"},

        {"D-Link DFE-530TXS FAST Ethernet Adapter"},

        {"D-Link DL10050-based FAST Ethernet Adapter"},

        {"Sundance Technology Alta"},

        {"IC Plus Corporation IP100A FAST Ethernet Adapter"},

        { }     /* terminate list. */

};

/* This driver was written to use PCI memory space, however x86-oriented

   hardware often uses I/O space accesses. */

/* Offsets to the device registers.

   Unlike software-only systems, device drivers interact with complex hardware.

   It's not useful to define symbolic names for every register bit in the

   device.  The name can only partially document the semantics and make

   the driver longer and more difficult to read.

   In general, only the important configuration values or bits changed

   multiple times should be defined symbolically.

*/

enum alta_offsets {

        DMACtrl = 0x00,

        TxListPtr = 0x04,

        TxDMABurstThresh = 0x08,

        TxDMAUrgentThresh = 0x09,

        TxDMAPollPeriod = 0x0a,

        RxDMAStatus = 0x0c,

        RxListPtr = 0x10,

        DebugCtrl0 = 0x1a,

        DebugCtrl1 = 0x1c,

        RxDMABurstThresh = 0x14,

        RxDMAUrgentThresh = 0x15,

        RxDMAPollPeriod = 0x16,

        LEDCtrl = 0x1a,

        ASICCtrl = 0x30,

        EEData = 0x34,

        EECtrl = 0x36,

        FlashAddr = 0x40,

        FlashData = 0x44,

        TxStatus = 0x46,

        TxFrameId = 0x47,

        DownCounter = 0x18,

        IntrClear = 0x4a,

        IntrEnable = 0x4c,

        IntrStatus = 0x4e,

        MACCtrl0 = 0x50,

        MACCtrl1 = 0x52,

        StationAddr = 0x54,

        MaxFrameSize = 0x5A,

        RxMode = 0x5c,

        MIICtrl = 0x5e,

        MulticastFilter0 = 0x60,

        MulticastFilter1 = 0x64,

        RxOctetsLow = 0x68,

        RxOctetsHigh = 0x6a,

        TxOctetsLow = 0x6c,

        TxOctetsHigh = 0x6e,

        TxFramesOK = 0x70,

        RxFramesOK = 0x72,

        StatsCarrierError = 0x74,

        StatsLateColl = 0x75,

        StatsMultiColl = 0x76,

        StatsOneColl = 0x77,

        StatsTxDefer = 0x78,

        RxMissed = 0x79,

        StatsTxXSDefer = 0x7a,

        StatsTxAbort = 0x7b,

        StatsBcastTx = 0x7c,

        StatsBcastRx = 0x7d,

        StatsMcastTx = 0x7e,

        StatsMcastRx = 0x7f,

        /* Aliased and bogus values! */

        RxStatus = 0x0c,

};

enum ASICCtrl_HiWord_bit {

        GlobalReset = 0x0001,

        RxReset = 0x0002,

        TxReset = 0x0004,

        DMAReset = 0x0008,

        FIFOReset = 0x0010,

        NetworkReset = 0x0020,

        HostReset = 0x0040,

        ResetBusy = 0x0400,

};

/* Bits in the interrupt status/mask registers. */

enum intr_status_bits {

        IntrSummary=0x0001, IntrPCIErr=0x0002, IntrMACCtrl=0x0008,

        IntrTxDone=0x0004, IntrRxDone=0x0010, IntrRxStart=0x0020,

        IntrDrvRqst=0x0040,

        StatsMax=0x0080, LinkChange=0x0100,

        IntrTxDMADone=0x0200, IntrRxDMADone=0x0400,

};

/* Bits in the RxMode register. */

enum rx_mode_bits {

        AcceptAllIPMulti=0x20, AcceptMultiHash=0x10, AcceptAll=0x08,

        AcceptBroadcast=0x04, AcceptMulticast=0x02, AcceptMyPhys=0x01,

};

/* Bits in MACCtrl. */

enum mac_ctrl0_bits {

        EnbFullDuplex=0x20, EnbRcvLargeFrame=0x40,

        EnbFlowCtrl=0x100, EnbPassRxCRC=0x200,

};

enum mac_ctrl1_bits {

        StatsEnable=0x0020,     StatsDisable=0x0040, StatsEnabled=0x0080,

        TxEnable=0x0100, TxDisable=0x0200, TxEnabled=0x0400,

        RxEnable=0x0800, RxDisable=0x1000, RxEnabled=0x2000,

};

/* The Rx and Tx buffer descriptors. */

/* Note that using only 32 bit fields simplifies conversion to big-endian

   architectures. */

struct netdev_desc {

        __le32 next_desc;

        __le32 status;

        struct desc_frag { __le32 addr, length; } frag[1];

};

/* Bits in netdev_desc.status */

enum desc_status_bits {

        DescOwn=0x8000,

        DescEndPacket=0x4000,

        DescEndRing=0x2000,

        LastFrag=0x80000000,

        DescIntrOnTx=0x8000,

        DescIntrOnDMADone=0x80000000,

        DisableAlign = 0x00000001,

};

#define PRIV_ALIGN      15      /* Required alignment mask */

/* Use  __attribute__((aligned (L1_CACHE_BYTES)))  to maintain alignment

   within the structure. */

#define MII_CNT         4

struct netdev_private {

        /* Descriptor rings first for alignment. */

        struct netdev_desc *rx_ring;

        struct netdev_desc *tx_ring;

        struct sk_buff* rx_skbuff[RX_RING_SIZE];

        struct sk_buff* tx_skbuff[TX_RING_SIZE];

        dma_addr_t tx_ring_dma;

        dma_addr_t rx_ring_dma;

        struct net_device_stats stats;

        struct timer_list timer;                /* Media monitoring timer. */

        /* Frequently used values: keep some adjacent for cache effect. */

        spinlock_t lock;

        spinlock_t rx_lock;                     /* Group with Tx control cache line. */

        int msg_enable;

        int chip_id;

        unsigned int cur_rx, dirty_rx;          /* Producer/consumer ring indices */

        unsigned int rx_buf_sz;                 /* Based on MTU+slack. */

        struct netdev_desc *last_tx;            /* Last Tx descriptor used. */

        unsigned int cur_tx, dirty_tx;

        /* These values are keep track of the transceiver/media in use. */

        unsigned int flowctrl:1;

        unsigned int default_port:4;            /* Last dev->if_port value. */

        unsigned int an_enable:1;

        unsigned int speed;

        struct tasklet_struct rx_tasklet;

        struct tasklet_struct tx_tasklet;

        int budget;

        int cur_task;

        /* Multicast and receive mode. */

        spinlock_t mcastlock;                   /* SMP lock multicast updates. */

        u16 mcast_filter[4];

        /* MII transceiver section. */

        struct mii_if_info mii_if;

        int mii_preamble_required;

        unsigned char phys[MII_CNT];            /* MII device addresses, only first one used. */

        struct pci_dev *pci_dev;

        void __iomem *base;

};

/* The station address location in the EEPROM. */

#define EEPROM_SA_OFFSET        0x10

#define DEFAULT_INTR (IntrRxDMADone | IntrPCIErr | \

                        IntrDrvRqst | IntrTxDone | StatsMax | \

                        LinkChange)

static int  change_mtu(struct net_device *dev, int new_mtu);

static int  eeprom_read(void __iomem *ioaddr, int location);

static int  mdio_read(struct net_device *dev, int phy_id, int location);

static void mdio_write(struct net_device *dev, int phy_id, int location, int value);

static int  netdev_open(struct net_device *dev);

static void check_duplex(struct net_device *dev);

static void netdev_timer(unsigned long data);

static void tx_timeout(struct net_device *dev);

static void init_ring(struct net_device *dev);

static int  start_tx(struct sk_buff *skb, struct net_device *dev);

static int reset_tx (struct net_device *dev);

static irqreturn_t intr_handler(int irq, void *dev_instance);

static void rx_poll(unsigned long data);

static void tx_poll(unsigned long data);

static void refill_rx (struct net_device *dev);

static void netdev_error(struct net_device *dev, int intr_status);

static void netdev_error(struct net_device *dev, int intr_status);

static void set_rx_mode(struct net_device *dev);

static int __set_mac_addr(struct net_device *dev);

static struct net_device_stats *get_stats(struct net_device *dev);

static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);

static int  netdev_close(struct net_device *dev);

static const struct ethtool_ops ethtool_ops;

static void sundance_reset(struct net_device *dev, unsigned long reset_cmd)

{

        struct netdev_private *np = netdev_priv(dev);

        void __iomem *ioaddr = np->base + ASICCtrl;

        int countdown;

        /* ST201 documentation states ASICCtrl is a 32bit register */

        iowrite32 (reset_cmd | ioread32 (ioaddr), ioaddr);

        /* ST201 documentation states reset can take up to 1 ms */

        countdown = 10 + 1;

        while (ioread32 (ioaddr) & (ResetBusy << 16)) {

                if (--countdown == 0) {

                        printk(KERN_WARNING "%s : reset not completed !!\n", dev->name);

                        break;

                }

                udelay(100);

        }

}

static int __devinit sundance_probe1 (struct pci_dev *pdev,

                                      const struct pci_device_id *ent)

{

        struct net_device *dev;

        struct netdev_private *np;

        static int card_idx;

        int chip_idx = ent->driver_data;

        int irq;

        int i;

        void __iomem *ioaddr;

        u16 mii_ctl;

        void *ring_space;

        dma_addr_t ring_dma;

#ifdef USE_IO_OPS

        int bar = 0;

#else

        int bar = 1;

#endif

        int phy, phy_end, phy_idx = 0;

        DECLARE_MAC_BUF(mac);

/* when built into the kernel, we only print version if device is found */

#ifndef MODULE

        static int printed_version;

        if (!printed_version++)

                printk(version);

#endif

        if (pci_enable_device(pdev))

                return -EIO;

        pci_set_master(pdev);

        irq = pdev->irq;

        dev = alloc_etherdev(sizeof(*np));

        if (!dev)

                return -ENOMEM;

        SET_NETDEV_DEV(dev, &pdev->dev);

        if (pci_request_regions(pdev, DRV_NAME))

                goto err_out_netdev;

        ioaddr = pci_iomap(pdev, bar, netdev_io_size);

        if (!ioaddr)

                goto err_out_res;

        for (i = 0; i < 3; i++)

                ((__le16 *)dev->dev_addr)[i] =

                        cpu_to_le16(eeprom_read(ioaddr, i + EEPROM_SA_OFFSET));

        memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);

        dev->base_addr = (unsigned long)ioaddr;

        dev->irq = irq;

        np = netdev_priv(dev);

        np->base = ioaddr;

        np->pci_dev = pdev;

        np->chip_id = chip_idx;

        np->msg_enable = (1 << debug) - 1;

        spin_lock_init(&np->lock);

        tasklet_init(&np->rx_tasklet, rx_poll, (unsigned long)dev);

        tasklet_init(&np->tx_tasklet, tx_poll, (unsigned long)dev);

        ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);

        if (!ring_space)

                goto err_out_cleardev;

        np->tx_ring = (struct netdev_desc *)ring_space;

        np->tx_ring_dma = ring_dma;

        ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);

        if (!ring_space)

                goto err_out_unmap_tx;

        np->rx_ring = (struct netdev_desc *)ring_space;

        np->rx_ring_dma = ring_dma;

        np->mii_if.dev = dev;

        np->mii_if.mdio_read = mdio_read;

        np->mii_if.mdio_write = mdio_write;

        np->mii_if.phy_id_mask = 0x1f;

        np->mii_if.reg_num_mask = 0x1f;

        /* The chip-specific entries in the device structure. */

        dev->open = &netdev_open;

        dev->hard_start_xmit = &start_tx;

        dev->stop = &netdev_close;

        dev->get_stats = &get_stats;

        dev->set_multicast_list = &set_rx_mode;

        dev->do_ioctl = &netdev_ioctl;

        SET_ETHTOOL_OPS(dev, &ethtool_ops);

        dev->tx_timeout = &tx_timeout;

        dev->watchdog_timeo = TX_TIMEOUT;

        dev->change_mtu = &change_mtu;

        pci_set_drvdata(pdev, dev);

        i = register_netdev(dev);

        if (i)

                goto err_out_unmap_rx;

        printk(KERN_INFO "%s: %s at %p, %s, IRQ %d.\n",

               dev->name, pci_id_tbl[chip_idx].name, ioaddr,

               print_mac(mac, dev->dev_addr), irq);

        np->phys[0] = 1;         /* Default setting */

        np->mii_preamble_required++;

        /*

         * It seems some phys doesn't deal well with address 0 being accessed

         * first

         */

        if (sundance_pci_tbl[np->chip_id].device == 0x0200) {

                phy = 0;

                phy_end = 31;

        } else {

                phy = 1;

                phy_end = 32;   /* wraps to zero, due to 'phy & 0x1f' */

        }

        for (; phy <= phy_end && phy_idx < MII_CNT; phy++) {

                int phyx = phy & 0x1f;

                int mii_status = mdio_read(dev, phyx, MII_BMSR);

                if (mii_status != 0xffff  &&  mii_status != 0x0000) {

                        np->phys[phy_idx++] = phyx;

                        np->mii_if.advertising = mdio_read(dev, phyx, MII_ADVERTISE);

                        if ((mii_status & 0x0040) == 0)

                                np->mii_preamble_required++;

                        printk(KERN_INFO "%s: MII PHY found at address %d, status "

                                   "0x%4.4x advertising %4.4x.\n",

                                   dev->name, phyx, mii_status, np->mii_if.advertising);

                }

        }

        np->mii_preamble_required--;

        if (phy_idx == 0) {

                printk(KERN_INFO "%s: No MII transceiver found, aborting.  ASIC status %x\n",

                           dev->name, ioread32(ioaddr + ASICCtrl));

                goto err_out_unregister;

        }

        np->mii_if.phy_id = np->phys[0];

        /* Parse override configuration */

        np->an_enable = 1;

        if (card_idx < MAX_UNITS) {

                if (media[card_idx] != NULL) {

                        np->an_enable = 0;

                        if (strcmp (media[card_idx], "100mbps_fd") == 0 ||

                            strcmp (media[card_idx], "4") == 0) {

                                np->speed = 100;

                                np->mii_if.full_duplex = 1;

                        } else if (strcmp (media[card_idx], "100mbps_hd") == 0

                                   || strcmp (media[card_idx], "3") == 0) {

                                np->speed = 100;

                                np->mii_if.full_duplex = 0;

                        } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||

                                   strcmp (media[card_idx], "2") == 0) {

                                np->speed = 10;

                                np->mii_if.full_duplex = 1;

                        } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||

                                   strcmp (media[card_idx], "1") == 0) {

                                np->speed = 10;

                                np->mii_if.full_duplex = 0;

                        } else {

                                np->an_enable = 1;

                        }

                }

                if (flowctrl == 1)

                        np->flowctrl = 1;

        }

        /* Fibre PHY? */

        if (ioread32 (ioaddr + ASICCtrl) & 0x80) {

                /* Default 100Mbps Full */

                if (np->an_enable) {

                        np->speed = 100;

                        np->mii_if.full_duplex = 1;

                        np->an_enable = 0;

                }

        }

        /* Reset PHY */

        mdio_write (dev, np->phys[0], MII_BMCR, BMCR_RESET);

        mdelay (300);

        /* If flow control enabled, we need to advertise it.*/

        if (np->flowctrl)

                mdio_write (dev, np->phys[0], MII_ADVERTISE, np->mii_if.advertising | 0x0400);

        mdio_write (dev, np->phys[0], MII_BMCR, BMCR_ANENABLE|BMCR_ANRESTART);

        /* Force media type */

        if (!np->an_enable) {

                mii_ctl = 0;

                mii_ctl |= (np->speed == 100) ? BMCR_SPEED100 : 0;

                mii_ctl |= (np->mii_if.full_duplex) ? BMCR_FULLDPLX : 0;

                mdio_write (dev, np->phys[0], MII_BMCR, mii_ctl);

                printk (KERN_INFO "Override speed=%d, %s duplex\n",

                        np->speed, np->mii_if.full_duplex ? "Full" : "Half");

        }

        /* Perhaps move the reset here? */

        /* Reset the chip to erase previous misconfiguration. */

        if (netif_msg_hw(np))

                printk("ASIC Control is %x.\n", ioread32(ioaddr + ASICCtrl));

        sundance_reset(dev, 0x00ff << 16);

        if (netif_msg_hw(np))

                printk("ASIC Control is now %x.\n", ioread32(ioaddr + ASICCtrl));

        card_idx++;

        return 0;

err_out_unregister:

        unregister_netdev(dev);

err_out_unmap_rx:

        pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);

err_out_unmap_tx:

        pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);

err_out_cleardev:

        pci_set_drvdata(pdev, NULL);

        pci_iounmap(pdev, ioaddr);

err_out_res: