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marcus.erl |
/*
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* Linux device driver for RTL8187
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*
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* Copyright 2007 Michael Wu <flamingice@sourmilk.net>
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* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
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*
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* Based on the r8187 driver, which is:
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* Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
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*
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* Magic delays and register offsets below are taken from the original
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* r8187 driver sources. Thanks to Realtek for their support!
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/usb.h>
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#include <linux/delay.h>
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#include <linux/etherdevice.h>
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#include <linux/eeprom_93cx6.h>
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#include <net/mac80211.h>
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#include "rtl8187.h"
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#include "rtl8187_rtl8225.h"
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MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
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MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
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MODULE_DESCRIPTION("RTL8187 USB wireless driver");
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MODULE_LICENSE("GPL");
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static struct usb_device_id rtl8187_table[] __devinitdata = {
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/* Realtek */
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{USB_DEVICE(0x0bda, 0x8187)},
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/* Netgear */
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{USB_DEVICE(0x0846, 0x6100)},
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{USB_DEVICE(0x0846, 0x6a00)},
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/* HP */
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{USB_DEVICE(0x03f0, 0xca02)},
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/* Sitecom */
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{USB_DEVICE(0x0df6, 0x000d)},
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{}
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};
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MODULE_DEVICE_TABLE(usb, rtl8187_table);
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static void rtl8187_iowrite_async_cb(struct urb *urb)
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{
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kfree(urb->context);
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usb_free_urb(urb);
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}
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static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
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void *data, u16 len)
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{
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struct usb_ctrlrequest *dr;
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struct urb *urb;
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struct rtl8187_async_write_data {
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u8 data[4];
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struct usb_ctrlrequest dr;
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} *buf;
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buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
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if (!buf)
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return;
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urb = usb_alloc_urb(0, GFP_ATOMIC);
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if (!urb) {
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kfree(buf);
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return;
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}
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dr = &buf->dr;
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dr->bRequestType = RTL8187_REQT_WRITE;
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dr->bRequest = RTL8187_REQ_SET_REG;
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dr->wValue = addr;
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dr->wIndex = 0;
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dr->wLength = cpu_to_le16(len);
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memcpy(buf, data, len);
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usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
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(unsigned char *)dr, buf, len,
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rtl8187_iowrite_async_cb, buf);
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usb_submit_urb(urb, GFP_ATOMIC);
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}
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static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
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__le32 *addr, u32 val)
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{
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__le32 buf = cpu_to_le32(val);
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rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
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&buf, sizeof(buf));
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}
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void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
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{
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struct rtl8187_priv *priv = dev->priv;
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data <<= 8;
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data |= addr | 0x80;
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rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
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rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
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rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
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rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
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msleep(1);
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}
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static void rtl8187_tx_cb(struct urb *urb)
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{
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struct ieee80211_tx_status status = { {0} };
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struct sk_buff *skb = (struct sk_buff *)urb->context;
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struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
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usb_free_urb(info->urb);
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if (info->control)
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memcpy(&status.control, info->control, sizeof(status.control));
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kfree(info->control);
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skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
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status.flags |= IEEE80211_TX_STATUS_ACK;
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ieee80211_tx_status_irqsafe(info->dev, skb, &status);
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}
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static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
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struct ieee80211_tx_control *control)
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{
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struct rtl8187_priv *priv = dev->priv;
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struct rtl8187_tx_hdr *hdr;
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struct rtl8187_tx_info *info;
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struct urb *urb;
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__le16 rts_dur = 0;
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u32 flags;
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urb = usb_alloc_urb(0, GFP_ATOMIC);
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if (!urb) {
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kfree_skb(skb);
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return 0;
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}
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flags = skb->len;
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flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
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flags |= control->rts_cts_rate << 19;
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flags |= control->tx_rate << 24;
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if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
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flags |= RTL8187_TX_FLAG_MORE_FRAG;
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if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
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flags |= RTL8187_TX_FLAG_RTS;
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rts_dur = ieee80211_rts_duration(dev, priv->if_id, skb->len, control);
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}
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if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
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flags |= RTL8187_TX_FLAG_CTS;
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hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
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hdr->flags = cpu_to_le32(flags);
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hdr->len = 0;
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hdr->rts_duration = rts_dur;
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hdr->retry = cpu_to_le32(control->retry_limit << 8);
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info = (struct rtl8187_tx_info *)skb->cb;
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info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
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info->urb = urb;
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info->dev = dev;
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usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
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hdr, skb->len, rtl8187_tx_cb, skb);
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usb_submit_urb(urb, GFP_ATOMIC);
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return 0;
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}
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static void rtl8187_rx_cb(struct urb *urb)
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{
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struct sk_buff *skb = (struct sk_buff *)urb->context;
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struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
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struct ieee80211_hw *dev = info->dev;
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struct rtl8187_priv *priv = dev->priv;
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struct rtl8187_rx_hdr *hdr;
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struct ieee80211_rx_status rx_status = { 0 };
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int rate, signal;
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u32 flags;
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spin_lock(&priv->rx_queue.lock);
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if (skb->next)
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__skb_unlink(skb, &priv->rx_queue);
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else {
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spin_unlock(&priv->rx_queue.lock);
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return;
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}
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spin_unlock(&priv->rx_queue.lock);
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195 |
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if (unlikely(urb->status)) {
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usb_free_urb(urb);
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dev_kfree_skb_irq(skb);
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return;
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}
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200 |
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201 |
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skb_put(skb, urb->actual_length);
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hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
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flags = le32_to_cpu(hdr->flags);
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skb_trim(skb, flags & 0x0FFF);
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205 |
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206 |
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signal = hdr->agc >> 1;
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rate = (flags >> 20) & 0xF;
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208 |
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if (rate > 3) { /* OFDM rate */
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209 |
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if (signal > 90)
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210 |
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signal = 90;
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211 |
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else if (signal < 25)
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212 |
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signal = 25;
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213 |
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signal = 90 - signal;
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214 |
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} else { /* CCK rate */
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215 |
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if (signal > 95)
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216 |
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signal = 95;
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217 |
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else if (signal < 30)
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218 |
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signal = 30;
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219 |
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signal = 95 - signal;
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220 |
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}
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rx_status.antenna = (hdr->signal >> 7) & 1;
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223 |
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rx_status.signal = 64 - min(hdr->noise, (u8)64);
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224 |
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rx_status.ssi = signal;
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225 |
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rx_status.rate = rate;
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226 |
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rx_status.freq = dev->conf.freq;
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227 |
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rx_status.channel = dev->conf.channel;
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228 |
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rx_status.phymode = dev->conf.phymode;
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229 |
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rx_status.mactime = le64_to_cpu(hdr->mac_time);
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230 |
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if (flags & (1 << 13))
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231 |
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rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
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232 |
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ieee80211_rx_irqsafe(dev, skb, &rx_status);
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233 |
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234 |
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skb = dev_alloc_skb(RTL8187_MAX_RX);
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235 |
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if (unlikely(!skb)) {
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236 |
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usb_free_urb(urb);
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237 |
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/* TODO check rx queue length and refill *somewhere* */
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238 |
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return;
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239 |
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}
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240 |
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241 |
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info = (struct rtl8187_rx_info *)skb->cb;
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242 |
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info->urb = urb;
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243 |
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info->dev = dev;
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244 |
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urb->transfer_buffer = skb_tail_pointer(skb);
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245 |
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urb->context = skb;
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246 |
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skb_queue_tail(&priv->rx_queue, skb);
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247 |
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248 |
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usb_submit_urb(urb, GFP_ATOMIC);
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249 |
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}
|
250 |
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|
251 |
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static int rtl8187_init_urbs(struct ieee80211_hw *dev)
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252 |
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{
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253 |
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struct rtl8187_priv *priv = dev->priv;
|
254 |
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struct urb *entry;
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255 |
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struct sk_buff *skb;
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256 |
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struct rtl8187_rx_info *info;
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257 |
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258 |
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while (skb_queue_len(&priv->rx_queue) < 8) {
|
259 |
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skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
|
260 |
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if (!skb)
|
261 |
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break;
|
262 |
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entry = usb_alloc_urb(0, GFP_KERNEL);
|
263 |
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if (!entry) {
|
264 |
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kfree_skb(skb);
|
265 |
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break;
|
266 |
|
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}
|
267 |
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usb_fill_bulk_urb(entry, priv->udev,
|
268 |
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usb_rcvbulkpipe(priv->udev, 1),
|
269 |
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skb_tail_pointer(skb),
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270 |
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RTL8187_MAX_RX, rtl8187_rx_cb, skb);
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271 |
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info = (struct rtl8187_rx_info *)skb->cb;
|
272 |
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info->urb = entry;
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273 |
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info->dev = dev;
|
274 |
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skb_queue_tail(&priv->rx_queue, skb);
|
275 |
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usb_submit_urb(entry, GFP_KERNEL);
|
276 |
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}
|
277 |
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|
278 |
|
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return 0;
|
279 |
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}
|
280 |
|
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|
281 |
|
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static int rtl8187_init_hw(struct ieee80211_hw *dev)
|
282 |
|
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{
|
283 |
|
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struct rtl8187_priv *priv = dev->priv;
|
284 |
|
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u8 reg;
|
285 |
|
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int i;
|
286 |
|
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|
287 |
|
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/* reset */
|
288 |
|
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rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
|
289 |
|
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reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
|
290 |
|
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rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
|
291 |
|
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rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
|
292 |
|
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rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
|
293 |
|
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rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
|
294 |
|
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rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
|
295 |
|
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|
296 |
|
|
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
|
297 |
|
|
|
298 |
|
|
msleep(200);
|
299 |
|
|
rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
|
300 |
|
|
rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
|
301 |
|
|
rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
|
302 |
|
|
msleep(200);
|
303 |
|
|
|
304 |
|
|
reg = rtl818x_ioread8(priv, &priv->map->CMD);
|
305 |
|
|
reg &= (1 << 1);
|
306 |
|
|
reg |= RTL818X_CMD_RESET;
|
307 |
|
|
rtl818x_iowrite8(priv, &priv->map->CMD, reg);
|
308 |
|
|
|
309 |
|
|
i = 10;
|
310 |
|
|
do {
|
311 |
|
|
msleep(2);
|
312 |
|
|
if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
|
313 |
|
|
RTL818X_CMD_RESET))
|
314 |
|
|
break;
|
315 |
|
|
} while (--i);
|
316 |
|
|
|
317 |
|
|
if (!i) {
|
318 |
|
|
printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
|
319 |
|
|
return -ETIMEDOUT;
|
320 |
|
|
}
|
321 |
|
|
|
322 |
|
|
/* reload registers from eeprom */
|
323 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
|
324 |
|
|
|
325 |
|
|
i = 10;
|
326 |
|
|
do {
|
327 |
|
|
msleep(4);
|
328 |
|
|
if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
|
329 |
|
|
RTL818X_EEPROM_CMD_CONFIG))
|
330 |
|
|
break;
|
331 |
|
|
} while (--i);
|
332 |
|
|
|
333 |
|
|
if (!i) {
|
334 |
|
|
printk(KERN_ERR "%s: eeprom reset timeout!\n",
|
335 |
|
|
wiphy_name(dev->wiphy));
|
336 |
|
|
return -ETIMEDOUT;
|
337 |
|
|
}
|
338 |
|
|
|
339 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
|
340 |
|
|
reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
|
341 |
|
|
rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
|
342 |
|
|
rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
|
343 |
|
|
rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
|
344 |
|
|
rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
|
345 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
|
346 |
|
|
|
347 |
|
|
/* setup card */
|
348 |
|
|
rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
|
349 |
|
|
rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
|
350 |
|
|
|
351 |
|
|
rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
|
352 |
|
|
rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
|
353 |
|
|
rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
|
354 |
|
|
|
355 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
|
356 |
|
|
|
357 |
|
|
rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
|
358 |
|
|
reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
|
359 |
|
|
reg &= 0x3F;
|
360 |
|
|
reg |= 0x80;
|
361 |
|
|
rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
|
362 |
|
|
|
363 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
|
364 |
|
|
|
365 |
|
|
rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
|
366 |
|
|
rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
|
367 |
|
|
rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
|
368 |
|
|
|
369 |
|
|
// TODO: set RESP_RATE and BRSR properly
|
370 |
|
|
rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
|
371 |
|
|
rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
|
372 |
|
|
|
373 |
|
|
/* host_usb_init */
|
374 |
|
|
rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
|
375 |
|
|
rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
|
376 |
|
|
reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
|
377 |
|
|
rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
|
378 |
|
|
rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
|
379 |
|
|
rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
|
380 |
|
|
rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
|
381 |
|
|
rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
|
382 |
|
|
rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
|
383 |
|
|
rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
|
384 |
|
|
msleep(100);
|
385 |
|
|
|
386 |
|
|
rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
|
387 |
|
|
rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
|
388 |
|
|
rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
|
389 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
|
390 |
|
|
rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
|
391 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
|
392 |
|
|
rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
|
393 |
|
|
msleep(100);
|
394 |
|
|
|
395 |
|
|
priv->rf_init(dev);
|
396 |
|
|
|
397 |
|
|
rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
|
398 |
|
|
reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & 0xfffe;
|
399 |
|
|
rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 0x1);
|
400 |
|
|
rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
|
401 |
|
|
rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
|
402 |
|
|
rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
|
403 |
|
|
rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg);
|
404 |
|
|
|
405 |
|
|
return 0;
|
406 |
|
|
}
|
407 |
|
|
|
408 |
|
|
static void rtl8187_set_channel(struct ieee80211_hw *dev, int channel)
|
409 |
|
|
{
|
410 |
|
|
u32 reg;
|
411 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
412 |
|
|
|
413 |
|
|
reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
|
414 |
|
|
/* Enable TX loopback on MAC level to avoid TX during channel
|
415 |
|
|
* changes, as this has be seen to causes problems and the
|
416 |
|
|
* card will stop work until next reset
|
417 |
|
|
*/
|
418 |
|
|
rtl818x_iowrite32(priv, &priv->map->TX_CONF,
|
419 |
|
|
reg | RTL818X_TX_CONF_LOOPBACK_MAC);
|
420 |
|
|
msleep(10);
|
421 |
|
|
rtl8225_rf_set_channel(dev, channel);
|
422 |
|
|
msleep(10);
|
423 |
|
|
rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
|
424 |
|
|
}
|
425 |
|
|
|
426 |
|
|
static int rtl8187_start(struct ieee80211_hw *dev)
|
427 |
|
|
{
|
428 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
429 |
|
|
u32 reg;
|
430 |
|
|
int ret;
|
431 |
|
|
|
432 |
|
|
ret = rtl8187_init_hw(dev);
|
433 |
|
|
if (ret)
|
434 |
|
|
return ret;
|
435 |
|
|
|
436 |
|
|
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
|
437 |
|
|
|
438 |
|
|
rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
|
439 |
|
|
rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
|
440 |
|
|
|
441 |
|
|
rtl8187_init_urbs(dev);
|
442 |
|
|
|
443 |
|
|
reg = RTL818X_RX_CONF_ONLYERLPKT |
|
444 |
|
|
RTL818X_RX_CONF_RX_AUTORESETPHY |
|
445 |
|
|
RTL818X_RX_CONF_BSSID |
|
446 |
|
|
RTL818X_RX_CONF_MGMT |
|
447 |
|
|
RTL818X_RX_CONF_DATA |
|
448 |
|
|
(7 << 13 /* RX FIFO threshold NONE */) |
|
449 |
|
|
(7 << 10 /* MAX RX DMA */) |
|
450 |
|
|
RTL818X_RX_CONF_BROADCAST |
|
451 |
|
|
RTL818X_RX_CONF_NICMAC;
|
452 |
|
|
|
453 |
|
|
priv->rx_conf = reg;
|
454 |
|
|
rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
|
455 |
|
|
|
456 |
|
|
reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
|
457 |
|
|
reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
|
458 |
|
|
reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
|
459 |
|
|
rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
|
460 |
|
|
|
461 |
|
|
reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
|
462 |
|
|
reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
|
463 |
|
|
reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
|
464 |
|
|
reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
|
465 |
|
|
rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
|
466 |
|
|
|
467 |
|
|
reg = RTL818X_TX_CONF_CW_MIN |
|
468 |
|
|
(7 << 21 /* MAX TX DMA */) |
|
469 |
|
|
RTL818X_TX_CONF_NO_ICV;
|
470 |
|
|
rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
|
471 |
|
|
|
472 |
|
|
reg = rtl818x_ioread8(priv, &priv->map->CMD);
|
473 |
|
|
reg |= RTL818X_CMD_TX_ENABLE;
|
474 |
|
|
reg |= RTL818X_CMD_RX_ENABLE;
|
475 |
|
|
rtl818x_iowrite8(priv, &priv->map->CMD, reg);
|
476 |
|
|
|
477 |
|
|
return 0;
|
478 |
|
|
}
|
479 |
|
|
|
480 |
|
|
static void rtl8187_stop(struct ieee80211_hw *dev)
|
481 |
|
|
{
|
482 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
483 |
|
|
struct rtl8187_rx_info *info;
|
484 |
|
|
struct sk_buff *skb;
|
485 |
|
|
u32 reg;
|
486 |
|
|
|
487 |
|
|
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
|
488 |
|
|
|
489 |
|
|
reg = rtl818x_ioread8(priv, &priv->map->CMD);
|
490 |
|
|
reg &= ~RTL818X_CMD_TX_ENABLE;
|
491 |
|
|
reg &= ~RTL818X_CMD_RX_ENABLE;
|
492 |
|
|
rtl818x_iowrite8(priv, &priv->map->CMD, reg);
|
493 |
|
|
|
494 |
|
|
rtl8225_rf_stop(dev);
|
495 |
|
|
|
496 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
|
497 |
|
|
reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
|
498 |
|
|
rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
|
499 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
|
500 |
|
|
|
501 |
|
|
while ((skb = skb_dequeue(&priv->rx_queue))) {
|
502 |
|
|
info = (struct rtl8187_rx_info *)skb->cb;
|
503 |
|
|
usb_kill_urb(info->urb);
|
504 |
|
|
kfree_skb(skb);
|
505 |
|
|
}
|
506 |
|
|
return;
|
507 |
|
|
}
|
508 |
|
|
|
509 |
|
|
static int rtl8187_add_interface(struct ieee80211_hw *dev,
|
510 |
|
|
struct ieee80211_if_init_conf *conf)
|
511 |
|
|
{
|
512 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
513 |
|
|
int i;
|
514 |
|
|
|
515 |
|
|
if (priv->mode != IEEE80211_IF_TYPE_MNTR)
|
516 |
|
|
return -EOPNOTSUPP;
|
517 |
|
|
|
518 |
|
|
switch (conf->type) {
|
519 |
|
|
case IEEE80211_IF_TYPE_STA:
|
520 |
|
|
priv->mode = conf->type;
|
521 |
|
|
break;
|
522 |
|
|
default:
|
523 |
|
|
return -EOPNOTSUPP;
|
524 |
|
|
}
|
525 |
|
|
|
526 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
|
527 |
|
|
for (i = 0; i < ETH_ALEN; i++)
|
528 |
|
|
rtl818x_iowrite8(priv, &priv->map->MAC[i],
|
529 |
|
|
((u8 *)conf->mac_addr)[i]);
|
530 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
|
531 |
|
|
|
532 |
|
|
return 0;
|
533 |
|
|
}
|
534 |
|
|
|
535 |
|
|
static void rtl8187_remove_interface(struct ieee80211_hw *dev,
|
536 |
|
|
struct ieee80211_if_init_conf *conf)
|
537 |
|
|
{
|
538 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
539 |
|
|
priv->mode = IEEE80211_IF_TYPE_MNTR;
|
540 |
|
|
}
|
541 |
|
|
|
542 |
|
|
static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
|
543 |
|
|
{
|
544 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
545 |
|
|
rtl8187_set_channel(dev, conf->channel);
|
546 |
|
|
|
547 |
|
|
rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
|
548 |
|
|
|
549 |
|
|
if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
|
550 |
|
|
rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
|
551 |
|
|
rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
|
552 |
|
|
rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
|
553 |
|
|
rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
|
554 |
|
|
} else {
|
555 |
|
|
rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
|
556 |
|
|
rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
|
557 |
|
|
rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
|
558 |
|
|
rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
|
559 |
|
|
}
|
560 |
|
|
|
561 |
|
|
rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
|
562 |
|
|
rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
|
563 |
|
|
rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
|
564 |
|
|
rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
|
565 |
|
|
return 0;
|
566 |
|
|
}
|
567 |
|
|
|
568 |
|
|
static int rtl8187_config_interface(struct ieee80211_hw *dev, int if_id,
|
569 |
|
|
struct ieee80211_if_conf *conf)
|
570 |
|
|
{
|
571 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
572 |
|
|
int i;
|
573 |
|
|
|
574 |
|
|
priv->if_id = if_id;
|
575 |
|
|
|
576 |
|
|
for (i = 0; i < ETH_ALEN; i++)
|
577 |
|
|
rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
|
578 |
|
|
|
579 |
|
|
if (is_valid_ether_addr(conf->bssid))
|
580 |
|
|
rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
|
581 |
|
|
else
|
582 |
|
|
rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
|
583 |
|
|
|
584 |
|
|
return 0;
|
585 |
|
|
}
|
586 |
|
|
|
587 |
|
|
static void rtl8187_configure_filter(struct ieee80211_hw *dev,
|
588 |
|
|
unsigned int changed_flags,
|
589 |
|
|
unsigned int *total_flags,
|
590 |
|
|
int mc_count, struct dev_addr_list *mclist)
|
591 |
|
|
{
|
592 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
593 |
|
|
|
594 |
|
|
if (changed_flags & FIF_FCSFAIL)
|
595 |
|
|
priv->rx_conf ^= RTL818X_RX_CONF_FCS;
|
596 |
|
|
if (changed_flags & FIF_CONTROL)
|
597 |
|
|
priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
|
598 |
|
|
if (changed_flags & FIF_OTHER_BSS)
|
599 |
|
|
priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
|
600 |
|
|
if (*total_flags & FIF_ALLMULTI || mc_count > 0)
|
601 |
|
|
priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
|
602 |
|
|
else
|
603 |
|
|
priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
|
604 |
|
|
|
605 |
|
|
*total_flags = 0;
|
606 |
|
|
|
607 |
|
|
if (priv->rx_conf & RTL818X_RX_CONF_FCS)
|
608 |
|
|
*total_flags |= FIF_FCSFAIL;
|
609 |
|
|
if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
|
610 |
|
|
*total_flags |= FIF_CONTROL;
|
611 |
|
|
if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
|
612 |
|
|
*total_flags |= FIF_OTHER_BSS;
|
613 |
|
|
if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
|
614 |
|
|
*total_flags |= FIF_ALLMULTI;
|
615 |
|
|
|
616 |
|
|
rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
|
617 |
|
|
}
|
618 |
|
|
|
619 |
|
|
static const struct ieee80211_ops rtl8187_ops = {
|
620 |
|
|
.tx = rtl8187_tx,
|
621 |
|
|
.start = rtl8187_start,
|
622 |
|
|
.stop = rtl8187_stop,
|
623 |
|
|
.add_interface = rtl8187_add_interface,
|
624 |
|
|
.remove_interface = rtl8187_remove_interface,
|
625 |
|
|
.config = rtl8187_config,
|
626 |
|
|
.config_interface = rtl8187_config_interface,
|
627 |
|
|
.configure_filter = rtl8187_configure_filter,
|
628 |
|
|
};
|
629 |
|
|
|
630 |
|
|
static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
|
631 |
|
|
{
|
632 |
|
|
struct ieee80211_hw *dev = eeprom->data;
|
633 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
634 |
|
|
u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
|
635 |
|
|
|
636 |
|
|
eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
|
637 |
|
|
eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
|
638 |
|
|
eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
|
639 |
|
|
eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
|
640 |
|
|
}
|
641 |
|
|
|
642 |
|
|
static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
|
643 |
|
|
{
|
644 |
|
|
struct ieee80211_hw *dev = eeprom->data;
|
645 |
|
|
struct rtl8187_priv *priv = dev->priv;
|
646 |
|
|
u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
|
647 |
|
|
|
648 |
|
|
if (eeprom->reg_data_in)
|
649 |
|
|
reg |= RTL818X_EEPROM_CMD_WRITE;
|
650 |
|
|
if (eeprom->reg_data_out)
|
651 |
|
|
reg |= RTL818X_EEPROM_CMD_READ;
|
652 |
|
|
if (eeprom->reg_data_clock)
|
653 |
|
|
reg |= RTL818X_EEPROM_CMD_CK;
|
654 |
|
|
if (eeprom->reg_chip_select)
|
655 |
|
|
reg |= RTL818X_EEPROM_CMD_CS;
|
656 |
|
|
|
657 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
|
658 |
|
|
udelay(10);
|
659 |
|
|
}
|
660 |
|
|
|
661 |
|
|
static int __devinit rtl8187_probe(struct usb_interface *intf,
|
662 |
|
|
const struct usb_device_id *id)
|
663 |
|
|
{
|
664 |
|
|
struct usb_device *udev = interface_to_usbdev(intf);
|
665 |
|
|
struct ieee80211_hw *dev;
|
666 |
|
|
struct rtl8187_priv *priv;
|
667 |
|
|
struct eeprom_93cx6 eeprom;
|
668 |
|
|
struct ieee80211_channel *channel;
|
669 |
|
|
u16 txpwr, reg;
|
670 |
|
|
int err, i;
|
671 |
|
|
DECLARE_MAC_BUF(mac);
|
672 |
|
|
|
673 |
|
|
dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
|
674 |
|
|
if (!dev) {
|
675 |
|
|
printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
|
676 |
|
|
return -ENOMEM;
|
677 |
|
|
}
|
678 |
|
|
|
679 |
|
|
priv = dev->priv;
|
680 |
|
|
|
681 |
|
|
SET_IEEE80211_DEV(dev, &intf->dev);
|
682 |
|
|
usb_set_intfdata(intf, dev);
|
683 |
|
|
priv->udev = udev;
|
684 |
|
|
|
685 |
|
|
usb_get_dev(udev);
|
686 |
|
|
|
687 |
|
|
skb_queue_head_init(&priv->rx_queue);
|
688 |
|
|
memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
|
689 |
|
|
memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
|
690 |
|
|
priv->map = (struct rtl818x_csr *)0xFF00;
|
691 |
|
|
priv->modes[0].mode = MODE_IEEE80211G;
|
692 |
|
|
priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates);
|
693 |
|
|
priv->modes[0].rates = priv->rates;
|
694 |
|
|
priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels);
|
695 |
|
|
priv->modes[0].channels = priv->channels;
|
696 |
|
|
priv->modes[1].mode = MODE_IEEE80211B;
|
697 |
|
|
priv->modes[1].num_rates = 4;
|
698 |
|
|
priv->modes[1].rates = priv->rates;
|
699 |
|
|
priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels);
|
700 |
|
|
priv->modes[1].channels = priv->channels;
|
701 |
|
|
priv->mode = IEEE80211_IF_TYPE_MNTR;
|
702 |
|
|
dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
|
703 |
|
|
IEEE80211_HW_RX_INCLUDES_FCS;
|
704 |
|
|
dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
|
705 |
|
|
dev->queues = 1;
|
706 |
|
|
dev->max_rssi = 65;
|
707 |
|
|
dev->max_signal = 64;
|
708 |
|
|
|
709 |
|
|
for (i = 0; i < 2; i++)
|
710 |
|
|
if ((err = ieee80211_register_hwmode(dev, &priv->modes[i])))
|
711 |
|
|
goto err_free_dev;
|
712 |
|
|
|
713 |
|
|
eeprom.data = dev;
|
714 |
|
|
eeprom.register_read = rtl8187_eeprom_register_read;
|
715 |
|
|
eeprom.register_write = rtl8187_eeprom_register_write;
|
716 |
|
|
if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
|
717 |
|
|
eeprom.width = PCI_EEPROM_WIDTH_93C66;
|
718 |
|
|
else
|
719 |
|
|
eeprom.width = PCI_EEPROM_WIDTH_93C46;
|
720 |
|
|
|
721 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
|
722 |
|
|
udelay(10);
|
723 |
|
|
|
724 |
|
|
eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
|
725 |
|
|
(__le16 __force *)dev->wiphy->perm_addr, 3);
|
726 |
|
|
if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
|
727 |
|
|
printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
|
728 |
|
|
"generated MAC address\n");
|
729 |
|
|
random_ether_addr(dev->wiphy->perm_addr);
|
730 |
|
|
}
|
731 |
|
|
|
732 |
|
|
channel = priv->channels;
|
733 |
|
|
for (i = 0; i < 3; i++) {
|
734 |
|
|
eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
|
735 |
|
|
&txpwr);
|
736 |
|
|
(*channel++).val = txpwr & 0xFF;
|
737 |
|
|
(*channel++).val = txpwr >> 8;
|
738 |
|
|
}
|
739 |
|
|
for (i = 0; i < 2; i++) {
|
740 |
|
|
eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
|
741 |
|
|
&txpwr);
|
742 |
|
|
(*channel++).val = txpwr & 0xFF;
|
743 |
|
|
(*channel++).val = txpwr >> 8;
|
744 |
|
|
}
|
745 |
|
|
for (i = 0; i < 2; i++) {
|
746 |
|
|
eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
|
747 |
|
|
&txpwr);
|
748 |
|
|
(*channel++).val = txpwr & 0xFF;
|
749 |
|
|
(*channel++).val = txpwr >> 8;
|
750 |
|
|
}
|
751 |
|
|
|
752 |
|
|
eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
|
753 |
|
|
&priv->txpwr_base);
|
754 |
|
|
|
755 |
|
|
reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & ~1;
|
756 |
|
|
rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 1);
|
757 |
|
|
/* 0 means asic B-cut, we should use SW 3 wire
|
758 |
|
|
* bit-by-bit banging for radio. 1 means we can use
|
759 |
|
|
* USB specific request to write radio registers */
|
760 |
|
|
priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
|
761 |
|
|
rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg);
|
762 |
|
|
rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
|
763 |
|
|
|
764 |
|
|
rtl8225_write(dev, 0, 0x1B7);
|
765 |
|
|
|
766 |
|
|
if (rtl8225_read(dev, 8) != 0x588 || rtl8225_read(dev, 9) != 0x700)
|
767 |
|
|
priv->rf_init = rtl8225_rf_init;
|
768 |
|
|
else
|
769 |
|
|
priv->rf_init = rtl8225z2_rf_init;
|
770 |
|
|
|
771 |
|
|
rtl8225_write(dev, 0, 0x0B7);
|
772 |
|
|
|
773 |
|
|
err = ieee80211_register_hw(dev);
|
774 |
|
|
if (err) {
|
775 |
|
|
printk(KERN_ERR "rtl8187: Cannot register device\n");
|
776 |
|
|
goto err_free_dev;
|
777 |
|
|
}
|
778 |
|
|
|
779 |
|
|
printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
|
780 |
|
|
wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
|
781 |
|
|
priv->asic_rev, priv->rf_init == rtl8225_rf_init ?
|
782 |
|
|
"rtl8225" : "rtl8225z2");
|
783 |
|
|
|
784 |
|
|
return 0;
|
785 |
|
|
|
786 |
|
|
err_free_dev:
|
787 |
|
|
ieee80211_free_hw(dev);
|
788 |
|
|
usb_set_intfdata(intf, NULL);
|
789 |
|
|
usb_put_dev(udev);
|
790 |
|
|
return err;
|
791 |
|
|
}
|
792 |
|
|
|
793 |
|
|
static void __devexit rtl8187_disconnect(struct usb_interface *intf)
|
794 |
|
|
{
|
795 |
|
|
struct ieee80211_hw *dev = usb_get_intfdata(intf);
|
796 |
|
|
struct rtl8187_priv *priv;
|
797 |
|
|
|
798 |
|
|
if (!dev)
|
799 |
|
|
return;
|
800 |
|
|
|
801 |
|
|
ieee80211_unregister_hw(dev);
|
802 |
|
|
|
803 |
|
|
priv = dev->priv;
|
804 |
|
|
usb_put_dev(interface_to_usbdev(intf));
|
805 |
|
|
ieee80211_free_hw(dev);
|
806 |
|
|
}
|
807 |
|
|
|
808 |
|
|
static struct usb_driver rtl8187_driver = {
|
809 |
|
|
.name = KBUILD_MODNAME,
|
810 |
|
|
.id_table = rtl8187_table,
|
811 |
|
|
.probe = rtl8187_probe,
|
812 |
|
|
.disconnect = rtl8187_disconnect,
|
813 |
|
|
};
|
814 |
|
|
|
815 |
|
|
static int __init rtl8187_init(void)
|
816 |
|
|
{
|
817 |
|
|
return usb_register(&rtl8187_driver);
|
818 |
|
|
}
|
819 |
|
|
|
820 |
|
|
static void __exit rtl8187_exit(void)
|
821 |
|
|
{
|
822 |
|
|
usb_deregister(&rtl8187_driver);
|
823 |
|
|
}
|
824 |
|
|
|
825 |
|
|
module_init(rtl8187_init);
|
826 |
|
|
module_exit(rtl8187_exit);
|