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/*

 *      pci.h

 *

 *      PCI defines and function prototypes

 *      Copyright 1994, Drew Eckhardt

 *      Copyright 1997--1999 Martin Mares <mj@ucw.cz>

 *

 *      For more information, please consult the following manuals (look at

 *      http://www.pcisig.com/ for how to get them):

 *

 *      PCI BIOS Specification

 *      PCI Local Bus Specification

 *      PCI to PCI Bridge Specification

 *      PCI System Design Guide

 */

#ifndef LINUX_PCI_H

#define LINUX_PCI_H

/* Include the pci register defines */

#include <linux/pci_regs.h>

/*

 * The PCI interface treats multi-function devices as independent

 * devices.  The slot/function address of each device is encoded

 * in a single byte as follows:

 *

 *      7:3 = slot

 *      2:0 = function

 */

#define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))

#define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)

#define PCI_FUNC(devfn)         ((devfn) & 0x07)

/* Ioctls for /proc/bus/pci/X/Y nodes. */

#define PCIIOC_BASE             ('P' << 24 | 'C' << 16 | 'I' << 8)

#define PCIIOC_CONTROLLER       (PCIIOC_BASE | 0x00)    /* Get controller for PCI device. */

#define PCIIOC_MMAP_IS_IO       (PCIIOC_BASE | 0x01)    /* Set mmap state to I/O space. */

#define PCIIOC_MMAP_IS_MEM      (PCIIOC_BASE | 0x02)    /* Set mmap state to MEM space. */

#define PCIIOC_WRITE_COMBINE    (PCIIOC_BASE | 0x03)    /* Enable/disable write-combining. */

#ifdef __KERNEL__

#include <linux/mod_devicetable.h>

#include <linux/types.h>

#include <linux/ioport.h>

#include <linux/list.h>

#include <linux/compiler.h>

#include <linux/errno.h>

#include <asm/atomic.h>

#include <linux/device.h>

/* Include the ID list */

#include <linux/pci_ids.h>

/* File state for mmap()s on /proc/bus/pci/X/Y */

enum pci_mmap_state {

        pci_mmap_io,

        pci_mmap_mem

};

/* This defines the direction arg to the DMA mapping routines. */

#define PCI_DMA_BIDIRECTIONAL   0

#define PCI_DMA_TODEVICE        1

#define PCI_DMA_FROMDEVICE      2

#define PCI_DMA_NONE            3

#define DEVICE_COUNT_COMPATIBLE 4

#define DEVICE_COUNT_RESOURCE   12

typedef int __bitwise pci_power_t;

#define PCI_D0          ((pci_power_t __force) 0)

#define PCI_D1          ((pci_power_t __force) 1)

#define PCI_D2          ((pci_power_t __force) 2)

#define PCI_D3hot       ((pci_power_t __force) 3)

#define PCI_D3cold      ((pci_power_t __force) 4)

#define PCI_UNKNOWN     ((pci_power_t __force) 5)

#define PCI_POWER_ERROR ((pci_power_t __force) -1)

/** The pci_channel state describes connectivity between the CPU and

 *  the pci device.  If some PCI bus between here and the pci device

 *  has crashed or locked up, this info is reflected here.

 */

typedef unsigned int __bitwise pci_channel_state_t;

enum pci_channel_state {

        /* I/O channel is in normal state */

        pci_channel_io_normal = (__force pci_channel_state_t) 1,

        /* I/O to channel is blocked */

        pci_channel_io_frozen = (__force pci_channel_state_t) 2,

        /* PCI card is dead */

        pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,

};

typedef unsigned int __bitwise pcie_reset_state_t;

enum pcie_reset_state {

        /* Reset is NOT asserted (Use to deassert reset) */

        pcie_deassert_reset = (__force pcie_reset_state_t) 1,

        /* Use #PERST to reset PCI-E device */

        pcie_warm_reset = (__force pcie_reset_state_t) 2,

        /* Use PCI-E Hot Reset to reset device */

        pcie_hot_reset = (__force pcie_reset_state_t) 3

};

typedef unsigned short __bitwise pci_dev_flags_t;

enum pci_dev_flags {

        /* INTX_DISABLE in PCI_COMMAND register disables MSI

         * generation too.

         */

        PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,

};

typedef unsigned short __bitwise pci_bus_flags_t;

enum pci_bus_flags {

        PCI_BUS_FLAGS_NO_MSI   = (__force pci_bus_flags_t) 1,

        PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,

};

struct pci_cap_saved_state {

        struct hlist_node next;

        char cap_nr;

        u32 data[0];

};

/*

 * The pci_dev structure is used to describe PCI devices.

 */

struct pci_dev {

        struct list_head global_list;   /* node in list of all PCI devices */

        struct list_head bus_list;      /* node in per-bus list */

        struct pci_bus  *bus;           /* bus this device is on */

        struct pci_bus  *subordinate;   /* bus this device bridges to */

        void            *sysdata;       /* hook for sys-specific extension */

        struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */

        unsigned int    devfn;          /* encoded device & function index */

        unsigned short  vendor;

        unsigned short  device;

        unsigned short  subsystem_vendor;

        unsigned short  subsystem_device;

        unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */

        u8              revision;       /* PCI revision, low byte of class word */

        u8              hdr_type;       /* PCI header type (`multi' flag masked out) */

        u8              pcie_type;      /* PCI-E device/port type */

        u8              rom_base_reg;   /* which config register controls the ROM */

        u8              pin;            /* which interrupt pin this device uses */

        struct pci_driver *driver;      /* which driver has allocated this device */

        u64             dma_mask;       /* Mask of the bits of bus address this

                                           device implements.  Normally this is

                                           0xffffffff.  You only need to change

                                           this if your device has broken DMA

                                           or supports 64-bit transfers.  */

        pci_power_t     current_state;  /* Current operating state. In ACPI-speak,

                                           this is D0-D3, D0 being fully functional,

                                           and D3 being off. */

        pci_channel_state_t error_state;        /* current connectivity state */

        struct  device  dev;            /* Generic device interface */

        /* device is compatible with these IDs */

        unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];

        unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];

        int             cfg_size;       /* Size of configuration space */

        /*

         * Instead of touching interrupt line and base address registers

         * directly, use the values stored here. They might be different!

         */

        unsigned int    irq;

        struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */

        /* These fields are used by common fixups */

        unsigned int    transparent:1;  /* Transparent PCI bridge */

        unsigned int    multifunction:1;/* Part of multi-function device */

        /* keep track of device state */

        unsigned int    is_busmaster:1; /* device is busmaster */

        unsigned int    no_msi:1;       /* device may not use msi */

        unsigned int    no_d1d2:1;   /* only allow d0 or d3 */

        unsigned int    block_ucfg_access:1;    /* userspace config space access is blocked */

        unsigned int    broken_parity_status:1; /* Device generates false positive parity */

        unsigned int    msi_enabled:1;

        unsigned int    msix_enabled:1;

        unsigned int    is_managed:1;

        unsigned int    is_pcie:1;

        pci_dev_flags_t dev_flags;

        atomic_t        enable_cnt;     /* pci_enable_device has been called */

        u32             saved_config_space[16]; /* config space saved at suspend time */

        struct hlist_head saved_cap_space;

        struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */

        int rom_attr_enabled;           /* has display of the rom attribute been enabled? */

        struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */

#ifdef CONFIG_PCI_MSI

        struct list_head msi_list;

#endif

};

extern struct pci_dev *alloc_pci_dev(void);

#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)

#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)

#define to_pci_dev(n) container_of(n, struct pci_dev, dev)

#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)

static inline int pci_channel_offline(struct pci_dev *pdev)

{

        return (pdev->error_state != pci_channel_io_normal);

}

static inline struct pci_cap_saved_state *pci_find_saved_cap(

        struct pci_dev *pci_dev,char cap)

{

        struct pci_cap_saved_state *tmp;

        struct hlist_node *pos;

        hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {

                if (tmp->cap_nr == cap)

                        return tmp;

        }

        return NULL;

}

static inline void pci_add_saved_cap(struct pci_dev *pci_dev,

        struct pci_cap_saved_state *new_cap)

{

        hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);

}

/*

 *  For PCI devices, the region numbers are assigned this way:

 *

 *      0-5     standard PCI regions

 *      6       expansion ROM

 *      7-10    bridges: address space assigned to buses behind the bridge

 */

#define PCI_ROM_RESOURCE        6

#define PCI_BRIDGE_RESOURCES    7

#define PCI_NUM_RESOURCES       11

#ifndef PCI_BUS_NUM_RESOURCES

#define PCI_BUS_NUM_RESOURCES   8

#endif

#define PCI_REGION_FLAG_MASK    0x0fU   /* These bits of resource flags tell us the PCI region flags */

struct pci_bus {

        struct list_head node;          /* node in list of buses */

        struct pci_bus  *parent;        /* parent bus this bridge is on */

        struct list_head children;      /* list of child buses */

        struct list_head devices;       /* list of devices on this bus */

        struct pci_dev  *self;          /* bridge device as seen by parent */

        struct resource *resource[PCI_BUS_NUM_RESOURCES];

                                        /* address space routed to this bus */

        struct pci_ops  *ops;           /* configuration access functions */

        void            *sysdata;       /* hook for sys-specific extension */

        struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */

        unsigned char   number;         /* bus number */

        unsigned char   primary;        /* number of primary bridge */

        unsigned char   secondary;      /* number of secondary bridge */

        unsigned char   subordinate;    /* max number of subordinate buses */

        char            name[48];

        unsigned short  bridge_ctl;     /* manage NO_ISA/FBB/et al behaviors */

        pci_bus_flags_t bus_flags;      /* Inherited by child busses */

        struct device           *bridge;

        struct class_device     class_dev;

        struct bin_attribute    *legacy_io; /* legacy I/O for this bus */

        struct bin_attribute    *legacy_mem; /* legacy mem */

};

#define pci_bus_b(n)    list_entry(n, struct pci_bus, node)

#define to_pci_bus(n)   container_of(n, struct pci_bus, class_dev)

/*

 * Error values that may be returned by PCI functions.

 */

#define PCIBIOS_SUCCESSFUL              0x00

#define PCIBIOS_FUNC_NOT_SUPPORTED      0x81

#define PCIBIOS_BAD_VENDOR_ID           0x83

#define PCIBIOS_DEVICE_NOT_FOUND        0x86

#define PCIBIOS_BAD_REGISTER_NUMBER     0x87

#define PCIBIOS_SET_FAILED              0x88

#define PCIBIOS_BUFFER_TOO_SMALL        0x89

/* Low-level architecture-dependent routines */

struct pci_ops {

        int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);

        int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);

};

struct pci_raw_ops {

        int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,

                    int reg, int len, u32 *val);

        int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,

                     int reg, int len, u32 val);

};

extern struct pci_raw_ops *raw_pci_ops;

struct pci_bus_region {

        unsigned long start;

        unsigned long end;

};

struct pci_dynids {

        spinlock_t lock;            /* protects list, index */

        struct list_head list;      /* for IDs added at runtime */

        unsigned int use_driver_data:1; /* pci_driver->driver_data is used */

};

/* ---------------------------------------------------------------- */

/** PCI Error Recovery System (PCI-ERS).  If a PCI device driver provides

 *  a set of callbacks in struct pci_error_handlers, then that device driver

 *  will be notified of PCI bus errors, and will be driven to recovery

 *  when an error occurs.

 */

typedef unsigned int __bitwise pci_ers_result_t;

enum pci_ers_result {

        /* no result/none/not supported in device driver */

        PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,

        /* Device driver can recover without slot reset */

        PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,

        /* Device driver wants slot to be reset. */

        PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,

        /* Device has completely failed, is unrecoverable */

        PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,

        /* Device driver is fully recovered and operational */

        PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,

};

/* PCI bus error event callbacks */

struct pci_error_handlers

{

        /* PCI bus error detected on this device */

        pci_ers_result_t (*error_detected)(struct pci_dev *dev,

                              enum pci_channel_state error);

        /* MMIO has been re-enabled, but not DMA */

        pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);

        /* PCI Express link has been reset */

        pci_ers_result_t (*link_reset)(struct pci_dev *dev);

        /* PCI slot has been reset */

        pci_ers_result_t (*slot_reset)(struct pci_dev *dev);

        /* Device driver may resume normal operations */

        void (*resume)(struct pci_dev *dev);

};

/* ---------------------------------------------------------------- */

struct module;

struct pci_driver {

        struct list_head node;

        char *name;

        const struct pci_device_id *id_table;   /* must be non-NULL for probe to be called */

        int  (*probe)  (struct pci_dev *dev, const struct pci_device_id *id);   /* New device inserted */

        void (*remove) (struct pci_dev *dev);   /* Device removed (NULL if not a hot-plug capable driver) */

        int  (*suspend) (struct pci_dev *dev, pm_message_t state);      /* Device suspended */

        int  (*suspend_late) (struct pci_dev *dev, pm_message_t state);

        int  (*resume_early) (struct pci_dev *dev);

        int  (*resume) (struct pci_dev *dev);                   /* Device woken up */

        void (*shutdown) (struct pci_dev *dev);

        struct pci_error_handlers *err_handler;

        struct device_driver    driver;

        struct pci_dynids dynids;

};

#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)

/**

 * PCI_DEVICE - macro used to describe a specific pci device

 * @vend: the 16 bit PCI Vendor ID

 * @dev: the 16 bit PCI Device ID

 *

 * This macro is used to create a struct pci_device_id that matches a

 * specific device.  The subvendor and subdevice fields will be set to

 * PCI_ANY_ID.

 */

#define PCI_DEVICE(vend,dev) \

        .vendor = (vend), .device = (dev), \

        .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID

/**

 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class

 * @dev_class: the class, subclass, prog-if triple for this device

 * @dev_class_mask: the class mask for this device

 *

 * This macro is used to create a struct pci_device_id that matches a

 * specific PCI class.  The vendor, device, subvendor, and subdevice

 * fields will be set to PCI_ANY_ID.

 */

#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \

        .class = (dev_class), .class_mask = (dev_class_mask), \

        .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \

        .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID

/**

 * PCI_VDEVICE - macro used to describe a specific pci device in short form

 * @vend: the vendor name

 * @dev: the 16 bit PCI Device ID

 *

 * This macro is used to create a struct pci_device_id that matches a

 * specific PCI device.  The subvendor, and subdevice fields will be set

 * to PCI_ANY_ID. The macro allows the next field to follow as the device

 * private data.

 */

#define PCI_VDEVICE(vendor, device)             \

        PCI_VENDOR_ID_##vendor, (device),       \

        PCI_ANY_ID, PCI_ANY_ID, 0, 0

/* these external functions are only available when PCI support is enabled */

#ifdef CONFIG_PCI

extern struct bus_type pci_bus_type;

/* Do NOT directly access these two variables, unless you are arch specific pci

 * code, or pci core code. */

extern struct list_head pci_root_buses; /* list of all known PCI buses */

extern struct list_head pci_devices;    /* list of all devices */

/* Some device drivers need know if pci is initiated */

extern int no_pci_devices(void);

void pcibios_fixup_bus(struct pci_bus *);

int __must_check pcibios_enable_device(struct pci_dev *, int mask);

char *pcibios_setup (char *str);

/* Used only when drivers/pci/setup.c is used */

void pcibios_align_resource(void *, struct resource *, resource_size_t,

                                resource_size_t);

void pcibios_update_irq(struct pci_dev *, int irq);

/* Generic PCI functions used internally */

extern struct pci_bus *pci_find_bus(int domain, int busnr);

void pci_bus_add_devices(struct pci_bus *bus);

struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);

static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)

{

        struct pci_bus *root_bus;

        root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);

        if (root_bus)

                pci_bus_add_devices(root_bus);

        return root_bus;

}

struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);

struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);

int pci_scan_slot(struct pci_bus *bus, int devfn);

struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);

void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);

unsigned int pci_scan_child_bus(struct pci_bus *bus);

int __must_check pci_bus_add_device(struct pci_dev *dev);

void pci_read_bridge_bases(struct pci_bus *child);

struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);

int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);

extern struct pci_dev *pci_dev_get(struct pci_dev *dev);

extern void pci_dev_put(struct pci_dev *dev);

extern void pci_remove_bus(struct pci_bus *b);

extern void pci_remove_bus_device(struct pci_dev *dev);

extern void pci_stop_bus_device(struct pci_dev *dev);

void pci_setup_cardbus(struct pci_bus *bus);

extern void pci_sort_breadthfirst(void);

/* Generic PCI functions exported to card drivers */

#ifdef CONFIG_PCI_LEGACY

struct pci_dev __deprecated *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);

struct pci_dev __deprecated *pci_find_slot (unsigned int bus, unsigned int devfn);

#endif /* CONFIG_PCI_LEGACY */

int pci_find_capability (struct pci_dev *dev, int cap);

int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);

int pci_find_ext_capability (struct pci_dev *dev, int cap);

int pci_find_ht_capability (struct pci_dev *dev, int ht_cap);

int pci_find_next_ht_capability (struct pci_dev *dev, int pos, int ht_cap);

struct pci_bus *pci_find_next_bus(const struct pci_bus *from);

struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,

                                struct pci_dev *from);

struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,

                                struct pci_dev *from);

struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,

                                unsigned int ss_vendor, unsigned int ss_device,

                                struct pci_dev *from);

struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);

struct pci_dev *pci_get_bus_and_slot (unsigned int bus, unsigned int devfn);

struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);

int pci_dev_present(const struct pci_device_id *ids);

const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);

int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);

int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);

int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);

int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);

int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);

int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);

static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)

{

        return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);

}

static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)

{

        return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);

}

static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)

{

        return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);

}

static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)

{

        return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);

}

static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)

{

        return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);

}

static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)

{

        return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);

}

int __must_check pci_enable_device(struct pci_dev *dev);

int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask);

int __must_check pci_reenable_device(struct pci_dev *);

int __must_check pcim_enable_device(struct pci_dev *pdev);

void pcim_pin_device(struct pci_dev *pdev);

static inline int pci_is_managed(struct pci_dev *pdev)

{

        return pdev->is_managed;

}

void pci_disable_device(struct pci_dev *dev);

void pci_set_master(struct pci_dev *dev);

int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);

#define HAVE_PCI_SET_MWI

int __must_check pci_set_mwi(struct pci_dev *dev);

int pci_try_set_mwi(struct pci_dev *dev);

void pci_clear_mwi(struct pci_dev *dev);

void pci_intx(struct pci_dev *dev, int enable);

void pci_msi_off(struct pci_dev *dev);

int pci_set_dma_mask(struct pci_dev *dev, u64 mask);

int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);

int pcix_get_max_mmrbc(struct pci_dev *dev);

int pcix_get_mmrbc(struct pci_dev *dev);

int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);

int pcie_get_readrq(struct pci_dev *dev);

int pcie_set_readrq(struct pci_dev *dev, int rq);

void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);

int __must_check pci_assign_resource(struct pci_dev *dev, int i);

int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);

void pci_restore_bars(struct pci_dev *dev);

int pci_select_bars(struct pci_dev *dev, unsigned long flags);

/* ROM control related routines */

void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);

void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);

void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);

void pci_remove_rom(struct pci_dev *pdev);

size_t pci_get_rom_size(void __iomem *rom, size_t size);

/* Power management related routines */

int pci_save_state(struct pci_dev *dev);

int pci_restore_state(struct pci_dev *dev);

int pci_set_power_state(struct pci_dev *dev, pci_power_t state);

pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);

int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);

/* Functions for PCI Hotplug drivers to use */

int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);

/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */

void pci_bus_assign_resources(struct pci_bus *bus);

void pci_bus_size_bridges(struct pci_bus *bus);

int pci_claim_resource(struct pci_dev *, int);

void pci_assign_unassigned_resources(void);

void pdev_enable_device(struct pci_dev *);

void pdev_sort_resources(struct pci_dev *, struct resource_list *);

void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),

                    int (*)(struct pci_dev *, u8, u8));

#define HAVE_PCI_REQ_REGIONS    2

int __must_check pci_request_regions(struct pci_dev *, const char *);

void pci_release_regions(struct pci_dev *);

int __must_check pci_request_region(struct pci_dev *, int, const char *);

void pci_release_region(struct pci_dev *, int);

int pci_request_selected_regions(struct pci_dev *, int, const char *);

void pci_release_selected_regions(struct pci_dev *, int);

/* drivers/pci/bus.c */

int __must_check pci_bus_alloc_resource(struct pci_bus *bus,

                        struct resource *res, resource_size_t size,

                        resource_size_t align, resource_size_t min,

                        unsigned int type_mask,

                        void (*alignf)(void *, struct resource *,

                                resource_size_t, resource_size_t),

                        void *alignf_data);

void pci_enable_bridges(struct pci_bus *bus);

/* Proper probing supporting hot-pluggable devices */

int __must_check __pci_register_driver(struct pci_driver *, struct module *,

                                       const char *mod_name);

static inline int __must_check pci_register_driver(struct pci_driver *driver)

{

        return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);

}

void pci_unregister_driver(struct pci_driver *);

void pci_remove_behind_bridge(struct pci_dev *);

struct pci_driver *pci_dev_driver(const struct pci_dev *);

const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);

int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);

void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),

                  void *userdata);

int pci_cfg_space_size(struct pci_dev *dev);

unsigned char pci_bus_max_busnr(struct pci_bus* bus);

/* kmem_cache style wrapper around pci_alloc_consistent() */

#include <linux/dmapool.h>