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marcus.erl |
# ==========================================================================
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# Building
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# ==========================================================================
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src := $(obj)
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PHONY := __build
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__build:
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# Init all relevant variables used in kbuild files so
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# 1) they have correct type
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# 2) they do not inherit any value from the environment
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obj-y :=
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obj-m :=
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lib-y :=
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lib-m :=
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always :=
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targets :=
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subdir-y :=
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subdir-m :=
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EXTRA_AFLAGS :=
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EXTRA_CFLAGS :=
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EXTRA_CPPFLAGS :=
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EXTRA_LDFLAGS :=
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asflags-y :=
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ccflags-y :=
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cppflags-y :=
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ldflags-y :=
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# Read .config if it exist, otherwise ignore
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-include include/config/auto.conf
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include scripts/Kbuild.include
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# For backward compatibility check that these variables does not change
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save-cflags := $(CFLAGS)
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# The filename Kbuild has precedence over Makefile
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
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include $(kbuild-file)
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# If the save-* variables changed error out
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ifeq ($(KBUILD_NOPEDANTIC),)
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ifneq ("$(save-cflags)","$(CFLAGS)")
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$(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
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endif
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endif
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include scripts/Makefile.lib
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ifdef host-progs
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ifneq ($(hostprogs-y),$(host-progs))
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$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
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hostprogs-y += $(host-progs)
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endif
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endif
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# Do not include host rules unles needed
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ifneq ($(hostprogs-y)$(hostprogs-m),)
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include scripts/Makefile.host
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endif
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ifneq ($(KBUILD_SRC),)
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# Create output directory if not already present
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_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
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# Create directories for object files if directory does not exist
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# Needed when obj-y := dir/file.o syntax is used
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_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
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endif
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ifndef obj
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$(warning kbuild: Makefile.build is included improperly)
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endif
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# ===========================================================================
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ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
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lib-target := $(obj)/lib.a
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endif
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ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
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builtin-target := $(obj)/built-in.o
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endif
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# We keep a list of all modules in $(MODVERDIR)
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__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
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$(if $(KBUILD_MODULES),$(obj-m)) \
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$(subdir-ym) $(always)
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@:
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# Linus' kernel sanity checking tool
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ifneq ($(KBUILD_CHECKSRC),0)
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ifeq ($(KBUILD_CHECKSRC),2)
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quiet_cmd_force_checksrc = CHECK $<
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cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
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else
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quiet_cmd_checksrc = CHECK $<
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cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
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endif
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endif
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# Compile C sources (.c)
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# ---------------------------------------------------------------------------
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# Default is built-in, unless we know otherwise
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modkern_cflags := $(CFLAGS_KERNEL)
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quiet_modtag := $(empty) $(empty)
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$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
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$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
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$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
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$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
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$(real-objs-m) : quiet_modtag := [M]
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$(real-objs-m:.o=.i) : quiet_modtag := [M]
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$(real-objs-m:.o=.s) : quiet_modtag := [M]
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$(real-objs-m:.o=.lst): quiet_modtag := [M]
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$(obj-m) : quiet_modtag := [M]
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# Default for not multi-part modules
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modname = $(basetarget)
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$(multi-objs-m) : modname = $(modname-multi)
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$(multi-objs-m:.o=.i) : modname = $(modname-multi)
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$(multi-objs-m:.o=.s) : modname = $(modname-multi)
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$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
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$(multi-objs-y) : modname = $(modname-multi)
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$(multi-objs-y:.o=.i) : modname = $(modname-multi)
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$(multi-objs-y:.o=.s) : modname = $(modname-multi)
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$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
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quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
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cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
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$(obj)/%.s: $(src)/%.c FORCE
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$(call if_changed_dep,cc_s_c)
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quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
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cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
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$(obj)/%.i: $(src)/%.c FORCE
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$(call if_changed_dep,cc_i_c)
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quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
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cmd_cc_symtypes_c = \
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$(CPP) -D__GENKSYMS__ $(c_flags) $< \
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| $(GENKSYMS) -T $@ >/dev/null; \
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test -s $@ || rm -f $@
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$(obj)/%.symtypes : $(src)/%.c FORCE
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$(call if_changed_dep,cc_symtypes_c)
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# C (.c) files
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# The C file is compiled and updated dependency information is generated.
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# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
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quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
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ifndef CONFIG_MODVERSIONS
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
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else
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# When module versioning is enabled the following steps are executed:
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# o compile a .tmp_.o from .c
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# o if .tmp_.o doesn't contain a __ksymtab version, i.e. does
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# not export symbols, we just rename .tmp_.o to .o and
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# are done.
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# o otherwise, we calculate symbol versions using the good old
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# genksyms on the preprocessed source and postprocess them in a way
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# that they are usable as a linker script
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# o generate .o from .tmp_.o using the linker to
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# replace the unresolved symbols __crc_exported_symbol with
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# the actual value of the checksum generated by genksyms
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
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cmd_modversions = \
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if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
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$(CPP) -D__GENKSYMS__ $(c_flags) $< \
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| $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
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-T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \
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> $(@D)/.tmp_$(@F:.o=.ver); \
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\
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$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
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-T $(@D)/.tmp_$(@F:.o=.ver); \
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rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
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else \
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mv -f $(@D)/.tmp_$(@F) $@; \
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fi;
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endif
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define rule_cc_o_c
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$(call echo-cmd,checksrc) $(cmd_checksrc) \
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$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
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$(cmd_modversions) \
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scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
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$(dot-target).tmp; \
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rm -f $(depfile); \
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mv -f $(dot-target).tmp $(dot-target).cmd
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endef
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# Built-in and composite module parts
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$(obj)/%.o: $(src)/%.c FORCE
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$(call cmd,force_checksrc)
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$(call if_changed_rule,cc_o_c)
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# Single-part modules are special since we need to mark them in $(MODVERDIR)
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$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
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$(call cmd,force_checksrc)
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$(call if_changed_rule,cc_o_c)
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@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
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quiet_cmd_cc_lst_c = MKLST $@
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cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
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$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
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System.map $(OBJDUMP) > $@
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$(obj)/%.lst: $(src)/%.c FORCE
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$(call if_changed_dep,cc_lst_c)
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# Compile assembler sources (.S)
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# ---------------------------------------------------------------------------
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modkern_aflags := $(AFLAGS_KERNEL)
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$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
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$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
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quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
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cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
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236 |
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$(obj)/%.s: $(src)/%.S FORCE
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$(call if_changed_dep,as_s_S)
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quiet_cmd_as_o_S = AS $(quiet_modtag) $@
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cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
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242 |
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$(obj)/%.o: $(src)/%.S FORCE
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$(call if_changed_dep,as_o_S)
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245 |
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targets += $(real-objs-y) $(real-objs-m) $(lib-y)
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targets += $(extra-y) $(MAKECMDGOALS) $(always)
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247 |
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248 |
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# Linker scripts preprocessor (.lds.S -> .lds)
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# ---------------------------------------------------------------------------
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quiet_cmd_cpp_lds_S = LDS $@
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cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
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252 |
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253 |
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$(obj)/%.lds: $(src)/%.lds.S FORCE
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254 |
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$(call if_changed_dep,cpp_lds_S)
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255 |
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256 |
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# Build the compiled-in targets
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257 |
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# ---------------------------------------------------------------------------
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258 |
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259 |
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# To build objects in subdirs, we need to descend into the directories
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260 |
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$(sort $(subdir-obj-y)): $(subdir-ym) ;
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261 |
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262 |
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#
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# Rule to compile a set of .o files into one .o file
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#
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ifdef builtin-target
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quiet_cmd_link_o_target = LD $@
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267 |
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# If the list of objects to link is empty, just create an empty built-in.o
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cmd_link_o_target = $(if $(strip $(obj-y)),\
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269 |
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$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
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270 |
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rm -f $@; $(AR) rcs $@)
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271 |
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272 |
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$(builtin-target): $(obj-y) FORCE
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273 |
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$(call if_changed,link_o_target)
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274 |
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275 |
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targets += $(builtin-target)
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endif # builtin-target
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277 |
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278 |
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#
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279 |
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# Rule to compile a set of .o files into one .a file
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#
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281 |
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ifdef lib-target
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282 |
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quiet_cmd_link_l_target = AR $@
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283 |
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cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
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284 |
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|
285 |
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$(lib-target): $(lib-y) FORCE
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286 |
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$(call if_changed,link_l_target)
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287 |
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288 |
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targets += $(lib-target)
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289 |
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endif
|
290 |
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291 |
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#
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292 |
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# Rule to link composite objects
|
293 |
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#
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294 |
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# Composite objects are specified in kbuild makefile as follows:
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295 |
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# -objs :=
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296 |
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# or
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297 |
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# -y :=
|
298 |
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link_multi_deps = \
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299 |
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$(filter $(addprefix $(obj)/, \
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300 |
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$($(subst $(obj)/,,$(@:.o=-objs))) \
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301 |
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$($(subst $(obj)/,,$(@:.o=-y)))), $^)
|
302 |
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|
303 |
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quiet_cmd_link_multi-y = LD $@
|
304 |
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cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
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305 |
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|
306 |
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quiet_cmd_link_multi-m = LD [M] $@
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307 |
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cmd_link_multi-m = $(cmd_link_multi-y)
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308 |
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309 |
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# We would rather have a list of rules like
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310 |
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# foo.o: $(foo-objs)
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311 |
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# but that's not so easy, so we rather make all composite objects depend
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312 |
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# on the set of all their parts
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313 |
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$(multi-used-y) : %.o: $(multi-objs-y) FORCE
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314 |
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$(call if_changed,link_multi-y)
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315 |
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316 |
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$(multi-used-m) : %.o: $(multi-objs-m) FORCE
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317 |
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$(call if_changed,link_multi-m)
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318 |
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@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
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319 |
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|
320 |
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targets += $(multi-used-y) $(multi-used-m)
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321 |
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322 |
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323 |
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# Descending
|
324 |
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# ---------------------------------------------------------------------------
|
325 |
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|
326 |
|
|
PHONY += $(subdir-ym)
|
327 |
|
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$(subdir-ym):
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328 |
|
|
$(Q)$(MAKE) $(build)=$@
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329 |
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|
330 |
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# Add FORCE to the prequisites of a target to force it to be always rebuilt.
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331 |
|
|
# ---------------------------------------------------------------------------
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332 |
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333 |
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PHONY += FORCE
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334 |
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335 |
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FORCE:
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336 |
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337 |
|
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# Read all saved command lines and dependencies for the $(targets) we
|
338 |
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|
# may be building above, using $(if_changed{,_dep}). As an
|
339 |
|
|
# optimization, we don't need to read them if the target does not
|
340 |
|
|
# exist, we will rebuild anyway in that case.
|
341 |
|
|
|
342 |
|
|
targets := $(wildcard $(sort $(targets)))
|
343 |
|
|
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
|
344 |
|
|
|
345 |
|
|
ifneq ($(cmd_files),)
|
346 |
|
|
include $(cmd_files)
|
347 |
|
|
endif
|
348 |
|
|
|
349 |
|
|
|
350 |
|
|
# Declare the contents of the .PHONY variable as phony. We keep that
|
351 |
|
|
# information in a variable se we can use it in if_changed and friends.
|
352 |
|
|
|
353 |
|
|
.PHONY: $(PHONY)
|