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[/] [test_project/] [trunk/] [linux_sd_driver/] [scripts/] [Makefile.build] - Blame information for rev 62

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1 62 marcus.erl
# ==========================================================================
2
# Building
3
# ==========================================================================
4
 
5
src := $(obj)
6
 
7
PHONY := __build
8
__build:
9
 
10
# Init all relevant variables used in kbuild files so
11
# 1) they have correct type
12
# 2) they do not inherit any value from the environment
13
obj-y :=
14
obj-m :=
15
lib-y :=
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lib-m :=
17
always :=
18
targets :=
19
subdir-y :=
20
subdir-m :=
21
EXTRA_AFLAGS   :=
22
EXTRA_CFLAGS   :=
23
EXTRA_CPPFLAGS :=
24
EXTRA_LDFLAGS  :=
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asflags-y  :=
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ccflags-y  :=
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cppflags-y :=
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ldflags-y  :=
29
 
30
# Read .config if it exist, otherwise ignore
31
-include include/config/auto.conf
32
 
33
include scripts/Kbuild.include
34
 
35
# For backward compatibility check that these variables does not change
36
save-cflags := $(CFLAGS)
37
 
38
# The filename Kbuild has precedence over Makefile
39
kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
40
kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
41
include $(kbuild-file)
42
 
43
# If the save-* variables changed error out
44
ifeq ($(KBUILD_NOPEDANTIC),)
45
        ifneq ("$(save-cflags)","$(CFLAGS)")
46
                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
47
        endif
48
endif
49
include scripts/Makefile.lib
50
 
51
ifdef host-progs
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ifneq ($(hostprogs-y),$(host-progs))
53
$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
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hostprogs-y += $(host-progs)
55
endif
56
endif
57
 
58
# Do not include host rules unles needed
59
ifneq ($(hostprogs-y)$(hostprogs-m),)
60
include scripts/Makefile.host
61
endif
62
 
63
ifneq ($(KBUILD_SRC),)
64
# Create output directory if not already present
65
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
66
 
67
# Create directories for object files if directory does not exist
68
# Needed when obj-y := dir/file.o syntax is used
69
_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
70
endif
71
 
72
ifndef obj
73
$(warning kbuild: Makefile.build is included improperly)
74
endif
75
 
76
# ===========================================================================
77
 
78
ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
79
lib-target := $(obj)/lib.a
80
endif
81
 
82
ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
83
builtin-target := $(obj)/built-in.o
84
endif
85
 
86
# We keep a list of all modules in $(MODVERDIR)
87
 
88
__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
89
         $(if $(KBUILD_MODULES),$(obj-m)) \
90
         $(subdir-ym) $(always)
91
        @:
92
 
93
# Linus' kernel sanity checking tool
94
ifneq ($(KBUILD_CHECKSRC),0)
95
  ifeq ($(KBUILD_CHECKSRC),2)
96
    quiet_cmd_force_checksrc = CHECK   $<
97
          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
98
  else
99
      quiet_cmd_checksrc     = CHECK   $<
100
            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
101
  endif
102
endif
103
 
104
 
105
# Compile C sources (.c)
106
# ---------------------------------------------------------------------------
107
 
108
# Default is built-in, unless we know otherwise
109
modkern_cflags := $(CFLAGS_KERNEL)
110
quiet_modtag := $(empty)   $(empty)
111
 
112
$(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
113
$(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
114
$(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
115
$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
116
 
117
$(real-objs-m)        : quiet_modtag := [M]
118
$(real-objs-m:.o=.i)  : quiet_modtag := [M]
119
$(real-objs-m:.o=.s)  : quiet_modtag := [M]
120
$(real-objs-m:.o=.lst): quiet_modtag := [M]
121
 
122
$(obj-m)              : quiet_modtag := [M]
123
 
124
# Default for not multi-part modules
125
modname = $(basetarget)
126
 
127
$(multi-objs-m)         : modname = $(modname-multi)
128
$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
129
$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
130
$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
131
$(multi-objs-y)         : modname = $(modname-multi)
132
$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
133
$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
134
$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
135
 
136
quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
137
cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
138
 
139
$(obj)/%.s: $(src)/%.c FORCE
140
        $(call if_changed_dep,cc_s_c)
141
 
142
quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
143
cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
144
 
145
$(obj)/%.i: $(src)/%.c FORCE
146
        $(call if_changed_dep,cc_i_c)
147
 
148
quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
149
cmd_cc_symtypes_c          = \
150
                $(CPP) -D__GENKSYMS__ $(c_flags) $<                     \
151
                | $(GENKSYMS) -T $@ >/dev/null;                         \
152
                test -s $@ || rm -f $@
153
 
154
$(obj)/%.symtypes : $(src)/%.c FORCE
155
        $(call if_changed_dep,cc_symtypes_c)
156
 
157
# C (.c) files
158
# The C file is compiled and updated dependency information is generated.
159
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
160
 
161
quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
162
 
163
ifndef CONFIG_MODVERSIONS
164
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
165
 
166
else
167
# When module versioning is enabled the following steps are executed:
168
# o compile a .tmp_.o from .c
169
# o if .tmp_.o doesn't contain a __ksymtab version, i.e. does
170
#   not export symbols, we just rename .tmp_.o to .o and
171
#   are done.
172
# o otherwise, we calculate symbol versions using the good old
173
#   genksyms on the preprocessed source and postprocess them in a way
174
#   that they are usable as a linker script
175
# o generate .o from .tmp_.o using the linker to
176
#   replace the unresolved symbols __crc_exported_symbol with
177
#   the actual value of the checksum generated by genksyms
178
 
179
cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
180
cmd_modversions =                                                       \
181
        if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then     \
182
                $(CPP) -D__GENKSYMS__ $(c_flags) $<                     \
183
                | $(GENKSYMS) $(if $(KBUILD_SYMTYPES),                  \
184
                              -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH)   \
185
                > $(@D)/.tmp_$(@F:.o=.ver);                             \
186
                                                                        \
187
                $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F)              \
188
                        -T $(@D)/.tmp_$(@F:.o=.ver);                    \
189
                rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);        \
190
        else                                                            \
191
                mv -f $(@D)/.tmp_$(@F) $@;                              \
192
        fi;
193
endif
194
 
195
define rule_cc_o_c
196
        $(call echo-cmd,checksrc) $(cmd_checksrc)                         \
197
        $(call echo-cmd,cc_o_c) $(cmd_cc_o_c);                            \
198
        $(cmd_modversions)                                                \
199
        scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
200
                                                      $(dot-target).tmp;  \
201
        rm -f $(depfile);                                                 \
202
        mv -f $(dot-target).tmp $(dot-target).cmd
203
endef
204
 
205
# Built-in and composite module parts
206
$(obj)/%.o: $(src)/%.c FORCE
207
        $(call cmd,force_checksrc)
208
        $(call if_changed_rule,cc_o_c)
209
 
210
# Single-part modules are special since we need to mark them in $(MODVERDIR)
211
 
212
$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
213
        $(call cmd,force_checksrc)
214
        $(call if_changed_rule,cc_o_c)
215
        @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
216
 
217
quiet_cmd_cc_lst_c = MKLST   $@
218
      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
219
                     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
220
                                     System.map $(OBJDUMP) > $@
221
 
222
$(obj)/%.lst: $(src)/%.c FORCE
223
        $(call if_changed_dep,cc_lst_c)
224
 
225
# Compile assembler sources (.S)
226
# ---------------------------------------------------------------------------
227
 
228
modkern_aflags := $(AFLAGS_KERNEL)
229
 
230
$(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
231
$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
232
 
233
quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
234
cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
235
 
236
$(obj)/%.s: $(src)/%.S FORCE
237
        $(call if_changed_dep,as_s_S)
238
 
239
quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
240
cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
241
 
242
$(obj)/%.o: $(src)/%.S FORCE
243
        $(call if_changed_dep,as_o_S)
244
 
245
targets += $(real-objs-y) $(real-objs-m) $(lib-y)
246
targets += $(extra-y) $(MAKECMDGOALS) $(always)
247
 
248
# Linker scripts preprocessor (.lds.S -> .lds)
249
# ---------------------------------------------------------------------------
250
quiet_cmd_cpp_lds_S = LDS     $@
251
      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
252
 
253
$(obj)/%.lds: $(src)/%.lds.S FORCE
254
        $(call if_changed_dep,cpp_lds_S)
255
 
256
# Build the compiled-in targets
257
# ---------------------------------------------------------------------------
258
 
259
# To build objects in subdirs, we need to descend into the directories
260
$(sort $(subdir-obj-y)): $(subdir-ym) ;
261
 
262
#
263
# Rule to compile a set of .o files into one .o file
264
#
265
ifdef builtin-target
266
quiet_cmd_link_o_target = LD      $@
267
# If the list of objects to link is empty, just create an empty built-in.o
268
cmd_link_o_target = $(if $(strip $(obj-y)),\
269
                      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
270
                      rm -f $@; $(AR) rcs $@)
271
 
272
$(builtin-target): $(obj-y) FORCE
273
        $(call if_changed,link_o_target)
274
 
275
targets += $(builtin-target)
276
endif # builtin-target
277
 
278
#
279
# Rule to compile a set of .o files into one .a file
280
#
281
ifdef lib-target
282
quiet_cmd_link_l_target = AR      $@
283
cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
284
 
285
$(lib-target): $(lib-y) FORCE
286
        $(call if_changed,link_l_target)
287
 
288
targets += $(lib-target)
289
endif
290
 
291
#
292
# Rule to link composite objects
293
#
294
#  Composite objects are specified in kbuild makefile as follows:
295
#    -objs := 
296
#  or
297
#    -y    := 
298
link_multi_deps =                     \
299
$(filter $(addprefix $(obj)/,         \
300
$($(subst $(obj)/,,$(@:.o=-objs)))    \
301
$($(subst $(obj)/,,$(@:.o=-y)))), $^)
302
 
303
quiet_cmd_link_multi-y = LD      $@
304
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
305
 
306
quiet_cmd_link_multi-m = LD [M]  $@
307
cmd_link_multi-m = $(cmd_link_multi-y)
308
 
309
# We would rather have a list of rules like
310
#       foo.o: $(foo-objs)
311
# but that's not so easy, so we rather make all composite objects depend
312
# on the set of all their parts
313
$(multi-used-y) : %.o: $(multi-objs-y) FORCE
314
        $(call if_changed,link_multi-y)
315
 
316
$(multi-used-m) : %.o: $(multi-objs-m) FORCE
317
        $(call if_changed,link_multi-m)
318
        @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
319
 
320
targets += $(multi-used-y) $(multi-used-m)
321
 
322
 
323
# Descending
324
# ---------------------------------------------------------------------------
325
 
326
PHONY += $(subdir-ym)
327
$(subdir-ym):
328
        $(Q)$(MAKE) $(build)=$@
329
 
330
# Add FORCE to the prequisites of a target to force it to be always rebuilt.
331
# ---------------------------------------------------------------------------
332
 
333
PHONY += FORCE
334
 
335
FORCE:
336
 
337
# Read all saved command lines and dependencies for the $(targets) we
338
# may be building above, using $(if_changed{,_dep}). As an
339
# optimization, we don't need to read them if the target does not
340
# exist, we will rebuild anyway in that case.
341
 
342
targets := $(wildcard $(sort $(targets)))
343
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
344
 
345
ifneq ($(cmd_files),)
346
  include $(cmd_files)
347
endif
348
 
349
 
350
# Declare the contents of the .PHONY variable as phony.  We keep that
351
# information in a variable se we can use it in if_changed and friends.
352
 
353
.PHONY: $(PHONY)

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