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[/] [test_project/] [trunk/] [linux_sd_driver/] [sound/] [pci/] [azt3328.c] - Blame information for rev 62

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1 62 marcus.erl 
/*
2 
 *  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
3 
 *  Copyright (C) 2002, 2005, 2006, 2007 by Andreas Mohr <andi AT lisas.de>
4 
 *
5 
 *  Framework borrowed from Bart Hartgers's als4000.c.
6 
 *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
7 
 *  found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
8 
 *  Other versions are:
9 
 *  PCI168 A(W), sub ID 1800
10 
 *  PCI168 A/AP, sub ID 8000
11 
 *  Please give me feedback in case you try my driver with one of these!!
12 
 *
13 
 * GPL LICENSE
14 
 *  This program is free software; you can redistribute it and/or modify
15 
 *  it under the terms of the GNU General Public License as published by
16 
 *  the Free Software Foundation; either version 2 of the License, or
17 
 *  (at your option) any later version.
18 
 *
19 
 *  This program is distributed in the hope that it will be useful,
20 
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
21 
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22 
 *  GNU General Public License for more details.
23 
 
24 
 *  You should have received a copy of the GNU General Public License
25 
 *  along with this program; if not, write to the Free Software
26 
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
27 
 *
28 
 * NOTES
29 
 *  Since Aztech does not provide any chipset documentation,
30 
 *  even on repeated request to various addresses,
31 
 *  and the answer that was finally given was negative
32 
 *  (and I was stupid enough to manage to get hold of a PCI168 soundcard
33 
 *  in the first place >:-P}),
34 
 *  I was forced to base this driver on reverse engineering
35 
 *  (3 weeks' worth of evenings filled with driver work).
36 
 *  (and no, I did NOT go the easy way: to pick up a SB PCI128 for 9 Euros)
37 
 *
38 
 *  The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
39 
 *  for compatibility reasons) has the following features:
40 
 *
41 
 *  - builtin AC97 conformant codec (SNR over 80dB)
42 
 *    Note that "conformant" != "compliant"!! this chip's mixer register layout
43 
 *    *differs* from the standard AC97 layout:
44 
 *    they chose to not implement the headphone register (which is not a
45 
 *    problem since it's merely optional), yet when doing this, they committed
46 
 *    the grave sin of letting other registers follow immediately instead of
47 
 *    keeping a headphone dummy register, thereby shifting the mixer register
48 
 *    addresses illegally. So far unfortunately it looks like the very flexible
49 
 *    ALSA AC97 support is still not enough to easily compensate for such a
50 
 *    grave layout violation despite all tweaks and quirks mechanisms it offers.
51 
 *  - builtin genuine OPL3
52 
 *  - full duplex 16bit playback/record at independent sampling rate
53 
 *  - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
54 
 *  - game port (legacy address support)
55 
 *  - builtin 3D enhancement (said to be YAMAHA Ymersion)
56 
 *  - builtin DirectInput support, helps reduce CPU overhead (interrupt-driven
57 
 *    features supported)
58 
 *  - built-in General DirectX timer having a 20 bits counter
59 
 *    with 1us resolution (see below!)
60 
 *  - I2S serial port for external DAC
61 
 *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
62 
 *  - supports hardware volume control
63 
 *  - single chip low cost solution (128 pin QFP)
64 
 *  - supports programmable Sub-vendor and Sub-system ID
65 
 *    required for Microsoft's logo compliance (FIXME: where?)
66 
 *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
67 
 *
68 
 *  Note that this driver now is actually *better* than the Windows driver,
69 
 *  since it additionally supports the card's 1MHz DirectX timer - just try
70 
 *  the following snd-seq module parameters etc.:
71 
 *  - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0
72 
 *    seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0
73 
 *    seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000
74 
 *  - "timidity -iAv -B2,8 -Os -EFreverb=0"
75 
 *  - "pmidi -p 128:0 jazz.mid"
76 
 *
77 
 *  Certain PCI versions of this card are susceptible to DMA traffic underruns
78 
 *  in some systems (resulting in sound crackling/clicking/popping),
79 
 *  probably because they don't have a DMA FIFO buffer or so.
80 
 *  Overview (PCI ID/PCI subID/PCI rev.):
81 
 *  - no DMA crackling on SiS735: 0x50DC/0x1801/16
82 
 *  - unknown performance: 0x50DC/0x1801/10
83 
 *    (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler)
84 
 *
85 
 *  Crackling happens with VIA chipsets or, in my case, an SiS735, which is
86 
 *  supposed to be very fast and supposed to get rid of crackling much
87 
 *  better than a VIA, yet ironically I still get crackling, like many other
88 
 *  people with the same chipset.
89 
 *  Possible remedies:
90 
 *  - plug card into a different PCI slot, preferrably one that isn't shared
91 
 *    too much (this helps a lot, but not completely!)
92 
 *  - get rid of PCI VGA card, use AGP instead
93 
 *  - upgrade or downgrade BIOS
94 
 *  - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
95 
 *    Not too helpful.
96 
 *  - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
97 
 *
98 
 * BUGS
99 
 *  - full-duplex might *still* be problematic, not fully tested recently
100 
 *  - (non-bug) "Bass/Treble or 3D settings don't work" - they do get evaluated
101 
 *    if you set PCM output switch to "pre 3D" instead of "post 3D".
102 
 *    If this can't be set, then get a mixer application that Isn't Stupid (tm)
103 
 *    (e.g. kmix, gamix) - unfortunately several are!!
104 
 *
105 
 * TODO
106 
 *  - test MPU401 MIDI playback etc.
107 
 *  - add some power micro-management (disable various units of the card
108 
 *    as long as they're unused). However this requires I/O ports which I
109 
 *    haven't figured out yet and which thus might not even exist...
110 
 *    The standard suspend/resume functionality could probably make use of
111 
 *    some improvement, too...
112 
 *  - figure out what all unknown port bits are responsible for
113 
 *  - figure out some cleverly evil scheme to possibly make ALSA AC97 code
114 
 *    fully accept our quite incompatible ""AC97"" mixer and thus save some
115 
 *    code (but I'm not too optimistic that doing this is possible at all)
116 
 */
117 
 
118 
#include <sound/driver.h>
119 
#include <asm/io.h>
120 
#include <linux/init.h>
121 
#include <linux/pci.h>
122 
#include <linux/delay.h>
123 
#include <linux/slab.h>
124 
#include <linux/gameport.h>
125 
#include <linux/moduleparam.h>
126 
#include <linux/dma-mapping.h>
127 
#include <sound/core.h>
128 
#include <sound/control.h>
129 
#include <sound/pcm.h>
130 
#include <sound/rawmidi.h>
131 
#include <sound/mpu401.h>
132 
#include <sound/opl3.h>
133 
#include <sound/initval.h>
134 
#include "azt3328.h"
135 
 
136 
MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>");
137 
MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
138 
MODULE_LICENSE("GPL");
139 
MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
140 
 
141 
#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
142 
#define SUPPORT_JOYSTICK 1
143 
#endif
144 
 
145 
#define DEBUG_MISC      0
146 
#define DEBUG_CALLS     0
147 
#define DEBUG_MIXER     0
148 
#define DEBUG_PLAY_REC  0
149 
#define DEBUG_IO        0
150 
#define DEBUG_TIMER     0
151 
#define MIXER_TESTING   0
152 
 
153 
#if DEBUG_MISC
154 
#define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
155 
#else
156 
#define snd_azf3328_dbgmisc(format, args...)
157 
#endif
158 
 
159 
#if DEBUG_CALLS
160 
#define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
161 
#define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __FUNCTION__)
162 
#define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __FUNCTION__)
163 
#else
164 
#define snd_azf3328_dbgcalls(format, args...)
165 
#define snd_azf3328_dbgcallenter()
166 
#define snd_azf3328_dbgcallleave()
167 
#endif
168 
 
169 
#if DEBUG_MIXER
170 
#define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
171 
#else
172 
#define snd_azf3328_dbgmixer(format, args...)
173 
#endif
174 
 
175 
#if DEBUG_PLAY_REC
176 
#define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
177 
#else
178 
#define snd_azf3328_dbgplay(format, args...)
179 
#endif
180 
 
181 
#if DEBUG_MISC
182 
#define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args)
183 
#else
184 
#define snd_azf3328_dbgtimer(format, args...)
185 
#endif
186 
 
187 
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
188 
module_param_array(index, int, NULL, 0444);
189 
MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
190 
 
191 
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
192 
module_param_array(id, charp, NULL, 0444);
193 
MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
194 
 
195 
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
196 
module_param_array(enable, bool, NULL, 0444);
197 
MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
198 
 
199 
#ifdef SUPPORT_JOYSTICK
200 
static int joystick[SNDRV_CARDS];
201 
module_param_array(joystick, bool, NULL, 0444);
202 
MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
203 
#endif
204 
 
205 
static int seqtimer_scaling = 128;
206 
module_param(seqtimer_scaling, int, 0444);
207 
MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128.");
208 
 
209 
struct snd_azf3328 {
210 
        /* often-used fields towards beginning, then grouped */
211 
        unsigned long codec_port;
212 
        unsigned long io2_port;
213 
        unsigned long mpu_port;
214 
        unsigned long synth_port;
215 
        unsigned long mixer_port;
216 
 
217 
        spinlock_t reg_lock;
218 
 
219 
        struct snd_timer *timer;
220 
 
221 
        struct snd_pcm *pcm;
222 
        struct snd_pcm_substream *playback_substream;
223 
        struct snd_pcm_substream *capture_substream;
224 
        unsigned int is_playing;
225 
        unsigned int is_recording;
226 
 
227 
        struct snd_card *card;
228 
        struct snd_rawmidi *rmidi;
229 
 
230 
#ifdef SUPPORT_JOYSTICK
231 
        struct gameport *gameport;
232 
#endif
233 
 
234 
        struct pci_dev *pci;
235 
        int irq;
236 
 
237 
#ifdef CONFIG_PM
238 
        /* register value containers for power management
239 
         * Note: not always full I/O range preserved (just like Win driver!) */
240 
        u16 saved_regs_codec [AZF_IO_SIZE_CODEC_PM / 2];
241 
        u16 saved_regs_io2   [AZF_IO_SIZE_IO2_PM / 2];
242 
        u16 saved_regs_mpu   [AZF_IO_SIZE_MPU_PM / 2];
243 
        u16 saved_regs_synth[AZF_IO_SIZE_SYNTH_PM / 2];
244 
        u16 saved_regs_mixer[AZF_IO_SIZE_MIXER_PM / 2];
245 
#endif
246 
};
247 
 
248 
static const struct pci_device_id snd_azf3328_ids[] = {
249 
        { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* PCI168/3328 */
250 
        { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* 3328 */
251 
        { 0, }
252 
};
253 
 
254 
MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
255 
 
256 
static inline void
257 
snd_azf3328_codec_outb(const struct snd_azf3328 *chip, int reg, u8 value)
258 
{
259 
        outb(value, chip->codec_port + reg);
260 
}
261 
 
262 
static inline u8
263 
snd_azf3328_codec_inb(const struct snd_azf3328 *chip, int reg)
264 
{
265 
        return inb(chip->codec_port + reg);
266 
}
267 
 
268 
static inline void
269 
snd_azf3328_codec_outw(const struct snd_azf3328 *chip, int reg, u16 value)
270 
{
271 
        outw(value, chip->codec_port + reg);
272 
}
273 
 
274 
static inline u16
275 
snd_azf3328_codec_inw(const struct snd_azf3328 *chip, int reg)
276 
{
277 
        return inw(chip->codec_port + reg);
278 
}
279 
 
280 
static inline void
281 
snd_azf3328_codec_outl(const struct snd_azf3328 *chip, int reg, u32 value)
282 
{
283 
        outl(value, chip->codec_port + reg);
284 
}
285 
 
286 
static inline void
287 
snd_azf3328_io2_outb(const struct snd_azf3328 *chip, int reg, u8 value)
288 
{
289 
        outb(value, chip->io2_port + reg);
290 
}
291 
 
292 
static inline u8
293 
snd_azf3328_io2_inb(const struct snd_azf3328 *chip, int reg)
294 
{
295 
        return inb(chip->io2_port + reg);
296 
}
297 
 
298 
static inline void
299 
snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, int reg, u16 value)
300 
{
301 
        outw(value, chip->mixer_port + reg);
302 
}
303 
 
304 
static inline u16
305 
snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, int reg)
306 
{
307 
        return inw(chip->mixer_port + reg);
308 
}
309 
 
310 
static void
311 
snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip, int reg, int do_mute)
312 
{
313 
        unsigned long portbase = chip->mixer_port + reg + 1;
314 
        unsigned char oldval;
315 
 
316 
        /* the mute bit is on the *second* (i.e. right) register of a
317 
         * left/right channel setting */
318 
        oldval = inb(portbase);
319 
        if (do_mute)
320 
                oldval |= 0x80;
321 
        else
322 
                oldval &= ~0x80;
323 
        outb(oldval, portbase);
324 
}
325 
 
326 
static void
327 
snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
328 
{
329 
        unsigned long portbase = chip->mixer_port + reg;
330 
        unsigned char curr_vol_left = 0, curr_vol_right = 0;
331 
        int left_done = 0, right_done = 0;
332 
 
333 
        snd_azf3328_dbgcallenter();
334 
        if (chan_sel & SET_CHAN_LEFT)
335 
                curr_vol_left  = inb(portbase + 1);
336 
        else
337 
                left_done = 1;
338 
        if (chan_sel & SET_CHAN_RIGHT)
339 
                curr_vol_right = inb(portbase + 0);
340 
        else
341 
                right_done = 1;
342 
 
343 
        /* take care of muting flag (0x80) contained in left channel */
344 
        if (curr_vol_left & 0x80)
345 
                dst_vol_left |= 0x80;
346 
        else
347 
                dst_vol_left &= ~0x80;
348 
 
349 
        do {
350 
                if (!left_done) {
351 
                        if (curr_vol_left > dst_vol_left)
352 
                                curr_vol_left--;
353 
                        else
354 
                        if (curr_vol_left < dst_vol_left)
355 
                                curr_vol_left++;
356 
                        else
357 
                            left_done = 1;
358 
                        outb(curr_vol_left, portbase + 1);
359 
                }
360 
                if (!right_done) {
361 
                        if (curr_vol_right > dst_vol_right)
362 
                                curr_vol_right--;
363 
                        else
364 
                        if (curr_vol_right < dst_vol_right)
365 
                                curr_vol_right++;
366 
                        else
367 
                            right_done = 1;
368 
                        /* during volume change, the right channel is crackling
369 
                         * somewhat more than the left channel, unfortunately.
370 
                         * This seems to be a hardware issue. */
371 
                        outb(curr_vol_right, portbase + 0);
372 
                }
373 
                if (delay)
374 
                        mdelay(delay);
375 
        } while ((!left_done) || (!right_done));
376 
        snd_azf3328_dbgcallleave();
377 
}
378 
 
379 
/*
380 
 * general mixer element
381 
 */
382 
struct azf3328_mixer_reg {
383 
        unsigned int reg;
384 
        unsigned int lchan_shift, rchan_shift;
385 
        unsigned int mask;
386 
        unsigned int invert: 1;
387 
        unsigned int stereo: 1;
388 
        unsigned int enum_c: 4;
389 
};
390 
 
391 
#define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
392 
 ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \
393 
  (mask << 16) | \
394 
  (invert << 24) | \
395 
  (stereo << 25) | \
396 
  (enum_c << 26))
397 
 
398 
static void snd_azf3328_mixer_reg_decode(struct azf3328_mixer_reg *r, unsigned long val)
399 
{
400 
        r->reg = val & 0xff;
401 
        r->lchan_shift = (val >> 8) & 0x0f;
402 
        r->rchan_shift = (val >> 12) & 0x0f;
403 
        r->mask = (val >> 16) & 0xff;
404 
        r->invert = (val >> 24) & 1;
405 
        r->stereo = (val >> 25) & 1;
406 
        r->enum_c = (val >> 26) & 0x0f;
407 
}
408 
 
409 
/*
410 
 * mixer switches/volumes
411 
 */
412 
 
413 
#define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
414 
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
415 
  .info = snd_azf3328_info_mixer, \
416 
  .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
417 
  .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
418 
}
419 
 
420 
#define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
421 
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
422 
  .info = snd_azf3328_info_mixer, \
423 
  .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
424 
  .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
425 
}
426 
 
427 
#define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
428 
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
429 
  .info = snd_azf3328_info_mixer, \
430 
  .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
431 
  .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
432 
}
433 
 
434 
#define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
435 
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
436 
  .info = snd_azf3328_info_mixer, \
437 
  .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
438 
  .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
439 
}
440 
 
441 
#define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
442 
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
443 
  .info = snd_azf3328_info_mixer_enum, \
444 
  .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
445 
  .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
446 
}
447 
 
448 
static int
449 
snd_azf3328_info_mixer(struct snd_kcontrol *kcontrol,
450 
                       struct snd_ctl_elem_info *uinfo)
451 
{
452 
        struct azf3328_mixer_reg reg;
453 
 
454 
        snd_azf3328_dbgcallenter();
455 
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
456 
        uinfo->type = reg.mask == 1 ?
457 
                SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
458 
        uinfo->count = reg.stereo + 1;
459 
        uinfo->value.integer.min = 0;
460 
        uinfo->value.integer.max = reg.mask;
461 
        snd_azf3328_dbgcallleave();
462 
        return 0;
463 
}
464 
 
465 
static int
466 
snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol,
467 
                      struct snd_ctl_elem_value *ucontrol)
468 
{
469 
        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
470 
        struct azf3328_mixer_reg reg;
471 
        unsigned int oreg, val;
472 
 
473 
        snd_azf3328_dbgcallenter();
474 
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
475 
 
476 
        oreg = snd_azf3328_mixer_inw(chip, reg.reg);
477 
        val = (oreg >> reg.lchan_shift) & reg.mask;
478 
        if (reg.invert)
479 
                val = reg.mask - val;
480 
        ucontrol->value.integer.value[0] = val;
481 
        if (reg.stereo) {
482 
                val = (oreg >> reg.rchan_shift) & reg.mask;
483 
                if (reg.invert)
484 
                        val = reg.mask - val;
485 
                ucontrol->value.integer.value[1] = val;
486 
        }
487 
        snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx "
488 
                             "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n",
489 
                reg.reg, oreg,
490 
                ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
491 
                reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
492 
        snd_azf3328_dbgcallleave();
493 
        return 0;
494 
}
495 
 
496 
static int
497 
snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol,
498 
                      struct snd_ctl_elem_value *ucontrol)
499 
{
500 
        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
501 
        struct azf3328_mixer_reg reg;
502 
        unsigned int oreg, nreg, val;
503 
 
504 
        snd_azf3328_dbgcallenter();
505 
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
506 
        oreg = snd_azf3328_mixer_inw(chip, reg.reg);
507 
        val = ucontrol->value.integer.value[0] & reg.mask;
508 
        if (reg.invert)
509 
                val = reg.mask - val;
510 
        nreg = oreg & ~(reg.mask << reg.lchan_shift);
511 
        nreg |= (val << reg.lchan_shift);
512 
        if (reg.stereo) {
513 
                val = ucontrol->value.integer.value[1] & reg.mask;
514 
                if (reg.invert)
515 
                        val = reg.mask - val;
516 
                nreg &= ~(reg.mask << reg.rchan_shift);
517 
                nreg |= (val << reg.rchan_shift);
518 
        }
519 
        if (reg.mask >= 0x07) /* it's a volume control, so better take care */
520 
                snd_azf3328_mixer_write_volume_gradually(
521 
                        chip, reg.reg, nreg >> 8, nreg & 0xff,
522 
                        /* just set both channels, doesn't matter */
523 
                        SET_CHAN_LEFT|SET_CHAN_RIGHT,
524 
                        0);
525 
        else
526 
                snd_azf3328_mixer_outw(chip, reg.reg, nreg);
527 
 
528 
        snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, "
529 
                             "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n",
530 
                reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
531 
                oreg, reg.lchan_shift, reg.rchan_shift,
532 
                nreg, snd_azf3328_mixer_inw(chip, reg.reg));
533 
        snd_azf3328_dbgcallleave();
534 
        return (nreg != oreg);
535 
}
536 
 
537 
static int
538 
snd_azf3328_info_mixer_enum(struct snd_kcontrol *kcontrol,
539 
                            struct snd_ctl_elem_info *uinfo)
540 
{
541 
        static const char * const texts1[] = {
542 
                "Mic1", "Mic2"
543 
        };
544 
        static const char * const texts2[] = {
545 
                "Mix", "Mic"
546 
        };
547 
        static const char * const texts3[] = {
548 
                "Mic", "CD", "Video", "Aux",
549 
                "Line", "Mix", "Mix Mono", "Phone"
550 
        };
551 
        static const char * const texts4[] = {
552 
                "pre 3D", "post 3D"
553 
        };
554 
        struct azf3328_mixer_reg reg;
555 
 
556 
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
557 
        uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
558 
        uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
559 
        uinfo->value.enumerated.items = reg.enum_c;
560 
        if (uinfo->value.enumerated.item > reg.enum_c - 1U)
561 
                uinfo->value.enumerated.item = reg.enum_c - 1U;
562 
        if (reg.reg == IDX_MIXER_ADVCTL2) {
563 
                switch(reg.lchan_shift) {
564 
                case 8: /* modem out sel */
565 
                        strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
566 
                        break;
567 
                case 9: /* mono sel source */
568 
                        strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
569 
                        break;
570 
                case 15: /* PCM Out Path */
571 
                        strcpy(uinfo->value.enumerated.name, texts4[uinfo->value.enumerated.item]);
572 
                        break;
573 
                }
574 
        } else
575 
                strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
576 
);
577 
        return 0;
578 
}
579 
 
580 
static int
581 
snd_azf3328_get_mixer_enum(struct snd_kcontrol *kcontrol,
582 
                           struct snd_ctl_elem_value *ucontrol)
583 
{
584 
        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
585 
        struct azf3328_mixer_reg reg;
586 
        unsigned short val;
587 
 
588 
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
589 
        val = snd_azf3328_mixer_inw(chip, reg.reg);
590 
        if (reg.reg == IDX_MIXER_REC_SELECT) {
591 
                ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
592 
                ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
593 
        } else
594 
                ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
595 
 
596 
        snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n",
597 
                reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1],
598 
                reg.lchan_shift, reg.enum_c);
599 
        return 0;
600 
}
601 
 
602 
static int
603 
snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol,
604 
                           struct snd_ctl_elem_value *ucontrol)
605 
{
606 
        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
607 
        struct azf3328_mixer_reg reg;
608 
        unsigned int oreg, nreg, val;
609 
 
610 
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
611 
        oreg = snd_azf3328_mixer_inw(chip, reg.reg);
612 
        val = oreg;
613 
        if (reg.reg == IDX_MIXER_REC_SELECT) {
614 
                if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
615 
                ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
616 
                        return -EINVAL;
617 
                val = (ucontrol->value.enumerated.item[0] << 8) |
618 
                      (ucontrol->value.enumerated.item[1] << 0);
619 
        } else {
620 
                if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
621 
                        return -EINVAL;
622 
                val &= ~((reg.enum_c - 1) << reg.lchan_shift);
623 
                val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
624 
        }
625 
        snd_azf3328_mixer_outw(chip, reg.reg, val);
626 
        nreg = val;
627 
 
628 
        snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
629 
        return (nreg != oreg);
630 
}
631 
 
632 
static struct snd_kcontrol_new snd_azf3328_mixer_controls[] __devinitdata = {
633 
        AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
634 
        AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
635 
        AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
636 
        AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
637 
        AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1),
638 
        AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
639 
        AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
640 
        AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
641 
        AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
642 
        AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
643 
        AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
644 
        AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
645 
        AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
646 
        AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
647 
        AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
648 
        AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
649 
        AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
650 
        AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
651 
        AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
652 
        AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
653 
        AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
654 
        AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
655 
        AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
656 
        AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
657 
        AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
658 
        AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
659 
        AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
660 
        AZF3328_MIXER_ENUM("Mic Select", IDX_MIXER_ADVCTL2, 2, 8),
661 
        AZF3328_MIXER_ENUM("Mono Output Select", IDX_MIXER_ADVCTL2, 2, 9),
662 
        AZF3328_MIXER_ENUM("PCM Output Route", IDX_MIXER_ADVCTL2, 2, 15), /* PCM Out Path, place in front since it controls *both* 3D and Bass/Treble! */
663 
        AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
664 
        AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
665 
        AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0),
666 
        AZF3328_MIXER_VOL_SPECIAL("3D Control - Width", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
667 
        AZF3328_MIXER_VOL_SPECIAL("3D Control - Depth", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
668 
#if MIXER_TESTING
669 
        AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
670 
        AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
671 
        AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
672 
        AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
673 
        AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
674 
        AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
675 
        AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
676 
        AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
677 
        AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
678 
        AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
679 
        AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
680 
        AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
681 
        AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
682 
        AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
683 
        AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
684 
        AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
685 
#endif
686 
};
687 
 
688 
static u16 __devinitdata snd_azf3328_init_values[][2] = {
689 
        { IDX_MIXER_PLAY_MASTER,        MIXER_MUTE_MASK|0x1f1f },
690 
        { IDX_MIXER_MODEMOUT,           MIXER_MUTE_MASK|0x1f1f },
691 
        { IDX_MIXER_BASSTREBLE,         0x0000 },
692 
        { IDX_MIXER_PCBEEP,             MIXER_MUTE_MASK|0x1f1f },
693 
        { IDX_MIXER_MODEMIN,            MIXER_MUTE_MASK|0x1f1f },
694 
        { IDX_MIXER_MIC,                MIXER_MUTE_MASK|0x001f },
695 
        { IDX_MIXER_LINEIN,             MIXER_MUTE_MASK|0x1f1f },
696 
        { IDX_MIXER_CDAUDIO,            MIXER_MUTE_MASK|0x1f1f },
697 
        { IDX_MIXER_VIDEO,              MIXER_MUTE_MASK|0x1f1f },
698 
        { IDX_MIXER_AUX,                MIXER_MUTE_MASK|0x1f1f },
699 
        { IDX_MIXER_WAVEOUT,            MIXER_MUTE_MASK|0x1f1f },
700 
        { IDX_MIXER_FMSYNTH,            MIXER_MUTE_MASK|0x1f1f },
701 
        { IDX_MIXER_REC_VOLUME,         MIXER_MUTE_MASK|0x0707 },
702 
};
703 
 
704 
static int __devinit
705 
snd_azf3328_mixer_new(struct snd_azf3328 *chip)
706 
{
707 
        struct snd_card *card;
708 
        const struct snd_kcontrol_new *sw;
709 
        unsigned int idx;
710 
        int err;
711 
 
712 
        snd_azf3328_dbgcallenter();
713 
        snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
714 
 
715 
        card = chip->card;
716 
 
717 
        /* mixer reset */
718 
        snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
719 
 
720 
        /* mute and zero volume channels */
721 
        for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) {
722 
                snd_azf3328_mixer_outw(chip,
723 
                        snd_azf3328_init_values[idx][0],
724 
                        snd_azf3328_init_values[idx][1]);
725 
        }
726 
 
727 
        /* add mixer controls */
728 
        sw = snd_azf3328_mixer_controls;
729 
        for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
730 
                if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
731 
                        return err;
732 
        }
733 
        snd_component_add(card, "AZF3328 mixer");
734 
        strcpy(card->mixername, "AZF3328 mixer");
735 
 
736 
        snd_azf3328_dbgcallleave();
737 
        return 0;
738 
}
739 
 
740 
static int
741 
snd_azf3328_hw_params(struct snd_pcm_substream *substream,
742 
                                 struct snd_pcm_hw_params *hw_params)
743 
{
744 
        int res;
745 
        snd_azf3328_dbgcallenter();
746 
        res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
747 
        snd_azf3328_dbgcallleave();
748 
        return res;
749 
}
750 
 
751 
static int
752 
snd_azf3328_hw_free(struct snd_pcm_substream *substream)
753 
{
754 
        snd_azf3328_dbgcallenter();
755 
        snd_pcm_lib_free_pages(substream);
756 
        snd_azf3328_dbgcallleave();
757 
        return 0;
758 
}
759 
 
760 
static void
761 
snd_azf3328_setfmt(struct snd_azf3328 *chip,
762 
                               unsigned int reg,
763 
                               unsigned int bitrate,
764 
                               unsigned int format_width,
765 
                               unsigned int channels
766 
)
767 
{
768 
        u16 val = 0xff00;
769 
        unsigned long flags;
770 
 
771 
        snd_azf3328_dbgcallenter();
772 
        switch (bitrate) {
773 
        case  4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break;
774 
        case  4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break;
775 
        case  5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */
776 
        case  6620: val |= SOUNDFORMAT_FREQ_6620; break;
777 
        case  8000: val |= SOUNDFORMAT_FREQ_8000; break;
778 
        case  9600: val |= SOUNDFORMAT_FREQ_9600; break;
779 
        case 11025: val |= SOUNDFORMAT_FREQ_11025; break;
780 
        case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break;
781 
        case 16000: val |= SOUNDFORMAT_FREQ_16000; break;
782 
        case 22050: val |= SOUNDFORMAT_FREQ_22050; break;
783 
        case 32000: val |= SOUNDFORMAT_FREQ_32000; break;
784 
        case 44100: val |= SOUNDFORMAT_FREQ_44100; break;
785 
        case 48000: val |= SOUNDFORMAT_FREQ_48000; break;
786 
        case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break;
787 
        default:
788 
                snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
789 
                val |= SOUNDFORMAT_FREQ_44100;
790 
                break;
791 
        }
792 
        /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */
793 
        /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */
794 
        /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */
795 
        /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */
796 
        /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
797 
        /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
798 
        /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
799 
        /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
800 
        /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
801 
 
802 
        if (channels == 2)
803 
                val |= SOUNDFORMAT_FLAG_2CHANNELS;
804 
 
805 
        if (format_width == 16)
806 
                val |= SOUNDFORMAT_FLAG_16BIT;
807 
 
808 
        spin_lock_irqsave(&chip->reg_lock, flags);
809 
 
810 
        /* set bitrate/format */
811 
        snd_azf3328_codec_outw(chip, reg, val);
812 
 
813 
        /* changing the bitrate/format settings switches off the
814 
         * audio output with an annoying click in case of 8/16bit format change
815 
         * (maybe shutting down DAC/ADC?), thus immediately
816 
         * do some tweaking to reenable it and get rid of the clicking
817 
         * (FIXME: yes, it works, but what exactly am I doing here?? :)
818 
         * FIXME: does this have some side effects for full-duplex
819 
         * or other dramatic side effects? */
820 
        if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
821 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
822 
                        snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) |
823 
                        DMA_PLAY_SOMETHING1 |
824 
                        DMA_PLAY_SOMETHING2 |
825 
                        SOMETHING_ALMOST_ALWAYS_SET |
826 
                        DMA_EPILOGUE_SOMETHING |
827 
                        DMA_SOMETHING_ELSE
828 
                );
829 
 
830 
        spin_unlock_irqrestore(&chip->reg_lock, flags);
831 
        snd_azf3328_dbgcallleave();
832 
}
833 
 
834 
static void
835 
snd_azf3328_setdmaa(struct snd_azf3328 *chip,
836 
                                long unsigned int addr,
837 
                                unsigned int count,
838 
                                unsigned int size,
839 
                                int do_recording)
840 
{
841 
        unsigned long flags, portbase;
842 
        unsigned int is_running;
843 
 
844 
        snd_azf3328_dbgcallenter();
845 
        if (do_recording) {
846 
                /* access capture registers, i.e. skip playback reg section */
847 
                portbase = chip->codec_port + 0x20;
848 
                is_running = chip->is_recording;
849 
        } else {
850 
                /* access the playback register section */
851 
                portbase = chip->codec_port + 0x00;
852 
                is_running = chip->is_playing;
853 
        }
854 
 
855 
        /* AZF3328 uses a two buffer pointer DMA playback approach */
856 
        if (!is_running) {
857 
                unsigned long addr_area2;
858 
                unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */
859 
                count_areas = size/2;
860 
                addr_area2 = addr+count_areas;
861 
                count_areas--; /* max. index */
862 
                snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas);
863 
 
864 
                /* build combined I/O buffer length word */
865 
                count_tmp = count_areas;
866 
                count_areas |= (count_tmp << 16);
867 
                spin_lock_irqsave(&chip->reg_lock, flags);
868 
                outl(addr, portbase + IDX_IO_PLAY_DMA_START_1);
869 
                outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2);
870 
                outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1);
871 
                spin_unlock_irqrestore(&chip->reg_lock, flags);
872 
        }
873 
        snd_azf3328_dbgcallleave();
874 
}
875 
 
876 
static int
877 
snd_azf3328_playback_prepare(struct snd_pcm_substream *substream)
878 
{
879 
#if 0
880 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
881 
        struct snd_pcm_runtime *runtime = substream->runtime;
882 
        unsigned int size = snd_pcm_lib_buffer_bytes(substream);
883 
        unsigned int count = snd_pcm_lib_period_bytes(substream);
884 
#endif
885 
 
886 
        snd_azf3328_dbgcallenter();
887 
#if 0
888 
        snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
889 
                runtime->rate,
890 
                snd_pcm_format_width(runtime->format),
891 
                runtime->channels);
892 
        snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
893 
#endif
894 
        snd_azf3328_dbgcallleave();
895 
        return 0;
896 
}
897 
 
898 
static int
899 
snd_azf3328_capture_prepare(struct snd_pcm_substream *substream)
900 
{
901 
#if 0
902 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
903 
        struct snd_pcm_runtime *runtime = substream->runtime;
904 
        unsigned int size = snd_pcm_lib_buffer_bytes(substream);
905 
        unsigned int count = snd_pcm_lib_period_bytes(substream);
906 
#endif
907 
 
908 
        snd_azf3328_dbgcallenter();
909 
#if 0
910 
        snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
911 
                runtime->rate,
912 
                snd_pcm_format_width(runtime->format),
913 
                runtime->channels);
914 
        snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
915 
#endif
916 
        snd_azf3328_dbgcallleave();
917 
        return 0;
918 
}
919 
 
920 
static int
921 
snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd)
922 
{
923 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
924 
        struct snd_pcm_runtime *runtime = substream->runtime;
925 
        int result = 0;
926 
        unsigned int status1;
927 
 
928 
        snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
929 
 
930 
        switch (cmd) {
931 
        case SNDRV_PCM_TRIGGER_START:
932 
                snd_azf3328_dbgplay("START PLAYBACK\n");
933 
 
934 
                /* mute WaveOut */
935 
                snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
936 
 
937 
                snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
938 
                        runtime->rate,
939 
                        snd_pcm_format_width(runtime->format),
940 
                        runtime->channels);
941 
 
942 
                spin_lock(&chip->reg_lock);
943 
                /* stop playback */
944 
                status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
945 
                status1 &= ~DMA_RESUME;
946 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
947 
 
948 
                /* FIXME: clear interrupts or what??? */
949 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff);
950 
                spin_unlock(&chip->reg_lock);
951 
 
952 
                snd_azf3328_setdmaa(chip, runtime->dma_addr,
953 
                        snd_pcm_lib_period_bytes(substream),
954 
                        snd_pcm_lib_buffer_bytes(substream),
955 
                        0);
956 
 
957 
                spin_lock(&chip->reg_lock);
958 
#ifdef WIN9X
959 
                /* FIXME: enable playback/recording??? */
960 
                status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
961 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
962 
 
963 
                /* start playback again */
964 
                /* FIXME: what is this value (0x0010)??? */
965 
                status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
966 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
967 
#else /* NT4 */
968 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
969 
                        0x0000);
970 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
971 
                        DMA_PLAY_SOMETHING1);
972 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
973 
                        DMA_PLAY_SOMETHING1 |
974 
                        DMA_PLAY_SOMETHING2);
975 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
976 
                        DMA_RESUME |
977 
                        SOMETHING_ALMOST_ALWAYS_SET |
978 
                        DMA_EPILOGUE_SOMETHING |
979 
                        DMA_SOMETHING_ELSE);
980 
#endif
981 
                spin_unlock(&chip->reg_lock);
982 
 
983 
                /* now unmute WaveOut */
984 
                snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
985 
 
986 
                chip->is_playing = 1;
987 
                snd_azf3328_dbgplay("STARTED PLAYBACK\n");
988 
                break;
989 
        case SNDRV_PCM_TRIGGER_RESUME:
990 
                snd_azf3328_dbgplay("RESUME PLAYBACK\n");
991 
                /* resume playback if we were active */
992 
                if (chip->is_playing)
993 
                        snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
994 
                                snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | DMA_RESUME);
995 
                break;
996 
        case SNDRV_PCM_TRIGGER_STOP:
997 
                snd_azf3328_dbgplay("STOP PLAYBACK\n");
998 
 
999 
                /* mute WaveOut */
1000 
                snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
1001 
 
1002 
                spin_lock(&chip->reg_lock);
1003 
                /* stop playback */
1004 
                status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
1005 
 
1006 
                status1 &= ~DMA_RESUME;
1007 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
1008 
 
1009 
                /* hmm, is this really required? we're resetting the same bit
1010 
                 * immediately thereafter... */
1011 
                status1 |= DMA_PLAY_SOMETHING1;
1012 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
1013 
 
1014 
                status1 &= ~DMA_PLAY_SOMETHING1;
1015 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
1016 
                spin_unlock(&chip->reg_lock);
1017 
 
1018 
                /* now unmute WaveOut */
1019 
                snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
1020 
                chip->is_playing = 0;
1021 
                snd_azf3328_dbgplay("STOPPED PLAYBACK\n");
1022 
                break;
1023 
        case SNDRV_PCM_TRIGGER_SUSPEND:
1024 
                snd_azf3328_dbgplay("SUSPEND PLAYBACK\n");
1025 
                /* make sure playback is stopped */
1026 
                snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
1027 
                        snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) & ~DMA_RESUME);
1028 
                break;
1029 
        case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1030 
                snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
1031 
                break;
1032 
        case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1033 
                snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
1034 
                break;
1035 
        default:
1036 
                printk(KERN_ERR "FIXME: unknown trigger mode!\n");
1037 
                return -EINVAL;
1038 
        }
1039 
 
1040 
        snd_azf3328_dbgcallleave();
1041 
        return result;
1042 
}
1043 
 
1044 
/* this is just analogous to playback; I'm not quite sure whether recording
1045 
 * should actually be triggered like that */
1046 
static int
1047 
snd_azf3328_capture_trigger(struct snd_pcm_substream *substream, int cmd)
1048 
{
1049 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1050 
        struct snd_pcm_runtime *runtime = substream->runtime;
1051 
        int result = 0;
1052 
        unsigned int status1;
1053 
 
1054 
        snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
1055 
 
1056 
        switch (cmd) {
1057 
        case SNDRV_PCM_TRIGGER_START:
1058 
 
1059 
                snd_azf3328_dbgplay("START CAPTURE\n");
1060 
 
1061 
                snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
1062 
                        runtime->rate,
1063 
                        snd_pcm_format_width(runtime->format),
1064 
                        runtime->channels);
1065 
 
1066 
                spin_lock(&chip->reg_lock);
1067 
                /* stop recording */
1068 
                status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
1069 
                status1 &= ~DMA_RESUME;
1070 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1071 
 
1072 
                /* FIXME: clear interrupts or what??? */
1073 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff);
1074 
                spin_unlock(&chip->reg_lock);
1075 
 
1076 
                snd_azf3328_setdmaa(chip, runtime->dma_addr,
1077 
                        snd_pcm_lib_period_bytes(substream),
1078 
                        snd_pcm_lib_buffer_bytes(substream),
1079 
                        1);
1080 
 
1081 
                spin_lock(&chip->reg_lock);
1082 
#ifdef WIN9X
1083 
                /* FIXME: enable playback/recording??? */
1084 
                status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
1085 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1086 
 
1087 
                /* start capture again */
1088 
                /* FIXME: what is this value (0x0010)??? */
1089 
                status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
1090 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1091 
#else
1092 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1093 
                        0x0000);
1094 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1095 
                        DMA_PLAY_SOMETHING1);
1096 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1097 
                        DMA_PLAY_SOMETHING1 |
1098 
                        DMA_PLAY_SOMETHING2);
1099 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1100 
                        DMA_RESUME |
1101 
                        SOMETHING_ALMOST_ALWAYS_SET |
1102 
                        DMA_EPILOGUE_SOMETHING |
1103 
                        DMA_SOMETHING_ELSE);
1104 
#endif
1105 
                spin_unlock(&chip->reg_lock);
1106 
 
1107 
                chip->is_recording = 1;
1108 
                snd_azf3328_dbgplay("STARTED CAPTURE\n");
1109 
                break;
1110 
        case SNDRV_PCM_TRIGGER_RESUME:
1111 
                snd_azf3328_dbgplay("RESUME CAPTURE\n");
1112 
                /* resume recording if we were active */
1113 
                if (chip->is_recording)
1114 
                        snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1115 
                                snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) | DMA_RESUME);
1116 
                break;
1117 
        case SNDRV_PCM_TRIGGER_STOP:
1118 
                snd_azf3328_dbgplay("STOP CAPTURE\n");
1119 
 
1120 
                spin_lock(&chip->reg_lock);
1121 
                /* stop recording */
1122 
                status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
1123 
 
1124 
                status1 &= ~DMA_RESUME;
1125 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1126 
 
1127 
                status1 |= DMA_PLAY_SOMETHING1;
1128 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1129 
 
1130 
                status1 &= ~DMA_PLAY_SOMETHING1;
1131 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
1132 
                spin_unlock(&chip->reg_lock);
1133 
 
1134 
                chip->is_recording = 0;
1135 
                snd_azf3328_dbgplay("STOPPED CAPTURE\n");
1136 
                break;
1137 
        case SNDRV_PCM_TRIGGER_SUSPEND:
1138 
                snd_azf3328_dbgplay("SUSPEND CAPTURE\n");
1139 
                /* make sure recording is stopped */
1140 
                snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
1141 
                        snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) & ~DMA_RESUME);
1142 
                break;
1143 
        case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1144 
                snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
1145 
                break;
1146 
        case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1147 
                snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
1148 
                break;
1149 
        default:
1150 
                printk(KERN_ERR "FIXME: unknown trigger mode!\n");
1151 
                return -EINVAL;
1152 
        }
1153 
 
1154 
        snd_azf3328_dbgcallleave();
1155 
        return result;
1156 
}
1157 
 
1158 
static snd_pcm_uframes_t
1159 
snd_azf3328_playback_pointer(struct snd_pcm_substream *substream)
1160 
{
1161 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1162 
        unsigned long bufptr, result;
1163 
        snd_pcm_uframes_t frmres;
1164 
 
1165 
#ifdef QUERY_HARDWARE
1166 
        bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
1167 
#else
1168 
        bufptr = substream->runtime->dma_addr;
1169 
#endif
1170 
        result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
1171 
 
1172 
        /* calculate offset */
1173 
        result -= bufptr;
1174 
        frmres = bytes_to_frames( substream->runtime, result);
1175 
        snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres);
1176 
        return frmres;
1177 
}
1178 
 
1179 
static snd_pcm_uframes_t
1180 
snd_azf3328_capture_pointer(struct snd_pcm_substream *substream)
1181 
{
1182 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1183 
        unsigned long bufptr, result;
1184 
        snd_pcm_uframes_t frmres;
1185 
 
1186 
#ifdef QUERY_HARDWARE
1187 
        bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
1188 
#else
1189 
        bufptr = substream->runtime->dma_addr;
1190 
#endif
1191 
        result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
1192 
 
1193 
        /* calculate offset */
1194 
        result -= bufptr;
1195 
        frmres = bytes_to_frames( substream->runtime, result);
1196 
        snd_azf3328_dbgplay("REC  @ 0x%8lx, frames %8ld\n", result, frmres);
1197 
        return frmres;
1198 
}
1199 
 
1200 
static irqreturn_t
1201 
snd_azf3328_interrupt(int irq, void *dev_id)
1202 
{
1203 
        struct snd_azf3328 *chip = dev_id;
1204 
        u8 status, which;
1205 
        static unsigned long irq_count;
1206 
 
1207 
        status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS);
1208 
 
1209 
        /* fast path out, to ease interrupt sharing */
1210 
        if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER)))
1211 
                return IRQ_NONE; /* must be interrupt for another device */
1212 
 
1213 
        snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n",
1214 
                irq_count,
1215 
                snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS),
1216 
                snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE),
1217 
                status);
1218 
 
1219 
        if (status & IRQ_TIMER) {
1220 
                /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */
1221 
                if (chip->timer)
1222 
                        snd_timer_interrupt(chip->timer, chip->timer->sticks);
1223 
                /* ACK timer */
1224 
                spin_lock(&chip->reg_lock);
1225 
                snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
1226 
                spin_unlock(&chip->reg_lock);
1227 
                snd_azf3328_dbgplay("azt3328: timer IRQ\n");
1228 
        }
1229 
        if (status & IRQ_PLAYBACK) {
1230 
                spin_lock(&chip->reg_lock);
1231 
                which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE);
1232 
                /* ack all IRQ types immediately */
1233 
                snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which);
1234 
                spin_unlock(&chip->reg_lock);
1235 
 
1236 
                if (chip->pcm && chip->playback_substream) {
1237 
                        snd_pcm_period_elapsed(chip->playback_substream);
1238 
                        snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n",
1239 
                                which,
1240 
                                inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1241 
                } else
1242 
                        snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1243 
                if (which & IRQ_PLAY_SOMETHING)
1244 
                        snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
1245 
        }
1246 
        if (status & IRQ_RECORDING) {
1247 
                spin_lock(&chip->reg_lock);
1248 
                which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE);
1249 
                /* ack all IRQ types immediately */
1250 
                snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which);
1251 
                spin_unlock(&chip->reg_lock);
1252 
 
1253 
                if (chip->pcm && chip->capture_substream) {
1254 
                        snd_pcm_period_elapsed(chip->capture_substream);
1255 
                        snd_azf3328_dbgplay("REC  period done (#%x), @ %x\n",
1256 
                                which,
1257 
                                inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1258 
                } else
1259 
                        snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1260 
                if (which & IRQ_REC_SOMETHING)
1261 
                        snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
1262 
        }
1263 
        /* MPU401 has less critical IRQ requirements
1264 
         * than timer and playback/recording, right? */
1265 
        if (status & IRQ_MPU401) {
1266 
                snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1267 
 
1268 
                /* hmm, do we have to ack the IRQ here somehow?
1269 
                 * If so, then I don't know how... */
1270 
                snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n");
1271 
        }
1272 
        irq_count++;
1273 
        return IRQ_HANDLED;
1274 
}
1275 
 
1276 
/*****************************************************************/
1277 
 
1278 
static const struct snd_pcm_hardware snd_azf3328_playback =
1279 
{
1280 
        /* FIXME!! Correct? */
1281 
        .info =                 SNDRV_PCM_INFO_MMAP |
1282 
                                SNDRV_PCM_INFO_INTERLEAVED |
1283 
                                SNDRV_PCM_INFO_MMAP_VALID,
1284 
        .formats =              SNDRV_PCM_FMTBIT_S8 |
1285 
                                SNDRV_PCM_FMTBIT_U8 |
1286 
                                SNDRV_PCM_FMTBIT_S16_LE |
1287 
                                SNDRV_PCM_FMTBIT_U16_LE,
1288 
        .rates =                SNDRV_PCM_RATE_5512 |
1289 
                                SNDRV_PCM_RATE_8000_48000 |
1290 
                                SNDRV_PCM_RATE_KNOT,
1291 
        .rate_min =             4000,
1292 
        .rate_max =             66200,
1293 
        .channels_min =         1,
1294 
        .channels_max =         2,
1295 
        .buffer_bytes_max =     65536,
1296 
        .period_bytes_min =     64,
1297 
        .period_bytes_max =     65536,
1298 
        .periods_min =          1,
1299 
        .periods_max =          1024,
1300 
        /* FIXME: maybe that card actually has a FIFO?
1301 
         * Hmm, it seems newer revisions do have one, but we still don't know
1302 
         * its size... */
1303 
        .fifo_size =            0,
1304 
};
1305 
 
1306 
static const struct snd_pcm_hardware snd_azf3328_capture =
1307 
{
1308 
        /* FIXME */
1309 
        .info =                 SNDRV_PCM_INFO_MMAP |
1310 
                                SNDRV_PCM_INFO_INTERLEAVED |
1311 
                                SNDRV_PCM_INFO_MMAP_VALID,
1312 
        .formats =              SNDRV_PCM_FMTBIT_S8 |
1313 
                                SNDRV_PCM_FMTBIT_U8 |
1314 
                                SNDRV_PCM_FMTBIT_S16_LE |
1315 
                                SNDRV_PCM_FMTBIT_U16_LE,
1316 
        .rates =                SNDRV_PCM_RATE_5512 |
1317 
                                SNDRV_PCM_RATE_8000_48000 |
1318 
                                SNDRV_PCM_RATE_KNOT,
1319 
        .rate_min =             4000,
1320 
        .rate_max =             66200,
1321 
        .channels_min =         1,
1322 
        .channels_max =         2,
1323 
        .buffer_bytes_max =     65536,
1324 
        .period_bytes_min =     64,
1325 
        .period_bytes_max =     65536,
1326 
        .periods_min =          1,
1327 
        .periods_max =          1024,
1328 
        .fifo_size =            0,
1329 
};
1330 
 
1331 
 
1332 
static unsigned int snd_azf3328_fixed_rates[] = {
1333 
        4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000,
1334 
        44100, 48000, 66200 };
1335 
static struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = {
1336 
        .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
1337 
        .list = snd_azf3328_fixed_rates,
1338 
        .mask = 0,
1339 
};
1340 
 
1341 
/*****************************************************************/
1342 
 
1343 
static int
1344 
snd_azf3328_playback_open(struct snd_pcm_substream *substream)
1345 
{
1346 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1347 
        struct snd_pcm_runtime *runtime = substream->runtime;
1348 
 
1349 
        snd_azf3328_dbgcallenter();
1350 
        chip->playback_substream = substream;
1351 
        runtime->hw = snd_azf3328_playback;
1352 
        snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1353 
                                   &snd_azf3328_hw_constraints_rates);
1354 
        snd_azf3328_dbgcallleave();
1355 
        return 0;
1356 
}
1357 
 
1358 
static int
1359 
snd_azf3328_capture_open(struct snd_pcm_substream *substream)
1360 
{
1361 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1362 
        struct snd_pcm_runtime *runtime = substream->runtime;
1363 
 
1364 
        snd_azf3328_dbgcallenter();
1365 
        chip->capture_substream = substream;
1366 
        runtime->hw = snd_azf3328_capture;
1367 
        snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1368 
                                   &snd_azf3328_hw_constraints_rates);
1369 
        snd_azf3328_dbgcallleave();
1370 
        return 0;
1371 
}
1372 
 
1373 
static int
1374 
snd_azf3328_playback_close(struct snd_pcm_substream *substream)
1375 
{
1376 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1377 
 
1378 
        snd_azf3328_dbgcallenter();
1379 
        chip->playback_substream = NULL;
1380 
        snd_azf3328_dbgcallleave();
1381 
        return 0;
1382 
}
1383 
 
1384 
static int
1385 
snd_azf3328_capture_close(struct snd_pcm_substream *substream)
1386 
{
1387 
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1388 
 
1389 
        snd_azf3328_dbgcallenter();
1390 
        chip->capture_substream = NULL;
1391 
        snd_azf3328_dbgcallleave();
1392 
        return 0;
1393 
}
1394 
 
1395 
/******************************************************************/
1396 
 
1397 
static struct snd_pcm_ops snd_azf3328_playback_ops = {
1398 
        .open =         snd_azf3328_playback_open,
1399 
        .close =        snd_azf3328_playback_close,
1400 
        .ioctl =        snd_pcm_lib_ioctl,
1401 
        .hw_params =    snd_azf3328_hw_params,
1402 
        .hw_free =      snd_azf3328_hw_free,
1403 
        .prepare =      snd_azf3328_playback_prepare,
1404 
        .trigger =      snd_azf3328_playback_trigger,
1405 
        .pointer =      snd_azf3328_playback_pointer
1406 
};
1407 
 
1408 
static struct snd_pcm_ops snd_azf3328_capture_ops = {
1409 
        .open =         snd_azf3328_capture_open,
1410 
        .close =        snd_azf3328_capture_close,
1411 
        .ioctl =        snd_pcm_lib_ioctl,
1412 
        .hw_params =    snd_azf3328_hw_params,
1413 
        .hw_free =      snd_azf3328_hw_free,
1414 
        .prepare =      snd_azf3328_capture_prepare,
1415 
        .trigger =      snd_azf3328_capture_trigger,
1416 
        .pointer =      snd_azf3328_capture_pointer
1417 
};
1418 
 
1419 
static int __devinit
1420 
snd_azf3328_pcm(struct snd_azf3328 *chip, int device)
1421 
{
1422 
        struct snd_pcm *pcm;
1423 
        int err;
1424 
 
1425 
        snd_azf3328_dbgcallenter();
1426 
        if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
1427 
                return err;
1428 
        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
1429 
        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
1430 
 
1431 
        pcm->private_data = chip;
1432 
        pcm->info_flags = 0;
1433 
        strcpy(pcm->name, chip->card->shortname);
1434 
        chip->pcm = pcm;
1435 
 
1436 
        snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1437 
                                              snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1438 
 
1439 
        snd_azf3328_dbgcallleave();
1440 
        return 0;
1441 
}
1442 
 
1443 
/******************************************************************/
1444 
 
1445 
#ifdef SUPPORT_JOYSTICK
1446 
static int __devinit
1447 
snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev)
1448 
{
1449 
        struct gameport *gp;
1450 
        struct resource *r;
1451 
 
1452 
        if (!joystick[dev])
1453 
                return -ENODEV;
1454 
 
1455 
        if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) {
1456 
                printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n");
1457 
                return -EBUSY;
1458 
        }
1459 
 
1460 
        chip->gameport = gp = gameport_allocate_port();
1461 
        if (!gp) {
1462 
                printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n");
1463 
                release_and_free_resource(r);
1464 
                return -ENOMEM;
1465 
        }
1466 
 
1467 
        gameport_set_name(gp, "AZF3328 Gameport");
1468 
        gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1469 
        gameport_set_dev_parent(gp, &chip->pci->dev);
1470 
        gp->io = 0x200;
1471 
        gameport_set_port_data(gp, r);
1472 
 
1473 
        snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1474 
                              snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY);
1475 
 
1476 
        gameport_register_port(chip->gameport);
1477 
 
1478 
        return 0;
1479 
}
1480 
 
1481 
static void
1482 
snd_azf3328_free_joystick(struct snd_azf3328 *chip)
1483 
{
1484 
        if (chip->gameport) {
1485 
                struct resource *r = gameport_get_port_data(chip->gameport);
1486 
 
1487 
                gameport_unregister_port(chip->gameport);
1488 
                chip->gameport = NULL;
1489 
                /* disable gameport */
1490 
                snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1491 
                                      snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1492 
                release_and_free_resource(r);
1493 
        }
1494 
}
1495 
#else
1496 
static inline int
1497 
snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) { return -ENOSYS; }
1498 
static inline void
1499 
snd_azf3328_free_joystick(struct snd_azf3328 *chip) { }
1500 
#endif
1501 
 
1502 
/******************************************************************/
1503 
 
1504 
static int
1505 
snd_azf3328_free(struct snd_azf3328 *chip)
1506 
{
1507 
        if (chip->irq < 0)
1508 
                goto __end_hw;
1509 
 
1510 
        /* reset (close) mixer */
1511 
        snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
1512 
        snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
1513 
 
1514 
        /* interrupt setup - mask everything (FIXME!) */
1515 
        /* well, at least we know how to disable the timer IRQ */
1516 
        snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00);
1517 
 
1518 
        synchronize_irq(chip->irq);
1519 
__end_hw:
1520 
        snd_azf3328_free_joystick(chip);
1521 
        if (chip->irq >= 0)
1522 
                free_irq(chip->irq, chip);
1523 
        pci_release_regions(chip->pci);
1524 
        pci_disable_device(chip->pci);
1525 
 
1526 
        kfree(chip);
1527 
        return 0;
1528 
}
1529 
 
1530 
static int
1531 
snd_azf3328_dev_free(struct snd_device *device)
1532 
{
1533 
        struct snd_azf3328 *chip = device->device_data;
1534 
        return snd_azf3328_free(chip);
1535 
}
1536 
 
1537 
/******************************************************************/
1538 
 
1539 
/*** NOTE: the physical timer resolution actually is 1024000 ticks per second,
1540 
 *** but announcing those attributes to user-space would make programs
1541 
 *** configure the timer to a 1 tick value, resulting in an absolutely fatal
1542 
 *** timer IRQ storm.
1543 
 *** Thus I chose to announce a down-scaled virtual timer to the outside and
1544 
 *** calculate real timer countdown values internally.
1545 
 *** (the scale factor can be set via module parameter "seqtimer_scaling").
1546 
 ***/
1547 
 
1548 
static int
1549 
snd_azf3328_timer_start(struct snd_timer *timer)
1550 
{
1551 
        struct snd_azf3328 *chip;
1552 
        unsigned long flags;
1553 
        unsigned int delay;
1554 
 
1555 
        snd_azf3328_dbgcallenter();
1556 
        chip = snd_timer_chip(timer);
1557 
        delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK;
1558 
        if (delay < 49) {
1559 
                /* uhoh, that's not good, since user-space won't know about
1560 
                 * this timing tweak
1561 
                 * (we need to do it to avoid a lockup, though) */
1562 
 
1563 
                snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay);
1564 
                delay = 49; /* minimum time is 49 ticks */
1565 
        }
1566 
        snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay);
1567 
        delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ;
1568 
        spin_lock_irqsave(&chip->reg_lock, flags);
1569 
        snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay);
1570 
        spin_unlock_irqrestore(&chip->reg_lock, flags);
1571 
        snd_azf3328_dbgcallleave();
1572 
        return 0;
1573 
}
1574 
 
1575 
static int
1576 
snd_azf3328_timer_stop(struct snd_timer *timer)
1577 
{
1578 
        struct snd_azf3328 *chip;
1579 
        unsigned long flags;
1580 
 
1581 
        snd_azf3328_dbgcallenter();
1582 
        chip = snd_timer_chip(timer);
1583 
        spin_lock_irqsave(&chip->reg_lock, flags);
1584 
        /* disable timer countdown and interrupt */
1585 
        /* FIXME: should we write TIMER_ACK_IRQ here? */
1586 
        snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0);
1587 
        spin_unlock_irqrestore(&chip->reg_lock, flags);
1588 
        snd_azf3328_dbgcallleave();
1589 
        return 0;
1590 
}
1591 
 
1592 
 
1593 
static int
1594 
snd_azf3328_timer_precise_resolution(struct snd_timer *timer,
1595 
                                               unsigned long *num, unsigned long *den)
1596 
{
1597 
        snd_azf3328_dbgcallenter();
1598 
        *num = 1;
1599 
        *den = 1024000 / seqtimer_scaling;
1600 
        snd_azf3328_dbgcallleave();
1601 
        return 0;
1602 
}
1603 
 
1604 
static struct snd_timer_hardware snd_azf3328_timer_hw = {
1605 
        .flags = SNDRV_TIMER_HW_AUTO,
1606 
        .resolution = 977, /* 1000000/1024000 = 0.9765625us */
1607 
        .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */
1608 
        .start = snd_azf3328_timer_start,
1609 
        .stop = snd_azf3328_timer_stop,
1610 
        .precise_resolution = snd_azf3328_timer_precise_resolution,
1611 
};
1612 
 
1613 
static int __devinit
1614 
snd_azf3328_timer(struct snd_azf3328 *chip, int device)
1615 
{
1616 
        struct snd_timer *timer = NULL;
1617 
        struct snd_timer_id tid;
1618 
        int err;
1619 
 
1620 
        snd_azf3328_dbgcallenter();
1621 
        tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1622 
        tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1623 
        tid.card = chip->card->number;
1624 
        tid.device = device;
1625 
        tid.subdevice = 0;
1626 
 
1627 
        snd_azf3328_timer_hw.resolution *= seqtimer_scaling;
1628 
        snd_azf3328_timer_hw.ticks /= seqtimer_scaling;
1629 
        if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) {
1630 
                goto out;
1631 
        }
1632 
 
1633 
        strcpy(timer->name, "AZF3328 timer");
1634 
        timer->private_data = chip;
1635 
        timer->hw = snd_azf3328_timer_hw;
1636 
 
1637 
        chip->timer = timer;
1638 
 
1639 
        err = 0;
1640 
 
1641 
out:
1642 
        snd_azf3328_dbgcallleave();
1643 
        return err;
1644 
}
1645 
 
1646 
/******************************************************************/
1647 
 
1648 
#if 0
1649 
/* check whether a bit can be modified */
1650 
static void
1651 
snd_azf3328_test_bit(unsigned int reg, int bit)
1652 
{
1653 
        unsigned char val, valoff, valon;
1654 
 
1655 
        val = inb(reg);
1656 
 
1657 
        outb(val & ~(1 << bit), reg);
1658 
        valoff = inb(reg);
1659 
 
1660 
        outb(val|(1 << bit), reg);
1661 
        valon = inb(reg);
1662 
 
1663 
        outb(val, reg);
1664 
 
1665 
        printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
1666 
}
1667 
#endif
1668 
 
1669 
#if DEBUG_MISC
1670 
static void
1671 
snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip)
1672 
{
1673 
        u16 tmp;
1674 
 
1675 
        snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
1676 
 
1677 
        snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5));
1678 
 
1679 
        for (tmp=0; tmp <= 0x01; tmp += 1)
1680 
                snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
1681 
 
1682 
        for (tmp = 0; tmp < AZF_IO_SIZE_CODEC; tmp += 2)
1683 
                snd_azf3328_dbgmisc("codec 0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inw(chip, tmp));
1684 
 
1685 
        for (tmp = 0; tmp < AZF_IO_SIZE_MIXER; tmp += 2)
1686 
                snd_azf3328_dbgmisc("mixer 0x%02x: 0x%04x\n", tmp, snd_azf3328_mixer_inw(chip, tmp));
1687 
}
1688 
#else
1689 
static inline void
1690 
snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip) {}
1691 
#endif
1692 
 
1693 
static int __devinit
1694 
snd_azf3328_create(struct snd_card *card,
1695 
                                         struct pci_dev *pci,
1696 
                                         unsigned long device_type,
1697 
                                         struct snd_azf3328 ** rchip)
1698 
{
1699 
        struct snd_azf3328 *chip;
1700 
        int err;
1701 
        static struct snd_device_ops ops = {
1702 
                .dev_free =     snd_azf3328_dev_free,
1703 
        };
1704 
        u16 tmp;
1705 
 
1706 
        *rchip = NULL;
1707 
 
1708 
        if ((err = pci_enable_device(pci)) < 0)
1709 
                return err;
1710 
 
1711 
        chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1712 
        if (chip == NULL) {
1713 
                err = -ENOMEM;
1714 
                goto out_err;
1715 
        }
1716 
        spin_lock_init(&chip->reg_lock);
1717 
        chip->card = card;
1718 
        chip->pci = pci;
1719 
        chip->irq = -1;
1720 
 
1721 
        /* check if we can restrict PCI DMA transfers to 24 bits */
1722 
        if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
1723 
            pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
1724 
                snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
1725 
                err = -ENXIO;
1726 
                goto out_err;
1727 
        }
1728 
 
1729 
        if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
1730 
                goto out_err;
1731 
        }
1732 
 
1733 
        chip->codec_port = pci_resource_start(pci, 0);
1734 
        chip->io2_port   = pci_resource_start(pci, 1);
1735 
        chip->mpu_port   = pci_resource_start(pci, 2);
1736 
        chip->synth_port = pci_resource_start(pci, 3);
1737 
        chip->mixer_port = pci_resource_start(pci, 4);
1738 
 
1739 
        if (request_irq(pci->irq, snd_azf3328_interrupt,
1740 
                        IRQF_SHARED, card->shortname, chip)) {
1741 
                snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1742 
                err = -EBUSY;
1743 
                goto out_err;
1744 
        }
1745 
        chip->irq = pci->irq;
1746 
        pci_set_master(pci);
1747 
        synchronize_irq(chip->irq);
1748 
 
1749 
        snd_azf3328_debug_show_ports(chip);
1750 
 
1751 
        if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1752 
                goto out_err;
1753 
        }
1754 
 
1755 
        /* create mixer interface & switches */
1756 
        if ((err = snd_azf3328_mixer_new(chip)) < 0)
1757 
                goto out_err;
1758 
 
1759 
#if 0
1760 
        /* set very low bitrate to reduce noise and power consumption? */
1761 
        snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
1762 
#endif
1763 
 
1764 
        /* standard chip init stuff */
1765 
        /* default IRQ init value */
1766 
        tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE;
1767 
 
1768 
        spin_lock_irq(&chip->reg_lock);
1769 
        snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp);
1770 
        snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp);
1771 
        snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp);
1772 
        snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */
1773 
        spin_unlock_irq(&chip->reg_lock);
1774 
 
1775 
        snd_card_set_dev(card, &pci->dev);
1776 
 
1777 
        *rchip = chip;
1778 
 
1779 
        err = 0;
1780 
        goto out;
1781 
 
1782 
out_err:
1783 
        if (chip)
1784 
                snd_azf3328_free(chip);
1785 
        pci_disable_device(pci);
1786 
 
1787 
out:
1788 
        return err;
1789 
}
1790 
 
1791 
static int __devinit
1792 
snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1793 
{
1794 
        static int dev;
1795 
        struct snd_card *card;
1796 
        struct snd_azf3328 *chip;
1797 
        struct snd_opl3 *opl3;
1798 
        int err;
1799 
 
1800 
        snd_azf3328_dbgcallenter();
1801 
        if (dev >= SNDRV_CARDS)
1802 
                return -ENODEV;
1803 
        if (!enable[dev]) {
1804 
                dev++;
1805 
                return -ENOENT;
1806 
        }
1807 
 
1808 
        card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
1809 
        if (card == NULL)
1810 
                return -ENOMEM;
1811 
 
1812 
        strcpy(card->driver, "AZF3328");
1813 
        strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
1814 
 
1815 
        if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
1816 
                goto out_err;
1817 
        }
1818 
 
1819 
        card->private_data = chip;
1820 
 
1821 
        if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
1822 
                                        chip->mpu_port, MPU401_INFO_INTEGRATED,
1823 
                                        pci->irq, 0, &chip->rmidi)) < 0) {
1824 
                snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
1825 
                goto out_err;
1826 
        }
1827 
 
1828 
        if ((err = snd_azf3328_timer(chip, 0)) < 0) {
1829 
                goto out_err;
1830 
        }
1831 
 
1832 
        if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
1833 
                goto out_err;
1834 
        }
1835 
 
1836 
        if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
1837 
                            OPL3_HW_AUTO, 1, &opl3) < 0) {
1838 
                snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
1839 
                           chip->synth_port, chip->synth_port+2 );
1840 
        } else {
1841 
                if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1842 
                        goto out_err;
1843 
                }
1844 
        }
1845 
 
1846 
        opl3->private_data = chip;
1847 
 
1848 
        sprintf(card->longname, "%s at 0x%lx, irq %i",
1849 
                card->shortname, chip->codec_port, chip->irq);
1850 
 
1851 
        if ((err = snd_card_register(card)) < 0) {
1852 
                goto out_err;
1853 
        }
1854 
 
1855 
#ifdef MODULE
1856 
        printk(
1857 
"azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168.\n"
1858 
"azt3328: Hardware was completely undocumented, unfortunately.\n"
1859 
"azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n"
1860 
"azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n",
1861 
        1024000 / seqtimer_scaling, seqtimer_scaling);
1862 
#endif
1863 
 
1864 
        if (snd_azf3328_config_joystick(chip, dev) < 0)
1865 
                snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
1866 
                              snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1867 
 
1868 
        pci_set_drvdata(pci, card);
1869 
        dev++;
1870 
 
1871 
        err = 0;
1872 
        goto out;
1873 
 
1874 
out_err:
1875 
        snd_card_free(card);
1876 
 
1877 
out:
1878 
        snd_azf3328_dbgcallleave();
1879 
        return err;
1880 
}
1881 
 
1882 
static void __devexit
1883 
snd_azf3328_remove(struct pci_dev *pci)
1884 
{
1885 
        snd_azf3328_dbgcallenter();
1886 
        snd_card_free(pci_get_drvdata(pci));
1887 
        pci_set_drvdata(pci, NULL);
1888 
        snd_azf3328_dbgcallleave();
1889 
}
1890 
 
1891 
#ifdef CONFIG_PM
1892 
static int
1893 
snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state)
1894 
{
1895 
        struct snd_card *card = pci_get_drvdata(pci);
1896 
        struct snd_azf3328 *chip = card->private_data;
1897 
        int reg;
1898 
 
1899 
        snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1900 
 
1901 
        snd_pcm_suspend_all(chip->pcm);
1902 
 
1903 
        for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++)
1904 
                chip->saved_regs_mixer[reg] = inw(chip->mixer_port + reg * 2);
1905 
 
1906 
        /* make sure to disable master volume etc. to prevent looping sound */
1907 
        snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1);
1908 
        snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
1909 
 
1910 
        for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++)
1911 
                chip->saved_regs_codec[reg] = inw(chip->codec_port + reg * 2);
1912 
        for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++)
1913 
                chip->saved_regs_io2[reg] = inw(chip->io2_port + reg * 2);
1914 
        for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++)
1915 
                chip->saved_regs_mpu[reg] = inw(chip->mpu_port + reg * 2);
1916 
        for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++)
1917 
                chip->saved_regs_synth[reg] = inw(chip->synth_port + reg * 2);
1918 
 
1919 
        pci_disable_device(pci);
1920 
        pci_save_state(pci);
1921 
        pci_set_power_state(pci, pci_choose_state(pci, state));
1922 
        return 0;
1923 
}
1924 
 
1925 
static int
1926 
snd_azf3328_resume(struct pci_dev *pci)
1927 
{
1928 
        struct snd_card *card = pci_get_drvdata(pci);
1929 
        struct snd_azf3328 *chip = card->private_data;
1930 
        int reg;
1931 
 
1932 
        pci_set_power_state(pci, PCI_D0);
1933 
        pci_restore_state(pci);
1934 
        if (pci_enable_device(pci) < 0) {
1935 
                printk(KERN_ERR "azt3328: pci_enable_device failed, "
1936 
                       "disabling device\n");
1937 
                snd_card_disconnect(card);
1938 
                return -EIO;
1939 
        }
1940 
        pci_set_master(pci);
1941 
 
1942 
        for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++)
1943 
                outw(chip->saved_regs_io2[reg], chip->io2_port + reg * 2);
1944 
        for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++)
1945 
                outw(chip->saved_regs_mpu[reg], chip->mpu_port + reg * 2);
1946 
        for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++)
1947 
                outw(chip->saved_regs_synth[reg], chip->synth_port + reg * 2);
1948 
        for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++)
1949 
                outw(chip->saved_regs_mixer[reg], chip->mixer_port + reg * 2);
1950 
        for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++)
1951 
                outw(chip->saved_regs_codec[reg], chip->codec_port + reg * 2);
1952 
 
1953 
        snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1954 
        return 0;
1955 
}
1956 
#endif
1957 
 
1958 
 
1959 
 
1960 
 
1961 
static struct pci_driver driver = {
1962 
        .name = "AZF3328",
1963 
        .id_table = snd_azf3328_ids,
1964 
        .probe = snd_azf3328_probe,
1965 
        .remove = __devexit_p(snd_azf3328_remove),
1966 
#ifdef CONFIG_PM
1967 
        .suspend = snd_azf3328_suspend,
1968 
        .resume = snd_azf3328_resume,
1969 
#endif
1970 
};
1971 
 
1972 
static int __init
1973 
alsa_card_azf3328_init(void)
1974 
{
1975 
        int err;
1976 
        snd_azf3328_dbgcallenter();
1977 
        err = pci_register_driver(&driver);
1978 
        snd_azf3328_dbgcallleave();
1979 
        return err;
1980 
}
1981 
 
1982 
static void __exit
1983 
alsa_card_azf3328_exit(void)
1984 
{
1985 
        snd_azf3328_dbgcallenter();
1986 
        pci_unregister_driver(&driver);
1987 
        snd_azf3328_dbgcallleave();
1988 
}
1989 
 
1990 
module_init(alsa_card_azf3328_init)
1991 
module_exit(alsa_card_azf3328_exit)

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