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marcus.erl |
/*
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* ALSA driver for ICEnsemble ICE1712 (Envy24)
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*
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* Lowlevel functions for M-Audio Delta 1010, 44, 66, Dio2496, Audiophile
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* Digigram VX442
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*
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* Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <sound/driver.h>
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#include <asm/io.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/mutex.h>
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#include <sound/core.h>
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#include <sound/cs8427.h>
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#include <sound/asoundef.h>
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#include "ice1712.h"
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#include "delta.h"
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#define SND_CS8403
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#include <sound/cs8403.h>
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/*
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* CS8427 via SPI mode (for Audiophile), emulated I2C
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*/
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48 |
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/* send 8 bits */
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static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
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{
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int idx;
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for (idx = 7; idx >= 0; idx--) {
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tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
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if (data & (1 << idx))
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tmp |= ICE1712_DELTA_AP_DOUT;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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udelay(5);
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tmp |= ICE1712_DELTA_AP_CCLK;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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udelay(5);
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}
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}
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/* read 8 bits */
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static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
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{
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unsigned char data = 0;
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int idx;
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for (idx = 7; idx >= 0; idx--) {
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tmp &= ~ICE1712_DELTA_AP_CCLK;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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udelay(5);
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if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
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data |= 1 << idx;
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tmp |= ICE1712_DELTA_AP_CCLK;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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udelay(5);
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}
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return data;
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}
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/* assert chip select */
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static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
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{
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unsigned char tmp;
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tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
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switch (ice->eeprom.subvendor) {
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case ICE1712_SUBDEVICE_DELTA1010LT:
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tmp &= ~ICE1712_DELTA_1010LT_CS;
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tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
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break;
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case ICE1712_SUBDEVICE_AUDIOPHILE:
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case ICE1712_SUBDEVICE_DELTA410:
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tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
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tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
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break;
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case ICE1712_SUBDEVICE_VX442:
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tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
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tmp &= ~ICE1712_VX442_CS_DIGITAL;
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break;
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}
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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udelay(5);
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return tmp;
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}
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/* deassert chip select */
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static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
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{
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switch (ice->eeprom.subvendor) {
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case ICE1712_SUBDEVICE_DELTA1010LT:
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tmp &= ~ICE1712_DELTA_1010LT_CS;
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tmp |= ICE1712_DELTA_1010LT_CS_NONE;
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break;
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case ICE1712_SUBDEVICE_AUDIOPHILE:
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case ICE1712_SUBDEVICE_DELTA410:
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tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
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break;
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case ICE1712_SUBDEVICE_VX442:
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tmp |= ICE1712_VX442_CS_DIGITAL;
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break;
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}
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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}
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/* sequential write */
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static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
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{
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struct snd_ice1712 *ice = device->bus->private_data;
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int res = count;
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unsigned char tmp;
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mutex_lock(&ice->gpio_mutex);
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tmp = ap_cs8427_codec_select(ice);
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ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
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while (count-- > 0)
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ap_cs8427_write_byte(ice, *bytes++, tmp);
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ap_cs8427_codec_deassert(ice, tmp);
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mutex_unlock(&ice->gpio_mutex);
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return res;
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}
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/* sequential read */
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static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
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{
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struct snd_ice1712 *ice = device->bus->private_data;
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int res = count;
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unsigned char tmp;
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mutex_lock(&ice->gpio_mutex);
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tmp = ap_cs8427_codec_select(ice);
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ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
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while (count-- > 0)
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*bytes++ = ap_cs8427_read_byte(ice, tmp);
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ap_cs8427_codec_deassert(ice, tmp);
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mutex_unlock(&ice->gpio_mutex);
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return res;
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}
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static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
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{
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if (addr == 0x10)
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return 1;
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return -ENOENT;
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}
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static struct snd_i2c_ops ap_cs8427_i2c_ops = {
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.sendbytes = ap_cs8427_sendbytes,
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.readbytes = ap_cs8427_readbytes,
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.probeaddr = ap_cs8427_probeaddr,
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};
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/*
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*/
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static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
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{
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unsigned char tmp, mask1, mask2;
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int idx;
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/* send byte to transmitter */
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mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
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mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
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mutex_lock(&ice->gpio_mutex);
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tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
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for (idx = 7; idx >= 0; idx--) {
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tmp &= ~(mask1 | mask2);
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if (bits & (1 << idx))
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tmp |= mask2;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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udelay(100);
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tmp |= mask1;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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udelay(100);
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}
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tmp &= ~mask1;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
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mutex_unlock(&ice->gpio_mutex);
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}
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static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
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{
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snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
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}
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208 |
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static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
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{
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unsigned int val;
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int change;
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val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
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spin_lock_irq(&ice->reg_lock);
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change = ice->spdif.cs8403_bits != val;
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ice->spdif.cs8403_bits = val;
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if (change && ice->playback_pro_substream == NULL) {
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spin_unlock_irq(&ice->reg_lock);
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snd_ice1712_delta_cs8403_spdif_write(ice, val);
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} else {
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spin_unlock_irq(&ice->reg_lock);
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}
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return change;
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}
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225 |
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static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
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{
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snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
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}
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230 |
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231 |
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static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
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{
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233 |
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unsigned int val;
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234 |
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int change;
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val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
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spin_lock_irq(&ice->reg_lock);
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change = ice->spdif.cs8403_stream_bits != val;
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ice->spdif.cs8403_stream_bits = val;
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if (change && ice->playback_pro_substream != NULL) {
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spin_unlock_irq(&ice->reg_lock);
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snd_ice1712_delta_cs8403_spdif_write(ice, val);
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} else {
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spin_unlock_irq(&ice->reg_lock);
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}
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246 |
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return change;
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}
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248 |
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249 |
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250 |
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/*
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251 |
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* AK4524 on Delta 44 and 66 to choose the chip mask
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252 |
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*/
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253 |
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static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
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254 |
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{
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255 |
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struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
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256 |
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struct snd_ice1712 *ice = ak->private_data[0];
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257 |
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258 |
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snd_ice1712_save_gpio_status(ice);
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259 |
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priv->cs_mask =
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260 |
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priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
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ICE1712_DELTA_CODEC_CHIP_B;
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262 |
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}
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263 |
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|
264 |
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/*
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265 |
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* AK4524 on Delta1010LT to choose the chip address
|
266 |
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*/
|
267 |
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static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
|
268 |
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{
|
269 |
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struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
|
270 |
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struct snd_ice1712 *ice = ak->private_data[0];
|
271 |
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|
272 |
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snd_ice1712_save_gpio_status(ice);
|
273 |
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priv->cs_mask = ICE1712_DELTA_1010LT_CS;
|
274 |
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priv->cs_addr = chip << 4;
|
275 |
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}
|
276 |
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|
277 |
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/*
|
278 |
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* AK4528 on VX442 to choose the chip mask
|
279 |
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*/
|
280 |
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static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
|
281 |
|
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{
|
282 |
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struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
|
283 |
|
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struct snd_ice1712 *ice = ak->private_data[0];
|
284 |
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|
285 |
|
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snd_ice1712_save_gpio_status(ice);
|
286 |
|
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priv->cs_mask =
|
287 |
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priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
|
288 |
|
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ICE1712_VX442_CODEC_CHIP_B;
|
289 |
|
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}
|
290 |
|
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|
291 |
|
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/*
|
292 |
|
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* change the DFS bit according rate for Delta1010
|
293 |
|
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*/
|
294 |
|
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static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
|
295 |
|
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{
|
296 |
|
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unsigned char tmp, tmp2;
|
297 |
|
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|
298 |
|
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if (rate == 0) /* no hint - S/PDIF input is master, simply return */
|
299 |
|
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return;
|
300 |
|
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|
301 |
|
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mutex_lock(&ice->gpio_mutex);
|
302 |
|
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tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
|
303 |
|
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tmp2 = tmp & ~ICE1712_DELTA_DFS;
|
304 |
|
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if (rate > 48000)
|
305 |
|
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tmp2 |= ICE1712_DELTA_DFS;
|
306 |
|
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if (tmp != tmp2)
|
307 |
|
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
|
308 |
|
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mutex_unlock(&ice->gpio_mutex);
|
309 |
|
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}
|
310 |
|
|
|
311 |
|
|
/*
|
312 |
|
|
* change the rate of AK4524 on Delta 44/66, AP, 1010LT
|
313 |
|
|
*/
|
314 |
|
|
static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
|
315 |
|
|
{
|
316 |
|
|
unsigned char tmp, tmp2;
|
317 |
|
|
struct snd_ice1712 *ice = ak->private_data[0];
|
318 |
|
|
|
319 |
|
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if (rate == 0) /* no hint - S/PDIF input is master, simply return */
|
320 |
|
|
return;
|
321 |
|
|
|
322 |
|
|
/* check before reset ak4524 to avoid unnecessary clicks */
|
323 |
|
|
mutex_lock(&ice->gpio_mutex);
|
324 |
|
|
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
|
325 |
|
|
mutex_unlock(&ice->gpio_mutex);
|
326 |
|
|
tmp2 = tmp & ~ICE1712_DELTA_DFS;
|
327 |
|
|
if (rate > 48000)
|
328 |
|
|
tmp2 |= ICE1712_DELTA_DFS;
|
329 |
|
|
if (tmp == tmp2)
|
330 |
|
|
return;
|
331 |
|
|
|
332 |
|
|
/* do it again */
|
333 |
|
|
snd_akm4xxx_reset(ak, 1);
|
334 |
|
|
mutex_lock(&ice->gpio_mutex);
|
335 |
|
|
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
|
336 |
|
|
if (rate > 48000)
|
337 |
|
|
tmp |= ICE1712_DELTA_DFS;
|
338 |
|
|
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
|
339 |
|
|
mutex_unlock(&ice->gpio_mutex);
|
340 |
|
|
snd_akm4xxx_reset(ak, 0);
|
341 |
|
|
}
|
342 |
|
|
|
343 |
|
|
/*
|
344 |
|
|
* change the rate of AK4524 on VX442
|
345 |
|
|
*/
|
346 |
|
|
static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
|
347 |
|
|
{
|
348 |
|
|
unsigned char val;
|
349 |
|
|
|
350 |
|
|
val = (rate > 48000) ? 0x65 : 0x60;
|
351 |
|
|
if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
|
352 |
|
|
snd_akm4xxx_get(ak, 1, 0x02) != val) {
|
353 |
|
|
snd_akm4xxx_reset(ak, 1);
|
354 |
|
|
snd_akm4xxx_write(ak, 0, 0x02, val);
|
355 |
|
|
snd_akm4xxx_write(ak, 1, 0x02, val);
|
356 |
|
|
snd_akm4xxx_reset(ak, 0);
|
357 |
|
|
}
|
358 |
|
|
}
|
359 |
|
|
|
360 |
|
|
|
361 |
|
|
/*
|
362 |
|
|
* SPDIF ops for Delta 1010, Dio, 66
|
363 |
|
|
*/
|
364 |
|
|
|
365 |
|
|
/* open callback */
|
366 |
|
|
static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
|
367 |
|
|
{
|
368 |
|
|
ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
|
369 |
|
|
}
|
370 |
|
|
|
371 |
|
|
/* set up */
|
372 |
|
|
static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
|
373 |
|
|
{
|
374 |
|
|
unsigned long flags;
|
375 |
|
|
unsigned int tmp;
|
376 |
|
|
int change;
|
377 |
|
|
|
378 |
|
|
spin_lock_irqsave(&ice->reg_lock, flags);
|
379 |
|
|
tmp = ice->spdif.cs8403_stream_bits;
|
380 |
|
|
if (tmp & 0x01) /* consumer */
|
381 |
|
|
tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
|
382 |
|
|
switch (rate) {
|
383 |
|
|
case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
|
384 |
|
|
case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
|
385 |
|
|
case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
|
386 |
|
|
default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
|
387 |
|
|
}
|
388 |
|
|
change = ice->spdif.cs8403_stream_bits != tmp;
|
389 |
|
|
ice->spdif.cs8403_stream_bits = tmp;
|
390 |
|
|
spin_unlock_irqrestore(&ice->reg_lock, flags);
|
391 |
|
|
if (change)
|
392 |
|
|
snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
|
393 |
|
|
snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
|
394 |
|
|
}
|
395 |
|
|
|
396 |
|
|
#define snd_ice1712_delta1010lt_wordclock_status_info \
|
397 |
|
|
snd_ctl_boolean_mono_info
|
398 |
|
|
|
399 |
|
|
static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
|
400 |
|
|
struct snd_ctl_elem_value *ucontrol)
|
401 |
|
|
{
|
402 |
|
|
char reg = 0x10; // cs8427 receiver error register
|
403 |
|
|
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
|
404 |
|
|
|
405 |
|
|
if (snd_i2c_sendbytes(ice->cs8427, ®, 1) != 1)
|
406 |
|
|
snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
|
407 |
|
|
snd_i2c_readbytes(ice->cs8427, ®, 1);
|
408 |
|
|
ucontrol->value.integer.value[0] = (reg ? 1 : 0);
|
409 |
|
|
return 0;
|
410 |
|
|
}
|
411 |
|
|
|
412 |
|
|
static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status __devinitdata =
|
413 |
|
|
{
|
414 |
|
|
.access = (SNDRV_CTL_ELEM_ACCESS_READ),
|
415 |
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
416 |
|
|
.name = "Word Clock Status",
|
417 |
|
|
.info = snd_ice1712_delta1010lt_wordclock_status_info,
|
418 |
|
|
.get = snd_ice1712_delta1010lt_wordclock_status_get,
|
419 |
|
|
};
|
420 |
|
|
|
421 |
|
|
/*
|
422 |
|
|
* initialize the chips on M-Audio cards
|
423 |
|
|
*/
|
424 |
|
|
|
425 |
|
|
static struct snd_akm4xxx akm_audiophile __devinitdata = {
|
426 |
|
|
.type = SND_AK4528,
|
427 |
|
|
.num_adcs = 2,
|
428 |
|
|
.num_dacs = 2,
|
429 |
|
|
.ops = {
|
430 |
|
|
.set_rate_val = delta_ak4524_set_rate_val
|
431 |
|
|
}
|
432 |
|
|
};
|
433 |
|
|
|
434 |
|
|
static struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = {
|
435 |
|
|
.caddr = 2,
|
436 |
|
|
.cif = 0,
|
437 |
|
|
.data_mask = ICE1712_DELTA_AP_DOUT,
|
438 |
|
|
.clk_mask = ICE1712_DELTA_AP_CCLK,
|
439 |
|
|
.cs_mask = ICE1712_DELTA_AP_CS_CODEC,
|
440 |
|
|
.cs_addr = ICE1712_DELTA_AP_CS_CODEC,
|
441 |
|
|
.cs_none = 0,
|
442 |
|
|
.add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
|
443 |
|
|
.mask_flags = 0,
|
444 |
|
|
};
|
445 |
|
|
|
446 |
|
|
static struct snd_akm4xxx akm_delta410 __devinitdata = {
|
447 |
|
|
.type = SND_AK4529,
|
448 |
|
|
.num_adcs = 2,
|
449 |
|
|
.num_dacs = 8,
|
450 |
|
|
.ops = {
|
451 |
|
|
.set_rate_val = delta_ak4524_set_rate_val
|
452 |
|
|
}
|
453 |
|
|
};
|
454 |
|
|
|
455 |
|
|
static struct snd_ak4xxx_private akm_delta410_priv __devinitdata = {
|
456 |
|
|
.caddr = 0,
|
457 |
|
|
.cif = 0,
|
458 |
|
|
.data_mask = ICE1712_DELTA_AP_DOUT,
|
459 |
|
|
.clk_mask = ICE1712_DELTA_AP_CCLK,
|
460 |
|
|
.cs_mask = ICE1712_DELTA_AP_CS_CODEC,
|
461 |
|
|
.cs_addr = ICE1712_DELTA_AP_CS_CODEC,
|
462 |
|
|
.cs_none = 0,
|
463 |
|
|
.add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
|
464 |
|
|
.mask_flags = 0,
|
465 |
|
|
};
|
466 |
|
|
|
467 |
|
|
static struct snd_akm4xxx akm_delta1010lt __devinitdata = {
|
468 |
|
|
.type = SND_AK4524,
|
469 |
|
|
.num_adcs = 8,
|
470 |
|
|
.num_dacs = 8,
|
471 |
|
|
.ops = {
|
472 |
|
|
.lock = delta1010lt_ak4524_lock,
|
473 |
|
|
.set_rate_val = delta_ak4524_set_rate_val
|
474 |
|
|
}
|
475 |
|
|
};
|
476 |
|
|
|
477 |
|
|
static struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = {
|
478 |
|
|
.caddr = 2,
|
479 |
|
|
.cif = 0, /* the default level of the CIF pin from AK4524 */
|
480 |
|
|
.data_mask = ICE1712_DELTA_1010LT_DOUT,
|
481 |
|
|
.clk_mask = ICE1712_DELTA_1010LT_CCLK,
|
482 |
|
|
.cs_mask = 0,
|
483 |
|
|
.cs_addr = 0, /* set later */
|
484 |
|
|
.cs_none = ICE1712_DELTA_1010LT_CS_NONE,
|
485 |
|
|
.add_flags = 0,
|
486 |
|
|
.mask_flags = 0,
|
487 |
|
|
};
|
488 |
|
|
|
489 |
|
|
static struct snd_akm4xxx akm_delta44 __devinitdata = {
|
490 |
|
|
.type = SND_AK4524,
|
491 |
|
|
.num_adcs = 4,
|
492 |
|
|
.num_dacs = 4,
|
493 |
|
|
.ops = {
|
494 |
|
|
.lock = delta_ak4524_lock,
|
495 |
|
|
.set_rate_val = delta_ak4524_set_rate_val
|
496 |
|
|
}
|
497 |
|
|
};
|
498 |
|
|
|
499 |
|
|
static struct snd_ak4xxx_private akm_delta44_priv __devinitdata = {
|
500 |
|
|
.caddr = 2,
|
501 |
|
|
.cif = 0, /* the default level of the CIF pin from AK4524 */
|
502 |
|
|
.data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
|
503 |
|
|
.clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
|
504 |
|
|
.cs_mask = 0,
|
505 |
|
|
.cs_addr = 0, /* set later */
|
506 |
|
|
.cs_none = 0,
|
507 |
|
|
.add_flags = 0,
|
508 |
|
|
.mask_flags = 0,
|
509 |
|
|
};
|
510 |
|
|
|
511 |
|
|
static struct snd_akm4xxx akm_vx442 __devinitdata = {
|
512 |
|
|
.type = SND_AK4524,
|
513 |
|
|
.num_adcs = 4,
|
514 |
|
|
.num_dacs = 4,
|
515 |
|
|
.ops = {
|
516 |
|
|
.lock = vx442_ak4524_lock,
|
517 |
|
|
.set_rate_val = vx442_ak4524_set_rate_val
|
518 |
|
|
}
|
519 |
|
|
};
|
520 |
|
|
|
521 |
|
|
static struct snd_ak4xxx_private akm_vx442_priv __devinitdata = {
|
522 |
|
|
.caddr = 2,
|
523 |
|
|
.cif = 0,
|
524 |
|
|
.data_mask = ICE1712_VX442_DOUT,
|
525 |
|
|
.clk_mask = ICE1712_VX442_CCLK,
|
526 |
|
|
.cs_mask = 0,
|
527 |
|
|
.cs_addr = 0, /* set later */
|
528 |
|
|
.cs_none = 0,
|
529 |
|
|
.add_flags = 0,
|
530 |
|
|
.mask_flags = 0,
|
531 |
|
|
};
|
532 |
|
|
|
533 |
|
|
static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice)
|
534 |
|
|
{
|
535 |
|
|
int err;
|
536 |
|
|
struct snd_akm4xxx *ak;
|
537 |
|
|
|
538 |
|
|
/* determine I2C, DACs and ADCs */
|
539 |
|
|
switch (ice->eeprom.subvendor) {
|
540 |
|
|
case ICE1712_SUBDEVICE_AUDIOPHILE:
|
541 |
|
|
ice->num_total_dacs = 2;
|
542 |
|
|
ice->num_total_adcs = 2;
|
543 |
|
|
break;
|
544 |
|
|
case ICE1712_SUBDEVICE_DELTA410:
|
545 |
|
|
ice->num_total_dacs = 8;
|
546 |
|
|
ice->num_total_adcs = 2;
|
547 |
|
|
break;
|
548 |
|
|
case ICE1712_SUBDEVICE_DELTA44:
|
549 |
|
|
case ICE1712_SUBDEVICE_DELTA66:
|
550 |
|
|
ice->num_total_dacs = ice->omni ? 8 : 4;
|
551 |
|
|
ice->num_total_adcs = ice->omni ? 8 : 4;
|
552 |
|
|
break;
|
553 |
|
|
case ICE1712_SUBDEVICE_DELTA1010:
|
554 |
|
|
case ICE1712_SUBDEVICE_DELTA1010LT:
|
555 |
|
|
case ICE1712_SUBDEVICE_MEDIASTATION:
|
556 |
|
|
ice->num_total_dacs = 8;
|
557 |
|
|
ice->num_total_adcs = 8;
|
558 |
|
|
break;
|
559 |
|
|
case ICE1712_SUBDEVICE_DELTADIO2496:
|
560 |
|
|
ice->num_total_dacs = 4; /* two AK4324 codecs */
|
561 |
|
|
break;
|
562 |
|
|
case ICE1712_SUBDEVICE_VX442:
|
563 |
|
|
ice->num_total_dacs = 4;
|
564 |
|
|
ice->num_total_adcs = 4;
|
565 |
|
|
break;
|
566 |
|
|
}
|
567 |
|
|
|
568 |
|
|
/* initialize spdif */
|
569 |
|
|
switch (ice->eeprom.subvendor) {
|
570 |
|
|
case ICE1712_SUBDEVICE_AUDIOPHILE:
|
571 |
|
|
case ICE1712_SUBDEVICE_DELTA410:
|
572 |
|
|
case ICE1712_SUBDEVICE_DELTA1010LT:
|
573 |
|
|
case ICE1712_SUBDEVICE_VX442:
|
574 |
|
|
if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) {
|
575 |
|
|
snd_printk(KERN_ERR "unable to create I2C bus\n");
|
576 |
|
|
return err;
|
577 |
|
|
}
|
578 |
|
|
ice->i2c->private_data = ice;
|
579 |
|
|
ice->i2c->ops = &ap_cs8427_i2c_ops;
|
580 |
|
|
if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0)
|
581 |
|
|
return err;
|
582 |
|
|
break;
|
583 |
|
|
case ICE1712_SUBDEVICE_DELTA1010:
|
584 |
|
|
case ICE1712_SUBDEVICE_MEDIASTATION:
|
585 |
|
|
ice->gpio.set_pro_rate = delta_1010_set_rate_val;
|
586 |
|
|
break;
|
587 |
|
|
case ICE1712_SUBDEVICE_DELTADIO2496:
|
588 |
|
|
ice->gpio.set_pro_rate = delta_1010_set_rate_val;
|
589 |
|
|
/* fall thru */
|
590 |
|
|
case ICE1712_SUBDEVICE_DELTA66:
|
591 |
|
|
ice->spdif.ops.open = delta_open_spdif;
|
592 |
|
|
ice->spdif.ops.setup_rate = delta_setup_spdif;
|
593 |
|
|
ice->spdif.ops.default_get = delta_spdif_default_get;
|
594 |
|
|
ice->spdif.ops.default_put = delta_spdif_default_put;
|
595 |
|
|
ice->spdif.ops.stream_get = delta_spdif_stream_get;
|
596 |
|
|
ice->spdif.ops.stream_put = delta_spdif_stream_put;
|
597 |
|
|
/* Set spdif defaults */
|
598 |
|
|
snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
|
599 |
|
|
break;
|
600 |
|
|
}
|
601 |
|
|
|
602 |
|
|
/* no analog? */
|
603 |
|
|
switch (ice->eeprom.subvendor) {
|
604 |
|
|
case ICE1712_SUBDEVICE_DELTA1010:
|
605 |
|
|
case ICE1712_SUBDEVICE_DELTADIO2496:
|
606 |
|
|
case ICE1712_SUBDEVICE_MEDIASTATION:
|
607 |
|
|
return 0;
|
608 |
|
|
}
|
609 |
|
|
|
610 |
|
|
/* second stage of initialization, analog parts and others */
|
611 |
|
|
ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
|
612 |
|
|
if (! ak)
|
613 |
|
|
return -ENOMEM;
|
614 |
|
|
ice->akm_codecs = 1;
|
615 |
|
|
|
616 |
|
|
switch (ice->eeprom.subvendor) {
|
617 |
|
|
case ICE1712_SUBDEVICE_AUDIOPHILE:
|
618 |
|
|
err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
|
619 |
|
|
break;
|
620 |
|
|
case ICE1712_SUBDEVICE_DELTA410:
|
621 |
|
|
err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
|
622 |
|
|
break;
|
623 |
|
|
case ICE1712_SUBDEVICE_DELTA1010LT:
|
624 |
|
|
err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
|
625 |
|
|
break;
|
626 |
|
|
case ICE1712_SUBDEVICE_DELTA66:
|
627 |
|
|
case ICE1712_SUBDEVICE_DELTA44:
|
628 |
|
|
err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
|
629 |
|
|
break;
|
630 |
|
|
case ICE1712_SUBDEVICE_VX442:
|
631 |
|
|
err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
|
632 |
|
|
break;
|
633 |
|
|
default:
|
634 |
|
|
snd_BUG();
|
635 |
|
|
return -EINVAL;
|
636 |
|
|
}
|
637 |
|
|
|
638 |
|
|
return err;
|
639 |
|
|
}
|
640 |
|
|
|
641 |
|
|
|
642 |
|
|
/*
|
643 |
|
|
* additional controls for M-Audio cards
|
644 |
|
|
*/
|
645 |
|
|
|
646 |
|
|
static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata =
|
647 |
|
|
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
|
648 |
|
|
static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata =
|
649 |
|
|
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
|
650 |
|
|
static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata =
|
651 |
|
|
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
|
652 |
|
|
static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata =
|
653 |
|
|
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
|
654 |
|
|
static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata =
|
655 |
|
|
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
|
656 |
|
|
|
657 |
|
|
|
658 |
|
|
static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
|
659 |
|
|
{
|
660 |
|
|
int err;
|
661 |
|
|
|
662 |
|
|
/* 1010 and dio specific controls */
|
663 |
|
|
switch (ice->eeprom.subvendor) {
|
664 |
|
|
case ICE1712_SUBDEVICE_DELTA1010:
|
665 |
|
|
case ICE1712_SUBDEVICE_MEDIASTATION:
|
666 |
|
|
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
|
667 |
|
|
if (err < 0)
|
668 |
|
|
return err;
|
669 |
|
|
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
|
670 |
|
|
if (err < 0)
|
671 |
|
|
return err;
|
672 |
|
|
break;
|
673 |
|
|
case ICE1712_SUBDEVICE_DELTADIO2496:
|
674 |
|
|
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
|
675 |
|
|
if (err < 0)
|
676 |
|
|
return err;
|
677 |
|
|
break;
|
678 |
|
|
case ICE1712_SUBDEVICE_DELTA1010LT:
|
679 |
|
|
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
|
680 |
|
|
if (err < 0)
|
681 |
|
|
return err;
|
682 |
|
|
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
|
683 |
|
|
if (err < 0)
|
684 |
|
|
return err;
|
685 |
|
|
break;
|
686 |
|
|
}
|
687 |
|
|
|
688 |
|
|
/* normal spdif controls */
|
689 |
|
|
switch (ice->eeprom.subvendor) {
|
690 |
|
|
case ICE1712_SUBDEVICE_DELTA1010:
|
691 |
|
|
case ICE1712_SUBDEVICE_DELTADIO2496:
|
692 |
|
|
case ICE1712_SUBDEVICE_DELTA66:
|
693 |
|
|
case ICE1712_SUBDEVICE_MEDIASTATION:
|
694 |
|
|
err = snd_ice1712_spdif_build_controls(ice);
|
695 |
|
|
if (err < 0)
|
696 |
|
|
return err;
|
697 |
|
|
break;
|
698 |
|
|
}
|
699 |
|
|
|
700 |
|
|
/* spdif status in */
|
701 |
|
|
switch (ice->eeprom.subvendor) {
|
702 |
|
|
case ICE1712_SUBDEVICE_DELTA1010:
|
703 |
|
|
case ICE1712_SUBDEVICE_DELTADIO2496:
|
704 |
|
|
case ICE1712_SUBDEVICE_DELTA66:
|
705 |
|
|
case ICE1712_SUBDEVICE_MEDIASTATION:
|
706 |
|
|
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
|
707 |
|
|
if (err < 0)
|
708 |
|
|
return err;
|
709 |
|
|
break;
|
710 |
|
|
}
|
711 |
|
|
|
712 |
|
|
/* ak4524 controls */
|
713 |
|
|
switch (ice->eeprom.subvendor) {
|
714 |
|
|
case ICE1712_SUBDEVICE_DELTA1010LT:
|
715 |
|
|
case ICE1712_SUBDEVICE_AUDIOPHILE:
|
716 |
|
|
case ICE1712_SUBDEVICE_DELTA410:
|
717 |
|
|
case ICE1712_SUBDEVICE_DELTA44:
|
718 |
|
|
case ICE1712_SUBDEVICE_DELTA66:
|
719 |
|
|
case ICE1712_SUBDEVICE_VX442:
|
720 |
|
|
err = snd_ice1712_akm4xxx_build_controls(ice);
|
721 |
|
|
if (err < 0)
|
722 |
|
|
return err;
|
723 |
|
|
break;
|
724 |
|
|
}
|
725 |
|
|
|
726 |
|
|
return 0;
|
727 |
|
|
}
|
728 |
|
|
|
729 |
|
|
|
730 |
|
|
/* entry point */
|
731 |
|
|
struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = {
|
732 |
|
|
{
|
733 |
|
|
.subvendor = ICE1712_SUBDEVICE_DELTA1010,
|
734 |
|
|
.name = "M Audio Delta 1010",
|
735 |
|
|
.model = "delta1010",
|
736 |
|
|
.chip_init = snd_ice1712_delta_init,
|
737 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
738 |
|
|
},
|
739 |
|
|
{
|
740 |
|
|
.subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
|
741 |
|
|
.name = "M Audio Delta DiO 2496",
|
742 |
|
|
.model = "dio2496",
|
743 |
|
|
.chip_init = snd_ice1712_delta_init,
|
744 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
745 |
|
|
.no_mpu401 = 1,
|
746 |
|
|
},
|
747 |
|
|
{
|
748 |
|
|
.subvendor = ICE1712_SUBDEVICE_DELTA66,
|
749 |
|
|
.name = "M Audio Delta 66",
|
750 |
|
|
.model = "delta66",
|
751 |
|
|
.chip_init = snd_ice1712_delta_init,
|
752 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
753 |
|
|
.no_mpu401 = 1,
|
754 |
|
|
},
|
755 |
|
|
{
|
756 |
|
|
.subvendor = ICE1712_SUBDEVICE_DELTA44,
|
757 |
|
|
.name = "M Audio Delta 44",
|
758 |
|
|
.model = "delta44",
|
759 |
|
|
.chip_init = snd_ice1712_delta_init,
|
760 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
761 |
|
|
.no_mpu401 = 1,
|
762 |
|
|
},
|
763 |
|
|
{
|
764 |
|
|
.subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
|
765 |
|
|
.name = "M Audio Audiophile 24/96",
|
766 |
|
|
.model = "audiophile",
|
767 |
|
|
.chip_init = snd_ice1712_delta_init,
|
768 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
769 |
|
|
},
|
770 |
|
|
{
|
771 |
|
|
.subvendor = ICE1712_SUBDEVICE_DELTA410,
|
772 |
|
|
.name = "M Audio Delta 410",
|
773 |
|
|
.model = "delta410",
|
774 |
|
|
.chip_init = snd_ice1712_delta_init,
|
775 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
776 |
|
|
},
|
777 |
|
|
{
|
778 |
|
|
.subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
|
779 |
|
|
.name = "M Audio Delta 1010LT",
|
780 |
|
|
.model = "delta1010lt",
|
781 |
|
|
.chip_init = snd_ice1712_delta_init,
|
782 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
783 |
|
|
},
|
784 |
|
|
{
|
785 |
|
|
.subvendor = ICE1712_SUBDEVICE_VX442,
|
786 |
|
|
.name = "Digigram VX442",
|
787 |
|
|
.model = "vx442",
|
788 |
|
|
.chip_init = snd_ice1712_delta_init,
|
789 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
790 |
|
|
.no_mpu401 = 1,
|
791 |
|
|
},
|
792 |
|
|
{
|
793 |
|
|
.subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
|
794 |
|
|
.name = "Lionstracs Mediastation",
|
795 |
|
|
.model = "mediastation",
|
796 |
|
|
.chip_init = snd_ice1712_delta_init,
|
797 |
|
|
.build_controls = snd_ice1712_delta_add_controls,
|
798 |
|
|
},
|
799 |
|
|
{ } /* terminator */
|
800 |
|
|
};
|