URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [rtl/] [verilog/] [components/] [debug_if/] [Makefile] - Blame information for rev 18

Line No.	Rev	Author	Line
1	18	unneback	`dbg_if_ip:`
2			`vppp --simple dbg_crc32_d1.v dbg_register.v dbg_cpu_registers.v dbg_cpu.v dbg_wb.v dbg_top.v > dbg_top_ip.v`
3			`all: dbg_if_ip`