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[/] [theia_gpu/] [branches/] [beta_1.1/] [rtl/] [Collaterals/] [Module_Swizzle.v] - Blame information for rev 65

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Line No. Rev Author Line
1 38 diegovalve
`timescale 1ns / 1ps
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 `include "aDefinitions.v"
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 //---------------------------------------------------------------------------
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 module Swizzle3D
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(
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        input wire [`WIDTH-1:0] Source0_X,
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        input wire [`WIDTH-1:0] Source0_Y,
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        input wire [`WIDTH-1:0] Source0_Z,
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        input wire [`WIDTH-1:0] iOperation,
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        output reg [`WIDTH-1:0] SwizzleX,
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        output reg [`WIDTH-1:0] SwizzleY,
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        output reg [`WIDTH-1:0] SwizzleZ
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 );
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 //wire [31:0] SwizzleX,SwizzleY,SwizzleZ;
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 //-----------------------------------------------------
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 always @ ( * )
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 begin
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        case (iOperation)
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                        `SWIZZLE_XXX:   SwizzleX = Source0_X;
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                        `SWIZZLE_YYY:   SwizzleX = Source0_Y;
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                        `SWIZZLE_ZZZ:   SwizzleX = Source0_Z;
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                        `SWIZZLE_YXZ:   SwizzleX = Source0_Y;
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                        default:                SwizzleX =  `DATA_ROW_WIDTH'd0;
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        endcase
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end
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//-----------------------------------------------------
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 always @ ( * )
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 begin
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        case (iOperation)
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                        `SWIZZLE_XXX:   SwizzleY = Source0_X;
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                        `SWIZZLE_YYY:   SwizzleY = Source0_Y;
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                        `SWIZZLE_ZZZ:   SwizzleY = Source0_Z;
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                        `SWIZZLE_YXZ:  SwizzleY = Source0_X;
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                        default:                SwizzleY =  `DATA_ROW_WIDTH'd0;
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        endcase
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end
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//-----------------------------------------------------
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 always @ ( * )
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 begin
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        case (iOperation)
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                        `SWIZZLE_XXX:   SwizzleZ = Source0_X;
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                        `SWIZZLE_YYY:   SwizzleZ = Source0_Y;
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                        `SWIZZLE_ZZZ:   SwizzleZ = Source0_Z;
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                        `SWIZZLE_YXZ:  SwizzleZ = Source0_Z;
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                        default:                SwizzleZ =  `DATA_ROW_WIDTH'd0;
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        endcase
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 end
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 //-----------------------------------------------------
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 endmodule
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//---------------------------------------------------------------------------

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