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[/] [theia_gpu/] [branches/] [beta_1.2/] [rtl/] [EXE/] [Unit_EXE.v] - Blame information for rev 76

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`timescale 1ns / 1ps
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`include "aDefinitions.v"
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/**********************************************************************************
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Theia, Ray Cast Programable graphic Processing Unit.
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Copyright (C) 2010  Diego Valverde (diego.valverde.g@gmail.com)
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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***********************************************************************************/
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//---------------------------------------------------------------------
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module ExecutionUnit
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(
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input wire                             Clock,
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input wire                             Reset,
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input wire [`ROM_ADDRESS_WIDTH-1:0]         iInitialCodeAddress,
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input wire [`INSTRUCTION_WIDTH-1:0]      iInstruction1,
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input wire [`INSTRUCTION_WIDTH-1:0]      iInstruction2,
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input wire [`DATA_ROW_WIDTH-1:0]                 iDataRead0,
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input wire [`DATA_ROW_WIDTH-1:0]       iDataRead1,
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input wire                             iTrigger,
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output wire [`ROM_ADDRESS_WIDTH-1:0]     oInstructionPointer1,
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output wire [`ROM_ADDRESS_WIDTH-1:0]     oInstructionPointer2,
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output wire [`DATA_ADDRESS_WIDTH-1:0]    oDataReadAddress0,
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output wire [`DATA_ADDRESS_WIDTH-1:0]  oDataReadAddress1,
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output wire                                                                     oDataWriteEnable,
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output wire [`DATA_ADDRESS_WIDTH-1:0]    oDataWriteAddress,
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output wire [`DATA_ROW_WIDTH-1:0]                oDataBus,
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output wire                            oReturnCode,
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`ifdef DEBUG
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input wire [`MAX_CORES-1:0]            iDebug_CoreID,
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`endif
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output wire                            oDone
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);
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`ifdef DEBUG
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        wire [`ROM_ADDRESS_WIDTH-1:0] wDEBUG_IDU2_EXE_InstructionPointer;
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`endif
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wire                                                                            wEXE2__uCodeDone;
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wire                                                                            wEXE2_IFU__EXEBusy;
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wire [`DATA_ADDRESS_WIDTH-1:0]   wEXE2_IDU_DataFordward_LastDestination;
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wire                                                                            wALU2_EXE__BranchTaken;
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wire                                                                            wALU2_IFU_BranchNotTaken;
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wire [`INSTRUCTION_WIDTH-1:0]    CurrentInstruction;
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//wire                                                                          wIDU2_IFU__IDUBusy;
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wire [`INSTRUCTION_OP_LENGTH-1:0]                                wOperation;
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wire [`DATA_ROW_WIDTH-1:0] wSource0,wSource1;
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wire [`DATA_ADDRESS_WIDTH-1:0] wDestination;
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wire wInstructionAvailable;
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//ALU wires
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wire [`INSTRUCTION_OP_LENGTH-1:0]                ALU2Operation;
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wire [`WIDTH-1:0]                                        ALU2ChannelA;
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wire [`WIDTH-1:0]                                        ALU2ChannelB;
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wire [`WIDTH-1:0]                                        ALU2ChannelC;
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wire [`WIDTH-1:0]                                        ALU2ChannelD;
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wire [`WIDTH-1:0]                                        ALU2ChannelE;
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wire [`WIDTH-1:0]                                        ALU2ChannelF;
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wire [`WIDTH-1:0]                                        ALU2ResultA;
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wire [`WIDTH-1:0]                                        ALU2ResultB;
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wire [`WIDTH-1:0]                                        ALU2ResultC;
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wire                                                                            wEXE2_ALU__TriggerALU;
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wire                                                                            ALU2OutputReady;
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wire                                                                            w2FIU__BranchTaken;
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wire    [`ROM_ADDRESS_WIDTH-1:0] JumpIp;
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//wire wIDU2_IFU__InputsLatched;        
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wire wEPU_Busy,wTriggerIFU;
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wire [`ROM_ADDRESS_WIDTH-1:0] wEPU_IP,wIFU_IP,wCodeEntryPoint;
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assign oInstructionPointer1 = (wEPU_Busy) ? wEPU_IP : wIFU_IP;
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InstructionEntryPoint EPU
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(
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.Clock( Clock ),
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.Reset( Reset ),
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.iTrigger( iTrigger ),
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.iInitialCodeAddress( iInitialCodeAddress ),
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.iIMemInput(iInstruction1),
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.oEPU_Busy(wEPU_Busy),
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.oEntryPoint( wCodeEntryPoint ),
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.oTriggerIFU( wTriggerIFU ),
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.oInstructionAddr( wEPU_IP )
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);
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InstructionFetch IFU
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(
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.Clock( Clock                                  ),
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.Reset( Reset                                  ),
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.iTrigger(              wTriggerIFU            ),
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.iInstruction1(         iInstruction1          ),
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.iInstruction2(         iInstruction2          ),
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.iInitialCodeAddress(   wCodeEntryPoint        ),
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.iBranchTaken(          w2FIU__BranchTaken     ),
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.oCurrentInstruction(   CurrentInstruction     ),
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.oInstructionAvalable(  wInstructionAvailable  ),
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.oIP(                   wIFU_IP                ),
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.oIP2(                  oInstructionPointer2   ),
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.iEXEDone(              ALU2OutputReady        ),
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.oMicroCodeReturnValue( oReturnCode            ),
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.oExecutionDone(        oDone                  )
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);
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////---------------------------------------------------------
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wire wIDU2_EXE_DataReady;
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wire wEXE2_IDU_ExeLatchedValues;
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InstructionDecode IDU
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(
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        .Clock( Clock ),
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        .Reset( Reset ),
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        .iEncodedInstruction( CurrentInstruction ),
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        .iInstructionAvailable( wInstructionAvailable ),
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        .oRamAddress0( oDataReadAddress0 ),
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        .oRamAddress1( oDataReadAddress1 ),
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        .iRamValue0( iDataRead0 ),
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        .iRamValue1( iDataRead1 ),
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        .iLastDestination( wEXE2_IDU_DataFordward_LastDestination ),
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        .iDataForward( {ALU2ResultA,ALU2ResultB,ALU2ResultC} ),
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        //Outputs going to the ALU-FSM
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        .oOperation( wOperation ),
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        .oDestination( wDestination ),
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        .oSource0( wSource0 ),
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        .oSource1( wSource1  ),
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        `ifdef DEBUG
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        .iDebug_CurrentIP( oInstructionPointer1 ),
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        .oDebug_CurrentIP( wDEBUG_IDU2_EXE_InstructionPointer ),
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        `endif
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        .oDataReadyForExe( wIDU2_EXE_DataReady )
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);
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ExecutionFSM     EXE
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(
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        .Clock( Clock ),
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        .Reset( Reset | iTrigger ),  //New Sat Jun13
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        .iDecodeDone( wIDU2_EXE_DataReady ),
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        .iOperation( wOperation ),
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        .iDestination( wDestination ),
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        .iSource0( wSource0 ),
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        .iSource1( wSource1 ) ,
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        `ifdef DEBUG
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                .iDebug_CurrentIP( wDEBUG_IDU2_EXE_InstructionPointer ),
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                .iDebug_CoreID( iDebug_CoreID ),
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        `endif
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        //.iJumpResultFromALU( wALU2_EXE__BranchTaken ),
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        .iBranchTaken( wALU2_EXE__BranchTaken ),
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        .iBranchNotTaken( wALU2_IFU_BranchNotTaken ),
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        .oJumpFlag( w2FIU__BranchTaken ),
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        .oJumpIp( JumpIp ),
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        .oRAMWriteEnable( oDataWriteEnable ),
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        .oRAMWriteAddress( oDataWriteAddress ),
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        .RAMBus( oDataBus ),
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        .oBusy( wEXE2_IFU__EXEBusy ),
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        .oExeLatchedValues( wEXE2_IDU_ExeLatchedValues ),
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        .oLastDestination( wEXE2_IDU_DataFordward_LastDestination ),
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        //ALU ports and control signals
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        .oTriggerALU( wEXE2_ALU__TriggerALU ),
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        .oALUOperation( ALU2Operation ),
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        .oALUChannelX1( ALU2ChannelA ),
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        .oALUChannelX2( ALU2ChannelB ),
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        .oALUChannelY1( ALU2ChannelC ),
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        .oALUChannelY2( ALU2ChannelD ),
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        .oALUChannelZ1( ALU2ChannelE ),
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        .oALUChannelZ2( ALU2ChannelF ),
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        .iALUResultX( ALU2ResultA ),
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        .iALUResultY( ALU2ResultB ),
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        .iALUResultZ( ALU2ResultC ),
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        .iALUOutputReady( ALU2OutputReady )
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);
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//--------------------------------------------------------
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VectorALU ALU
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(
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        .Clock(Clock),
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        .Reset(Reset),
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        .iOperation( ALU2Operation ),
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        .iChannel_Ax( ALU2ChannelA ),
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        .iChannel_Bx( ALU2ChannelB ),
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        .iChannel_Ay( ALU2ChannelC ),
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        .iChannel_By( ALU2ChannelD ),
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        .iChannel_Az( ALU2ChannelE ),
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        .iChannel_Bz( ALU2ChannelF ),
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        .oResultA( ALU2ResultA ),
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        .oResultB( ALU2ResultB ),
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        .oResultC( ALU2ResultC ),
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        .oBranchTaken( wALU2_EXE__BranchTaken ),
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        .oBranchNotTaken( wALU2_IFU_BranchNotTaken ),
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        .iInputReady( wEXE2_ALU__TriggerALU ),
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        .OutputReady( ALU2OutputReady )
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);
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endmodule
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//---------------------------------------------------------------------

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