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[/] [theia_gpu/] [branches/] [beta_1.2/] [rtl/] [GEO/] [Module_TriangleFetch.v] - Blame information for rev 220

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1 28 diegovalve
`timescale 1ns / 1ps
2
`include "aDefinitions.v"
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4
`define TFU_AFTER_RESET                                                                 0
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`define TFU_IDLE                                                                                        1
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`define TFU_REQUEST_VERTEX                                                              2
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`define TFU_WAIT_FOR_VERTEX                                                     3
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`define TFU_REQUEST_NEXT_VERTEX_DIFFUSE                 4
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`define TFU_REQUEST_DIFFUSE_COLOR                                       5
10
`define TFU_WAIT_FOR_DIFFUSE_COLOR                                      6
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`define TFU_SET_WBM_INITIAL_ADDRESS                             7
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`define TFU_CHECK_FOR_WBM_ADDRESS_SET                           8
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`define TFU_SET_DIFFUSE_COLOR_ADDRESS                           9
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`define TFU_REQUEST_NEXT_VERTEX_UV_DIFFUSE              10
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`define TFU_INC_WRITE_ADDRESS_DIFFUSE                           11
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`define TFU_DONE                                                                                        12
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/**********************************************************************************
18
Theia, Ray Cast Programable graphic Processing Unit.
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Copyright (C) 2010  Diego Valverde (diego.valverde.g@gmail.com)
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21
This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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26
This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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31
You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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35
***********************************************************************************/
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/*
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38
 
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        Warning: setting iTrigger while oBusy = 1 will reset the Up counters!
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*/
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//-------------------------------------------------------------------------
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module TriangleFetchUnit
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(
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        input wire                                      Clock,
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        input wire                                      Reset,
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        input   wire                                    iTrigger,
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        //output reg                                    oBusy,                                                  //I am currently busy
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        output reg                                      oDone,                                                  //Done reading trinagle data
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        //Wires from GFSM
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        input   wire                                    iDataAvailable,                         //Data is ready
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        input wire[`WIDTH-1:0]   iInitialAddress,                                //The initial address of the data
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        input wire                                      iSetAddressOffset,                      //Set the iInitialAddress Now
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        //Wires from Control Register
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        input wire                                      iCR_TextureMappingEnabled,      //Is the texture map fearure enable?
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57
        //Wires to WBM
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        output reg                                                                              oTriggerWBM,
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        output wire[`WIDTH-1:0]                                          oAddressWBM,
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        output reg                                                                              oSetAddressWBM,
61 82 diegovalve
        output wire[`DATA_ADDRESS_WIDTH-1:0]     oRAMWriteAddress,
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        `ifdef DEBUG
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        input wire[`MAX_CORES-1:0]            iDebug_CoreID,
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        `endif
65 28 diegovalve
        output reg                                                                              oRAMWriteEnable
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67
);
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69
 
70
 
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assign oAddressWBM = iInitialAddress;///Must change or will always read first triangle in the list....
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73
 
74
reg [4:0]        CurrentState,NextState;
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reg IncWriteAddress,IncVertexCount;
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wire [2:0] wVertexCount;
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//-----------------------------
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UpCounter_3 TNF_VC1
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(
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.Clock( Clock ),
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.Reset( iTrigger ),
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.Initial( 3'b0 ),
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.Enable( IncVertexCount ),
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.Q( wVertexCount )
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);
86
 
87
 
88
//-----------------------------
89
UpCounter_16E TNF_TFU_2
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(
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92
.Clock( Clock ),
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.Reset( iTrigger ),
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.Initial( `CREG_V0 ),//iRAMWriteOffset ),
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.Enable( IncWriteAddress ),
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.Q( oRAMWriteAddress )
97
 
98
);
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100
//------------------------------------------------
101
  always @(posedge Clock or posedge Reset)
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  begin
103
 
104
    if (Reset)
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                CurrentState <= `TFU_AFTER_RESET;
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    else
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                CurrentState <= NextState;
108
 
109
  end
110
 
111
//------------------------------------
112
always @( * )
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   begin
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   case (CurrentState)
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        //------------------------------------
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        `TFU_AFTER_RESET:
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        begin
118
 
119
                oTriggerWBM                     <= 0;
120
                oSetAddressWBM          <= 0;
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                IncWriteAddress         <= 0;
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                IncVertexCount          <= 0;
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        //      oBusy                                   <= 0;
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                oDone                                   <= 0;
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                oRAMWriteEnable <= 0;
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127
                NextState <= `TFU_IDLE;
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   end
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        //------------------------------------
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        `TFU_IDLE:
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        begin
132
 
133
                oTriggerWBM                     <= 0;
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                oSetAddressWBM          <= 0;
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                IncWriteAddress         <= 0;
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                IncVertexCount          <= 0;
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        //      oBusy                                   <= 0;
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                oDone                                   <= 0;
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                oRAMWriteEnable <= 0;
140
 
141
                if ( iTrigger )
142
                        NextState <= `TFU_CHECK_FOR_WBM_ADDRESS_SET;
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                else
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                        NextState <= `TFU_IDLE;
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146
        end
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        //------------------------------------
148
        `TFU_CHECK_FOR_WBM_ADDRESS_SET:
149
        begin
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                oTriggerWBM                     <= 0;
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                oSetAddressWBM          <= 0;
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                IncWriteAddress         <= 0;
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                IncVertexCount          <= 0;
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        //      oBusy                                   <= 0;
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                oDone                                   <= 0;
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                oRAMWriteEnable <= 0;
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158
                if ( iSetAddressOffset )
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                        NextState <= `TFU_SET_WBM_INITIAL_ADDRESS;
160
                else
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                        NextState <= `TFU_REQUEST_VERTEX;
162
 
163
        end
164
        //------------------------------------
165
        `TFU_SET_WBM_INITIAL_ADDRESS:
166
        begin
167
 
168
                `ifdef DEBUG
169
                        $display("TFU: TFU_SET_WBM_INITIAL_ADDRESS");
170
                `endif
171
 
172
                oTriggerWBM                     <= 0;
173
                oSetAddressWBM          <= 1; //*
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                IncWriteAddress         <= 0;
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                IncVertexCount          <= 0;
176
        //      oBusy                                   <= 1; //*
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                oDone                                   <= 0;
178
                oRAMWriteEnable <= 0;
179
 
180
                NextState <= `TFU_REQUEST_VERTEX;
181
        end
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        //------------------------------------
183
        `TFU_REQUEST_VERTEX:
184
        begin
185
                oTriggerWBM                     <= 1; //*
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                oSetAddressWBM          <= 0;
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                IncWriteAddress         <= 0;
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                IncVertexCount          <= 1; //*
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        //      oBusy                                   <= 1; 
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                oDone                                   <= 0;
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                oRAMWriteEnable <= 1; //*
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                //$display("TFU_REQUEST_VERTEX %d to wirte to %d\n",oAddressWBM,oRAMWriteAddress);
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                NextState <= `TFU_WAIT_FOR_VERTEX;
194
        end
195
        //------------------------------------
196
        `TFU_WAIT_FOR_VERTEX:
197
        begin
198
 
199
                oTriggerWBM                     <= 1;
200
                oSetAddressWBM          <= 0;
201
                IncWriteAddress         <= 0;
202
                IncVertexCount          <= 0;
203
        //      oBusy                                   <= 1; //*
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                oDone                                   <= 0;
205
                oRAMWriteEnable <= 1;
206
 
207
 
208
                if ( iDataAvailable && iCR_TextureMappingEnabled == 1'b0)
209
                        NextState <= `TFU_REQUEST_NEXT_VERTEX_DIFFUSE;
210
                else if ( iDataAvailable &&     iCR_TextureMappingEnabled == 1'b1)
211
                        NextState <= `TFU_REQUEST_NEXT_VERTEX_UV_DIFFUSE;
212
                else
213
                        NextState <= `TFU_WAIT_FOR_VERTEX;
214
        end
215
        //------------------------------------
216
        `TFU_REQUEST_NEXT_VERTEX_DIFFUSE:
217
        begin
218
                oTriggerWBM                     <= 0;
219
                oSetAddressWBM          <= 0;
220
                IncWriteAddress         <= 1; //*
221
                IncVertexCount          <= 0;
222
        //      oBusy                                   <= 1; 
223
                oDone                                   <= 0;
224
                oRAMWriteEnable <= 0;
225
 
226
 
227
                //if ( wVertexCount == 3)
228
                //      NextState <= `TFU_REQUEST_DIFFUSE_COLOR;
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                //else
230
                        NextState <= `TFU_INC_WRITE_ADDRESS_DIFFUSE;
231
        end
232
        //------------------------------------
233
        `TFU_REQUEST_NEXT_VERTEX_UV_DIFFUSE:
234
        begin
235
                oTriggerWBM                     <= 0;
236
                oSetAddressWBM          <= 0;
237
                IncWriteAddress         <= 1; //*
238
                IncVertexCount          <= 0;
239
        //      oBusy                                   <= 1; 
240
                oDone                                   <= 0;
241
                oRAMWriteEnable <= 0;
242
 
243
                //$display("TFU_REQUEST_NEXT_VERTEX_UV_DIFFUSE, count = %d",wVertexCount);
244
                if ( wVertexCount == 6)
245
                        NextState <= `TFU_REQUEST_DIFFUSE_COLOR;
246
                else
247
                        NextState <= `TFU_REQUEST_VERTEX;
248
        end
249
        //------------------------------------
250
        `TFU_INC_WRITE_ADDRESS_DIFFUSE:
251
        begin
252
                oTriggerWBM                     <= 0;
253
                oSetAddressWBM          <= 0;
254
                IncWriteAddress         <= 1; //*
255
                IncVertexCount          <= 0;
256
        //      oBusy                                   <= 1; 
257
                oDone                                   <= 0;
258
                oRAMWriteEnable <= 0;
259
 
260
        //      $display(":) TFU_REQUEST_NEXT_VERTEX_DIFFUSE, count = %d",wVertexCount);
261
                if ( wVertexCount == 3)
262
                        NextState <= `TFU_REQUEST_DIFFUSE_COLOR;
263
                else
264
                        NextState <= `TFU_REQUEST_VERTEX;
265
        end
266
        //------------------------------------
267
        `TFU_REQUEST_DIFFUSE_COLOR:
268
        begin
269
 
270
//              $display("TFU_REQUEST_DIFFUSE_COLOR: Writting to %d",oRAMWriteAddress);
271
                oTriggerWBM                     <= 1;
272
                oSetAddressWBM          <= 0;
273
                IncWriteAddress         <= 0;
274
                IncVertexCount          <= 0;
275
        //      oBusy                                   <= 1; 
276
                oDone                                   <= 0;
277
                oRAMWriteEnable <= 1;
278
 
279
                NextState <= `TFU_WAIT_FOR_DIFFUSE_COLOR;
280
 
281
        end
282
        //------------------------------------
283
        `TFU_WAIT_FOR_DIFFUSE_COLOR:
284
        begin
285
                oTriggerWBM                     <= 1;
286
                oSetAddressWBM          <= 0;
287
                IncWriteAddress         <= 0;
288
                IncVertexCount          <= 0;
289
        //      oBusy                                   <= 1; 
290
                oDone                                   <= 0; //*
291
                oRAMWriteEnable <= 1;
292
 
293
                if ( iDataAvailable )
294
                        NextState <= `TFU_DONE;
295
                else
296
                        NextState <= `TFU_WAIT_FOR_DIFFUSE_COLOR;
297
 
298
        end
299
 
300
        //------------------------------------
301
        `TFU_DONE:
302
        begin
303
                oTriggerWBM                     <= 0;
304
                oSetAddressWBM          <= 0;
305
                IncWriteAddress         <= 0;
306
                IncVertexCount          <= 0;
307
        //      oBusy                                   <= 0;   //*
308
                oDone                                   <= 1; //*
309
                oRAMWriteEnable <= 0;
310
 
311
                NextState <= `TFU_IDLE;
312
        end
313
        //------------------------------------
314
        default:
315
        begin
316
                oTriggerWBM                     <= 0;
317
                oSetAddressWBM          <= 0;
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                IncWriteAddress         <= 0;
319
                IncVertexCount          <= 0;
320
        //      oBusy                                   <= 0;
321
                oDone                                   <= 0;
322
                oRAMWriteEnable <= 0;
323
 
324
                NextState <= `TFU_IDLE;
325
        end
326
        //------------------------------------
327
        endcase
328
 
329
end //always
330
endmodule
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//-------------------------------------------------------------------------

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