URL https://opencores.org/ocsvn/theia_gpu/theia_gpu/trunk

Subversion Repositories theia_gpu

[/] [theia_gpu/] [branches/] [beta_2.0/] [regressions/] [multi_core/] [control_code.mem] - Blame information for rev 218

Details | Compare with Previous | View Log


//Code generated bt theia_compile
 
 
 
d000000         //ASSIGN R0 I(0 )
d800000         //ASSIGN R128 I(0 )
20b8000         //ADD R11 R128 R0
d800000         //ASSIGN R128 I(0 )
d810042         //ASSIGN R129 I(66 )
d820014         //ASSIGN R130 I(20 )
11838182                //SHL R131 R129 R130
5848083         //OR R132 R128 R131
20c8400         //ADD R12 R132 R0
c150a00         //BLE R21 R10 R0
c0000           //NOP R12 R0 R0
2030a00         //ADD R3 R10 R0
e000b0c         //COPYBLOCK DstId: R0 SrcOffset: R11 DstOffsetAndLen: R12
d800042         //ASSIGN R128 I(66 )
20b800b         //ADD R11 R128 R11
2810000         //ADD R129 R0 R0
20a0a81         //ADD R10 R10 R129
60c0000         //BRANCH R12 R0 R0
c0000           //NOP R12 R0 R0
d800001         //ASSIGN R128 I(1 )
71a0280         //BEQ R26 R2 R128
160000          //NOP R22 R0 R0
6160000         //BRANCH R22 R0 R0
160000          //NOP R22 R0 R0
d810000         //ASSIGN R129 I(0 )
20b8100         //ADD R11 R129 R0
d800000         //ASSIGN R128 I(0 )
d810093         //ASSIGN R129 I(147 )
d820014         //ASSIGN R130 I(20 )
11838182                //SHL R131 R129 R130
5848083         //OR R132 R128 R131
d850001         //ASSIGN R133 I(1 )
d86001f         //ASSIGN R134 I(31 )
11878586                //SHL R135 R133 R134
5888487         //OR R136 R132 R135
20c8800         //ADD R12 R136 R0
d80001f         //ASSIGN R128 I(31 )
2038000         //ADD R3 R128 R0
e000b0c         //COPYBLOCK DstId: R0 SrcOffset: R11 DstOffsetAndLen: R12
1200000         //DELIVERCOMMAND R32 R0 R0
f000000         //EXIT R0 R0 R0

Line No.	Rev	Author	Line
1	218	diegovalve	`//Code generated bt theia_compile`
2
3
4
5			`d000000 //ASSIGN R0 I(0 )`
6			`d800000 //ASSIGN R128 I(0 )`
7			`20b8000 //ADD R11 R128 R0`
8			`d800000 //ASSIGN R128 I(0 )`
9			`d810042 //ASSIGN R129 I(66 )`
10			`d820014 //ASSIGN R130 I(20 )`
11			`11838182 //SHL R131 R129 R130`
12			`5848083 //OR R132 R128 R131`
13			`20c8400 //ADD R12 R132 R0`
14			`c150a00 //BLE R21 R10 R0`
15			`c0000 //NOP R12 R0 R0`
16			`2030a00 //ADD R3 R10 R0`
17			`e000b0c //COPYBLOCK DstId: R0 SrcOffset: R11 DstOffsetAndLen: R12`
18			`d800042 //ASSIGN R128 I(66 )`
19			`20b800b //ADD R11 R128 R11`
20			`2810000 //ADD R129 R0 R0`
21			`20a0a81 //ADD R10 R10 R129`
22			`60c0000 //BRANCH R12 R0 R0`
23			`c0000 //NOP R12 R0 R0`
24			`d800001 //ASSIGN R128 I(1 )`
25			`71a0280 //BEQ R26 R2 R128`
26			`160000 //NOP R22 R0 R0`
27			`6160000 //BRANCH R22 R0 R0`
28			`160000 //NOP R22 R0 R0`
29			`d810000 //ASSIGN R129 I(0 )`
30			`20b8100 //ADD R11 R129 R0`
31			`d800000 //ASSIGN R128 I(0 )`
32			`d810093 //ASSIGN R129 I(147 )`
33			`d820014 //ASSIGN R130 I(20 )`
34			`11838182 //SHL R131 R129 R130`
35			`5848083 //OR R132 R128 R131`
36			`d850001 //ASSIGN R133 I(1 )`
37			`d86001f //ASSIGN R134 I(31 )`
38			`11878586 //SHL R135 R133 R134`
39			`5888487 //OR R136 R132 R135`
40			`20c8800 //ADD R12 R136 R0`
41			`d80001f //ASSIGN R128 I(31 )`
42			`2038000 //ADD R3 R128 R0`
43			`e000b0c //COPYBLOCK DstId: R0 SrcOffset: R11 DstOffsetAndLen: R12`
44			`1200000 //DELIVERCOMMAND R32 R0 R0`
45			`f000000 //EXIT R0 R0 R0`

Browse

Tools

Subversion Repositories theia_gpu

[/] [theia_gpu/] [branches/] [beta_2.0/] [regressions/] [multi_core/] [control_code.mem] - Blame information for rev 218