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[/] [theia_gpu/] [branches/] [icarus_version/] [examples/] [shaders/] [example1/] [Example2.shdr] - Blame information for rev 168

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ENTRYPOINT_ADRR_USERCONSTANTS:
       SETX C1 32'h20000
       SETY C1 32'h20000
       SETZ C1 32'h40000
       RETURN RT_TRUE
 
 
ENTRYPOINT_ADRR_PIXELSHADER:
      MUL  CREG_TEXTURE_COLOR CREG_TEXTURE_COLOR C1
         OMWRITE  OREG_PIXEL_COLOR CREG_CURRENT_OUTPUT_PIXEL CREG_TEXTURE_COLOR
         RETURN  RT_TRUE
 
 

Line No.	Rev	Author	Line
1	168	diegovalve
2			`ENTRYPOINT_ADRR_USERCONSTANTS:`
3			`SETX C1 32'h20000`
4			`SETY C1 32'h20000`
5			`SETZ C1 32'h40000`
6			`RETURN RT_TRUE`
7
8
9			`ENTRYPOINT_ADRR_PIXELSHADER:`
10			`MUL CREG_TEXTURE_COLOR CREG_TEXTURE_COLOR C1`
11			`OMWRITE OREG_PIXEL_COLOR CREG_CURRENT_OUTPUT_PIXEL CREG_TEXTURE_COLOR`
12			`RETURN RT_TRUE`
13
14

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[/] [theia_gpu/] [branches/] [icarus_version/] [examples/] [shaders/] [example1/] [Example2.shdr] - Blame information for rev 168