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[/] [theia_gpu/] [branches/] [icarus_version/] [rtl/] [Module_InstructionEntryPoint.v] - Blame information for rev 211

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1 158 diegovalve
`timescale 1ns / 1ps
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`include "aDefinitions.v"
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module InstructionEntryPoint
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(
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input wire                          Clock,
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input wire                                                                 Reset,
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input wire                                                                 iTrigger,
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input wire[`ROM_ADDRESS_WIDTH-1:0]  iInitialCodeAddress,
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input wire [`INSTRUCTION_WIDTH-1:0] iIMemInput,
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output wire                          oEPU_Busy,
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output wire [`ROM_ADDRESS_WIDTH-1:0] oEntryPoint,
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output wire                          oTriggerIFU,
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output wire [`ROM_ADDRESS_WIDTH-1:0] oInstructionAddr
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);
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assign oInstructionAddr = (oTriggerIFU) ? oEntryPoint : iInitialCodeAddress;
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assign oEPU_Busy = iTrigger | oTriggerIFU;
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/*
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FFD_POSEDGE_ASYNC_RESET # ( 1 ) FFD1
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(
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.Clock(Clock),
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.Clear( Reset ),
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.D(iTrigger),
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.Q(oTriggerIFU)
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);
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*/
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FFD_POSEDGE_SYNCRONOUS_RESET # ( 1 ) FFD1
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(
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        .Clock( Clock ),
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        .Reset( Reset ),
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        .Enable(1'b1),
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        .D(iTrigger),
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        .Q(oTriggerIFU)
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);
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assign oEntryPoint = (oTriggerIFU) ? iIMemInput[`ROM_ADDRESS_WIDTH-1:0] : `ROM_ADDRESS_WIDTH'b0;
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endmodule

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