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1 158 diegovalve
/**********************************************************************************
2
Theia, Ray Cast Programable graphic Processing Unit.
3
Copyright (C) 2010  Diego Valverde (diego.valverde.g@gmail.com)
4
 
5
This program is free software; you can redistribute it and/or
6
modify it under the terms of the GNU General Public License
7
as published by the Free Software Foundation; either version 2
8
of the License, or (at your option) any later version.
9
 
10
This program is distributed in the hope that it will be useful,
11
but WITHOUT ANY WARRANTY; without even the implied warranty of
12
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
GNU General Public License for more details.
14
 
15
You should have received a copy of the GNU General Public License
16
along with this program; if not, write to the Free Software
17
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18
 
19
***********************************************************************************/
20
 
21
/**********************************************************************************
22
Description:
23
 This is the top level block for THEIA.
24
 THEIA core has 5 main logical blocks called Units.
25
 This module implements the interconections between the Units.
26
 
27
 Units:
28
  > EXE: Mananges execution logic for the SHADERS.
29
  > GEO: Manages geometry data structures.
30
  > IO: Input/Output (Wishbone).
31
  > MEM: Internal memory, separate for Instructions and data.
32
  > CONTROL: Main control Finite state machine.
33
 
34
 Internal Buses:
35
        THEIA has separate instruction and data buses.
36
        THEIA avoids using tri-state buses by having separate input/output
37
        for each bus.
38
        There are 2 separate data buses since the Data memory
39
        has a Dual read channel.
40
   Please see the MEM unit chapter in the documentation for more details.
41
 
42
 External Buses:
43
        External buses are managed by the IO Unit.
44
        External buses follow the wishbone protocol.
45
        Please see the IO unit chapter in the documentation for more details.
46
**********************************************************************************/
47
 
48
`timescale 1ns / 1ps
49
`include "aDefinitions.v"
50 174 diegovalve
`ifdef VERILATOR
51
`include "Unit_Control.v"
52
`include "Unit_MEM.v"
53
`include "Unit_EXE.v"
54
`include "Unit_IO.v"
55
`endif
56 158 diegovalve
 
57
module THEIACORE
58
(
59
 
60
input wire                    CLK_I,    //Input clock
61
input wire                    RST_I,    //Input reset
62
//Theia Interfaces
63
input wire                    MST_I,    //Master signal, THEIA enters configuration mode
64
                                       //when this gets asserted (see documentation)
65
//Wish Bone Interface
66
input wire [`WB_WIDTH-1:0]    DAT_I,     //Input data bus  (Wishbone)
67
output wire [`WB_WIDTH-1:0]   DAT_O,     //Output data bus (Wishbone)
68
input wire                    ACK_I,    //Input ack
69
output wire                   ACK_O,    //Output ack
70
output wire [`WB_WIDTH-1:0]   ADR_O,     //Output address
71
input wire [`WB_WIDTH-1:0]    ADR_I,     //Input address
72
output wire                   WE_O,             //Output write enable
73
input wire                    WE_I,    //Input write enable
74
output wire                   STB_O,    //Strobe signal, see wishbone documentation
75
input wire                    STB_I,    //Strobe signal, see wishbone documentation
76
output wire                   CYC_O,    //Bus cycle signal, see wishbone documentation
77
input wire                    CYC_I,   //Bus cycle signal, see wishbone documentation
78
output wire     [1:0]             TGC_O,   //Bus cycle tag, see THEAI documentation
79
input wire [1:0]              TGA_I,   //Input address tag, see THEAI documentation
80
output wire [1:0]             TGA_O,   //Output address tag, see THEAI documentation
81
input wire      [1:0]             TGC_I,   //Bus cycle tag, see THEAI documentation
82
input wire                    GNT_I,   //Bus arbiter 'Granted' signal, see THEAI documentation
83
input wire                    RENDREN_I,
84
 
85
output wire                  HDL_O,             //Data Latched
86
input wire                   HDLACK_I, //Data Latched ACK
87
input wire                   STDONE_I,          //Scene traverse complete
88
input wire                   HDA_I,
89
output wire                  RCOMMIT_O,
90
 
91
output wire [`WB_WIDTH-1:0] OMEM_DAT_O,
92
output wire [`WB_WIDTH-1:0] OMEM_ADR_O,
93
output wire                                              OMEM_WE_O,
94
 
95
input wire                  TMEM_ACK_I,
96
input wire [`WB_WIDTH-1:0]  TMEM_DAT_I ,
97
output wire [`WB_WIDTH-1:0] TMEM_ADR_O ,
98
output wire                 TMEM_WE_O,
99
output wire                 TMEM_STB_O,
100
output wire                 TMEM_CYC_O,
101
input wire                  TMEM_GNT_I,
102
 
103
`ifdef DEBUG
104
input wire[`MAX_CORES-1:0]    iDebug_CoreID,
105
`endif
106
//Control Register
107
input wire [15:0]                         CREG_I,
108
output wire                   DONE_O
109
 
110
 
111
);
112
 
113
//When we flip the SMEM, this means we are ready to receive more data
114
 
115
 
116
//Alias this signals
117
wire Clock,Reset;
118
assign Clock = CLK_I;
119
assign Reset = RST_I;
120
 
121
wire                              wIO_Busy;
122
wire [`DATA_ROW_WIDTH-1:0]                        wEXE_2__MEM_WriteData;
123
wire [`DATA_ROW_WIDTH-1:0]                        wUCODE_RAMBus;
124
wire [`DATA_ADDRESS_WIDTH-1:0]    wEXE_2__MEM_wDataWriteAddress;
125
wire                              w2IO__AddrIsImm;
126
wire [`DATA_ADDRESS_WIDTH-1:0]    wUCODE_RAMAddress;
127
wire [`DATA_ADDRESS_WIDTH-1:0]    w2IO__Adr_O_Pointer;
128
wire [`DATA_ADDRESS_WIDTH-1:0]    wGEO2_IO__Adr_O_Pointer;
129
wire                                                                             wEXE_2__DataWriteEnable;
130
wire                                                                             wUCODE_RAMWriteEnable;
131
//wire [2:0]                                                             RamBusOwner;
132
//Unit intercoanection wires
133
 
134
wire                                                                            wCU2__MicrocodeExecutionDone;
135
wire [`ROM_ADDRESS_WIDTH-1:0]            InitialCodeAddress;
136
wire [`ROM_ADDRESS_WIDTH-1:0]            wInstructionPointer1,wInstructionPointer2;
137
wire [`INSTRUCTION_WIDTH-1:0]    wEncodedInstruction1,wEncodedInstruction2,wIO2_MEM__ExternalInstruction;
138
wire                                                                            wCU2__ExecuteMicroCode;
139
wire  [`ROM_ADDRESS_WIDTH-1:0]   wIO2_MEM__InstructionWriteAddr;
140
wire [95:0]                                                      wMEM_2__EXE_DataRead0, wMEM_2__EXE_DataRead1,wMEM_2__IO_DataRead0, wMEM_2__IO_DataRead1;
141
wire [`DATA_ADDRESS_WIDTH-1:0]   wEXE_2__MEM_DataReadAddress0,wEXE_2__MEM_DataReadAddress1;
142
wire [`DATA_ADDRESS_WIDTH-1:0]   wUCODE_RAMReadAddress0,wUCODE_RAMReadAddress1;
143
 
144
 
145
wire [`WIDTH-1:0]                                        w2IO__AddressOffset;
146
wire [`DATA_ADDRESS_WIDTH-1:0]   w2IO__DataWriteAddress;
147
wire                                                                            w2IO__Store;
148
wire                                                                            w2IO__EnableWBMaster;
149
 
150
wire [`DATA_ADDRESS_WIDTH-1:0]   wIO2_MEM__DataWriteAddress;
151
wire [`DATA_ADDRESS_WIDTH-1:0]   wIO_2_MEM__DataReadAddress0;
152
wire [`DATA_ROW_WIDTH-1:0]               wIO2_MEM__Bus;
153
wire [`WIDTH-1:0]                                        wIO2_MEM__Data;
154
wire [`WIDTH-1:0]                                        wIO2_WBM__Address;
155
wire                                                                            wIO2_MEM__DataWriteEnable;
156
wire                                                                            wIO2__Done;
157
wire                                                                            wCU2_GEO__GeometryFetchEnable;
158
wire                                                                            wIFU2__MicroCodeReturnValue;
159
wire                                                                            wCU2_BCU__ACK;
160
wire                                                                            wGEO2_CU__RequestAABBIU;
161
wire                                                                            wGEO2_CU__RequestBIU;
162
wire                             wGEO2_CU__RequestTCC;
163
wire                                                                            wGEO2_CU__GeometryUnitDone;
164
wire                                                                            wGEO2_CU__Sync;
165
wire                                                                            wEXE2__uCodeDone;
166
wire                                                                            wEXE2_IFU__EXEBusy;
167
wire [`DATA_ADDRESS_WIDTH-1:0]   wEXE2_IDU_DataFordward_LastDestination;
168
wire                                                                            wALU2_EXE__BranchTaken;
169
wire                                                                            wALU2_IFU_BranchNotTaken;
170
wire                                                                            w2IO__SetAddress;
171
wire                                                                            wIDU2_IFU__IDUBusy;
172
//Control Registe wires
173
wire[15:0]                                                               wCR2_ControlRegister;
174
wire                                                                            wCR2_TextureMappingEnabled;
175
wire                             wGEO2_CU__TFFDone;
176
wire                             wCU2_GEO__TriggerTFF;
177
wire                             wIO2_MEM_InstructionWriteEnable;
178
wire                             wCU2_IO__WritePixel;
179
wire                             wGEO2_IO__AddrIsImm;
180
wire[31:0]                       wGEO2_IO__AddressOffset;
181
wire                             wGEO2_IO__EnableWBMaster;
182
wire                             wGEO2_IO__SetAddress;
183
wire[`WIDTH-1:0]                 wGEO2__CurrentPitch,wCU2_GEO_Pitch;
184
wire                             wCU2_GEO__SetPitch,wCU2_GEO__IncPicth;
185
 
186
wire [`DATA_ROW_WIDTH-1:0] wEXE_2__IO_WriteAddress;
187
wire [`DATA_ROW_WIDTH-1:0] wEXE_2__IO_WriteData;
188
wire wEXE_2__IO_OMEMWriteEnable;
189
 
190
wire [`DATA_ROW_WIDTH-1:0] wEXE_2__IO_TMEMAddress;
191
wire [`DATA_ROW_WIDTH-1:0] wIO_2_EXE__TMEMData;
192
wire wIO_2_EXE__DataAvailable;
193
wire wEXE_2_IO__DataRequest;
194
wire wCU2_FlipMem;
195
wire wCU2_FlipMemEnabled;
196
wire w2MEM_FlipMemory;
197
wire wGEO2__RequestingTextures;
198
wire w2IO_WriteBack_Set;
199
wire[`DATA_ADDRESS_WIDTH-1:0] wIO_2_MEM__DataReadAddress1;
200
 
201
`ifdef DEBUG
202
        wire [`ROM_ADDRESS_WIDTH-1:0] wDEBUG_IDU2_EXE_InstructionPointer;
203
`endif
204
//--------------------------------------------------------
205
 
206
assign HDL_O = wCU2_FlipMem;
207
 
208
assign wCR2_TextureMappingEnabled = wCR2_ControlRegister[ `CR_EN_TEXTURE ];
209
 
210
//--------------------------------------------------------
211
//Control Unit Instance
212
        ControlUnit CU
213
        (
214
           .Clock(Clock),
215
                .Reset(Reset),
216
                .oFlipMemEnabled(                   wCU2_FlipMemEnabled            ),
217
                .oFlipMem(                          wCU2_FlipMem                   ),
218
                .iControlRegister(                  wCR2_ControlRegister           ),
219
                //.oRamBusOwner(                      RamBusOwner                    ),
220
                .oGFUEnable(                        wCU2_GEO__GeometryFetchEnable  ),
221
                .iTriggerAABBIURequest(             wGEO2_CU__RequestAABBIU        ),
222
                .iTriggerBIURequest(                wGEO2_CU__RequestBIU           ),
223
                .iTriggertTCCRequest(               wGEO2_CU__RequestTCC           ),
224
                .oUCodeEnable(                      wCU2__ExecuteMicroCode         ),
225
                .oCodeInstructioPointer(           InitialCodeAddress             ),
226
                .iUCodeDone(                        wCU2__MicrocodeExecutionDone   ),
227
                .iIODone(                           wIO2__Done                     ),
228
                .oIOWritePixel(                     wCU2_IO__WritePixel            ),
229
                .iUCodeReturnValue(                 wIFU2__MicroCodeReturnValue    ),
230
                .iGEOSync(                          wGEO2_CU__Sync                 ),
231
                .iTFFDone(                          wGEO2_CU__TFFDone              ),
232
                .oTriggerTFF(                       wCU2_GEO__TriggerTFF           ),
233
                .MST_I(                             MST_I                          ),
234
                .oSetCurrentPitch(                  wCU2_GEO__SetPitch             ),
235
                .iGFUDone(                          wGEO2_CU__GeometryUnitDone     ),
236
                .iRenderEnable(                     RENDREN_I                      ),
237
                .iSceneTraverseComplete(            STDONE_I                       ),
238
                .oResultCommited(                   RCOMMIT_O                      ),
239
                .iHostDataAvailable(                HDA_I                                                                        ),
240
                .iHostAckDataRead(                  HDLACK_I                       ),
241
 
242
 
243
                `ifdef DEBUG
244
                .iDebug_CoreID( iDebug_CoreID ),
245
                `endif
246
                .oDone(                             DONE_O                         )
247
 
248
        );
249
 
250
 
251
 
252
 
253
//--------------------------------------------------------      
254
 
255
//assign w2MEM_FlipMemory =  (wCU2__ExecuteMicroCode | wCU2_FlipMem ) & wCU2_FlipMemEnabled;
256
assign w2MEM_FlipMemory =  wCU2_FlipMem  & wCU2_FlipMemEnabled;
257
MemoryUnit MEM
258
(
259
.Clock(Clock),
260
.Reset(Reset),
261
 
262
.iFlipMemory( w2MEM_FlipMemory ),
263
 
264
//Data Bus to/from EXE
265
.iDataReadAddress1_EXE(       wEXE_2__MEM_DataReadAddress0        ),
266
.iDataReadAddress2_EXE(       wEXE_2__MEM_DataReadAddress1        ),
267
.oData1_EXE(                  wMEM_2__EXE_DataRead0               ),
268
.oData2_EXE(                  wMEM_2__EXE_DataRead1               ),
269
.iDataWriteEnable_EXE(        wEXE_2__DataWriteEnable          ),
270
.iDataWriteAddress_EXE(       wEXE_2__MEM_wDataWriteAddress        ),
271
.iData_EXE(                   wEXE_2__MEM_WriteData          ),
272
 
273
//Data Bus to/from IO
274
 
275
.iDataReadAddress1_IO(       wIO_2_MEM__DataReadAddress0        ),
276
.iDataReadAddress2_IO(       wIO_2_MEM__DataReadAddress1        ),
277
.oData1_IO(                  wMEM_2__IO_DataRead0               ),
278
.oData2_IO(                  wMEM_2__IO_DataRead1               ),
279
.iDataWriteEnable_IO(        wIO2_MEM__DataWriteEnable          ),
280
.iDataWriteAddress_IO(       wIO2_MEM__DataWriteAddress        ),
281
.iData_IO(                   wIO2_MEM__Bus          ),
282
 
283
`ifdef DEBUG
284
.iDebug_CoreID( iDebug_CoreID ),
285
`endif
286
 
287
 
288
//Instruction Bus
289
.iInstructionReadAddress1(  wInstructionPointer1             ),
290
.iInstructionReadAddress2(  wInstructionPointer2             ),
291
.oInstruction1(             wEncodedInstruction1             ),
292
.oInstruction2(             wEncodedInstruction2             ),
293
.iInstructionWriteEnable(  wIO2_MEM_InstructionWriteEnable ),
294
.iInstructionWriteAddress( wIO2_MEM__InstructionWriteAddr  ),
295
.iInstruction(             wIO2_MEM__ExternalInstruction   ),
296
.iControlRegister(         CREG_I                          ),
297
.oControlRegister(         wCR2_ControlRegister            )
298
 
299
);
300
 
301
////--------------------------------------------------------
302
 
303
 
304
ExecutionUnit EXE
305
(
306
 
307
.Clock( Clock),
308
.Reset( Reset ),
309
.iInitialCodeAddress(    InitialCodeAddress     ),
310
.iInstruction1(          wEncodedInstruction1      ),
311
.iInstruction2(          wEncodedInstruction2      ),
312
.oInstructionPointer1(   wInstructionPointer1    ),
313
.oInstructionPointer2(   wInstructionPointer2    ),
314
.iDataRead0(             wMEM_2__EXE_DataRead0             ),
315
.iDataRead1(             wMEM_2__EXE_DataRead1             ),
316
.iTrigger(               wCU2__ExecuteMicroCode ),
317
.oDataReadAddress0( wEXE_2__MEM_DataReadAddress0 ),
318
.oDataReadAddress1( wEXE_2__MEM_DataReadAddress1 ),
319
.oDataWriteEnable(  wEXE_2__DataWriteEnable  ),
320
.oDataWriteAddress( wEXE_2__MEM_wDataWriteAddress      ),
321
.oDataBus(          wEXE_2__MEM_WriteData          ),
322
.oReturnCode(       wIFU2__MicroCodeReturnValue ),
323
/**************/
324
.oOMEMWriteAddress(   wEXE_2__IO_WriteAddress ),
325
.oOMEMWriteData(      wEXE_2__IO_WriteData    ),
326
.oOMEMWriteEnable(  wEXE_2__IO_OMEMWriteEnable ),
327
 
328
.oTMEMReadAddress(   wEXE_2__IO_TMEMAddress   ),
329
.iTMEMReadData(      wIO_2_EXE__TMEMData      ),
330
.iTMEMDataAvailable( wIO_2_EXE__DataAvailable ),
331
.oTMEMDataRequest(   wEXE_2_IO__DataRequest   ),
332
/**************/
333
`ifdef DEBUG
334
.iDebug_CoreID( iDebug_CoreID ),
335
`endif
336
.oDone(             wCU2__MicrocodeExecutionDone )
337
 
338
);
339
 
340
////--------------------------------------------------------
341
 
342
 
343
assign TGA_O = (wGEO2__RequestingTextures) ? 2'b1: 2'b0;
344
//---------------------------------------------------------------------------------------------------
345
 
346
//assign wEXE_2__MEM_DataReadAddress1 = (wCU2_IO__WritePixel == 0) ?  wUCODE_RAMReadAddress1 : wIO_2_MEM__DataReadAddress1;
347
assign w2IO__EnableWBMaster = (wCU2_IO__WritePixel == 0 ) ? wGEO2_IO__EnableWBMaster : wCU2_IO__WritePixel;
348
assign w2IO__AddrIsImm       = 0;//(wCU2_IO__WritePixel == 0 ) ? wGEO2_IO__AddrIsImm       : 1'b0;
349
assign w2IO__AddressOffset   = 0;//(wCU2_IO__WritePixel == 0 ) ? wGEO2_IO__AddressOffset   : 32'b0;
350
assign w2IO__Adr_O_Pointer      = (wCU2_IO__WritePixel == 0 ) ? wGEO2_IO__Adr_O_Pointer : `OREG_ADDR_O;
351
//assign w2IO__Adr_O_Pointer      = (wCU2_IO__WritePixel == 0 ) ? wGEO2_IO__Adr_O_Pointer : `CREG_PIXEL_2D_INITIAL_POSITION; 
352
 
353
wire w2IO_MasterCycleType;
354
assign w2IO_MasterCycleType = (wCU2_IO__WritePixel) ? `WB_SIMPLE_WRITE_CYCLE : `WB_SIMPLE_READ_CYCLE;
355
 
356
 
357
 
358
assign w2IO__SetAddress = (wCU2_IO__WritePixel == 0 )? wGEO2_IO__SetAddress : wCU2_GEO__SetPitch;
359
 
360
 
361
IO_Unit IO
362
(
363
 .Clock(               Clock                            ),
364
 .Reset(               Reset                            ),
365
 .iEnable(           1'b0 ),// w2IO__EnableWBMaster              ),
366
 .iBusCyc_Type(         w2IO_MasterCycleType            ),
367
 
368
 .iStore(              1'b1),//w2IO__Store                      ),
369
 .iAdr_DataWriteBack(    w2IO__DataWriteAddress         ),
370
 .iAdr_O_Set(      w2IO__SetAddress                     ),
371
 .iAdr_O_Imm(       w2IO__AddressOffset                 ),
372
 .iAdr_O_Type(      w2IO__AddrIsImm                     ),
373
 .iAdr_O_Pointer(  w2IO__Adr_O_Pointer                  ),
374
 .iReadDataBus(        wMEM_2__IO_DataRead0                       ),
375
 .iReadDataBus2(        wMEM_2__IO_DataRead1                       ),
376
 .iDat_O_Pointer(     `OREG_PIXEL_COLOR                 ),
377
 
378
 
379
 .oDataReadAddress(    wIO_2_MEM__DataReadAddress0      ),
380
 .oDataReadAddress2(   wIO_2_MEM__DataReadAddress1       ),
381
 .oDataWriteAddress(   wIO2_MEM__DataWriteAddress    ),
382
 .oDataBus(               wIO2_MEM__Bus                 ),
383
 .oInstructionBus(     wIO2_MEM__ExternalInstruction    ),
384
 
385
 .oDataWriteEnable(         wIO2_MEM__DataWriteEnable    ),
386
 .oData(                    wIO2_MEM__Data                       ),
387
 .oInstructionWriteEnable(  wIO2_MEM_InstructionWriteEnable ),
388
 .oInstructionWriteAddress( wIO2_MEM__InstructionWriteAddr ),
389
 .iWriteBack_Set( w2IO_WriteBack_Set ),
390
 .oBusy(                      wIO_Busy                  ),
391
 .oDone(               wIO2__Done                       ),
392
 /**********/
393
 .iOMEM_WriteAddress(   wEXE_2__IO_WriteAddress         ),
394
 .iOMEM_WriteData(      wEXE_2__IO_WriteData            ),
395
 .iOMEM_WriteEnable(    wEXE_2__IO_OMEMWriteEnable    ),
396
 .OMEM_DAT_O( OMEM_DAT_O ),
397
 .OMEM_ADR_O( OMEM_ADR_O ),
398
 .OMEM_WE_O( OMEM_WE_O ),
399
 
400
 
401
 .oTMEMReadData(      wIO_2_EXE__TMEMData      ),
402
 .iTMEMDataRequest(   wEXE_2_IO__DataRequest   ),
403
 .iTMEMReadAddress(   wEXE_2__IO_TMEMAddress   ),
404
 .oTMEMDataAvailable( wIO_2_EXE__DataAvailable ),
405
 
406
.TMEM_ACK_I( TMEM_ACK_I ),
407
.TMEM_DAT_I( TMEM_DAT_I ),
408
.TMEM_ADR_O( TMEM_ADR_O ),
409
.TMEM_WE_O(  TMEM_WE_O  ),
410
.TMEM_STB_O( TMEM_STB_O ),
411
.TMEM_CYC_O( TMEM_CYC_O ),
412
.TMEM_GNT_I( TMEM_GNT_I ),
413
 
414
 /**********/
415
 .MST_I( MST_I ),
416
  //Wish Bone Interface
417
.DAT_I( DAT_I ),
418
.DAT_O( DAT_O ),
419
.ACK_I( ACK_I & GNT_I ),
420
.ACK_O( ACK_O ),
421
.ADR_O( ADR_O ),
422
.ADR_I( ADR_I ),
423
.WE_O(  WE_O  ),
424
.WE_I(  WE_I  ),
425
.STB_O( STB_O ),
426
.STB_I( STB_I ),
427
.CYC_O( CYC_O ),
428
.TGA_I( TGA_I ),
429
.CYC_I( CYC_I ),
430
.GNT_I( GNT_I ),
431
.TGC_O( TGC_O )
432
 
433
 
434
);
435
//---------------------------------------------------------------------------------------------------
436
endmodule

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