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[/] [thor/] [trunk/] [FT64v5/] [rtl/] [fpUnit/] [fpSqrt.v] - Blame information for rev 51

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1 51 robfinch
`timescale 1ns / 1ps
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// ============================================================================
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//        __
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//   \\__/ o\    (C) 2018  Robert Finch, Waterloo
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//    \  __ /    All rights reserved.
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//     \/_//     robfinch<remove>@finitron.ca
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//       ||
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//
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//      fpSqrt.v
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//    - floating point square root
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//    - parameterized width
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//    - IEEE 754 representation
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//
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//
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// This source file is free software: you can redistribute it and/or modify 
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// it under the terms of the GNU Lesser General Public License as published 
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// by the Free Software Foundation, either version 3 of the License, or     
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// (at your option) any later version.                                      
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//                                                                          
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// This source file is distributed in the hope that it will be useful,      
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// but WITHOUT ANY WARRANTY; without even the implied warranty of           
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
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// GNU General Public License for more details.                             
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//                                                                          
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// You should have received a copy of the GNU General Public License        
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// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
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//                                                                          
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//      Floating Point Multiplier / Divider
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//
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// ============================================================================
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`include "fp_defines.v"
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module fpSqrt(rst, clk, ce, ld, a, o, done, sqrinf, sqrneg);
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parameter WID = 128;
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localparam MSB = WID-1;
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localparam EMSB = WID==128 ? 14 :
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                  WID==96 ? 14 :
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                  WID==80 ? 14 :
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                  WID==64 ? 10 :
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                                  WID==52 ? 10 :
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                                  WID==48 ? 11 :
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                                  WID==44 ? 10 :
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                                  WID==42 ? 10 :
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                                  WID==40 ?  9 :
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                                  WID==32 ?  7 :
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                                  WID==24 ?  6 : 4;
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localparam FMSB = WID==128 ? 111 :
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                  WID==96 ? 79 :
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                  WID==80 ? 63 :
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                  WID==64 ? 51 :
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                                  WID==52 ? 39 :
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                                  WID==48 ? 34 :
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                                  WID==44 ? 31 :
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                                  WID==42 ? 29 :
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                                  WID==40 ? 28 :
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                                  WID==32 ? 22 :
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                                  WID==24 ? 15 : 9;
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localparam FX = (FMSB+2)*2-1;   // the MSB of the expanded fraction
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localparam EX = FX + 1 + EMSB + 1 + 1 - 1;
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input rst;
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input clk;
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input ce;
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input ld;
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input [MSB:0] a;
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output reg [EX:0] o;
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output done;
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output sqrinf;
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output sqrneg;
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// registered outputs
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reg sign_exe;
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reg inf;
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reg     overflow;
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reg     underflow;
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wire so;
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wire [EMSB:0] xo;
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wire [FX:0] mo;
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// constants
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wire [EMSB:0] infXp = {EMSB+1{1'b1}};    // infinite / NaN - all ones
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// The following is the value for an exponent of zero, with the offset
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// eg. 8'h7f for eight bit exponent, 11'h7ff for eleven bit exponent, etc.
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wire [EMSB:0] bias = {1'b0,{EMSB{1'b1}}};        //2^0 exponent
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// The following is a template for a quiet nan. (MSB=1)
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wire [FMSB:0] qNaN  = {1'b1,{FMSB{1'b0}}};
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// variables
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wire [EMSB+2:0] ex1;     // sum of exponents
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wire [FX:0] sqrto;
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// Operands
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wire sa;                        // sign bit
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wire [EMSB:0] xa;        // exponent bits
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wire [FMSB+1:0] fracta;
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wire a_dn;                      // a/b is denormalized
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wire az;
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wire aInf;
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wire aNan;
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wire done1;
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wire [7:0] lzcnt;
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// -----------------------------------------------------------
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// - decode the input operand
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// - derive basic information
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// - calculate exponent
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// - calculate fraction
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// -----------------------------------------------------------
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fpDecomp #(WID) u1
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(
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        .i(a),
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        .sgn(sa),
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        .exp(xa),
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        .fract(fracta),
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        .xz(a_dn),
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        .vz(az),
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        .inf(aInf),
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        .nan(aNan)
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);
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assign ex1 = xa + 8'd1;
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assign so = 1'b0;                               // square root of positive numbers only
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assign xo = (ex1 >> 1) + (bias >> 1);   // divide by 2 cuts the bias in half, so 1/2 of it is added back in.
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assign mo = aNan ? {1'b1,a[FMSB:0],{FMSB+1{1'b0}}} : (sqrto << 36);
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assign sqrinf = aInf;
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assign sqrneg = !az & so;
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wire [FMSB+2:0] fracta1 = ex1[0] ? {1'b0,fracta} << 1 : {2'b0,fracta};
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isqrt #(FX+1) u2
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(
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        .rst(rst),
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        .clk(clk),
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        .ce(ce),
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        .ld(ld),
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        .a({fracta1,{FMSB+1{1'b0}}}),
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        .o(sqrto),
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        .done(done)
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);
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always @*
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casez({aNan,sqrinf,sqrneg})
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3'b1??: o <= {sa,xa,mo};
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3'b01?: o <= {sa,1'b1,qNaN|`QSQRTINF,{FMSB+1{1'b0}}};
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3'b001: o <= {sa,1'b1,qNaN|`QSQRTNEG,{FMSB+1{1'b0}}};
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default:        o <= {so,xo,mo};
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endcase
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endmodule
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module fpSqrtnr(rst, clk, ce, ld, a, o, rm, done, inf, sqrinf, sqrneg);
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parameter WID=32;
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localparam MSB = WID-1;
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localparam EMSB = WID==128 ? 14 :
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                  WID==96 ? 14 :
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                  WID==80 ? 14 :
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                  WID==64 ? 10 :
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                                  WID==52 ? 10 :
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                                  WID==48 ? 11 :
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                                  WID==44 ? 10 :
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                                  WID==42 ? 10 :
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                                  WID==40 ?  9 :
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                                  WID==32 ?  7 :
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                                  WID==24 ?  6 : 4;
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localparam FMSB = WID==128 ? 111 :
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                  WID==96 ? 79 :
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                  WID==80 ? 63 :
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                  WID==64 ? 51 :
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                                  WID==52 ? 39 :
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                                  WID==48 ? 34 :
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                                  WID==44 ? 31 :
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                                  WID==42 ? 29 :
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                                  WID==40 ? 28 :
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                                  WID==32 ? 22 :
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                                  WID==24 ? 15 : 9;
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localparam FX = (FMSB+2)*2-1;   // the MSB of the expanded fraction
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localparam EX = FX + 1 + EMSB + 1 + 1 - 1;
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input rst;
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input clk;
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input ce;
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input ld;
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input  [MSB:0] a;
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output [MSB:0] o;
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input [2:0] rm;
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output done;
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output inf;
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output sqrinf;
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output sqrneg;
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wire [EX:0] o1;
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wire inf1;
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wire [MSB+3:0] fpn0;
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wire done1;
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fpSqrt      #(WID) u1 (rst, clk, ce, ld, a, o1, done1, sqrinf, sqrneg);
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fpNormalize #(WID) u2(.clk(clk), .ce(ce), .under(1'b0), .i(o1), .o(fpn0) );
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fpRoundReg  #(WID) u3(.clk(clk), .ce(ce), .rm(rm), .i(fpn0), .o(o) );
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delay2      #(1)   u5(.clk(clk), .ce(ce), .i(inf1), .o(inf));
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delay2          #(1)   u8(.clk(clk), .ce(ce), .i(done1), .o(done));
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endmodule
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