OpenCores
URL https://opencores.org/ocsvn/thor/thor/trunk

Subversion Repositories thor

[/] [thor/] [trunk/] [rtl/] [verilog/] [Thor_defines.v] - Blame information for rev 18

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 3 robfinch
// ============================================================================
2
//        __
3
//   \\__/ o\    (C) 2013,2015  Robert Finch, Stratford
4
//    \  __ /    All rights reserved.
5
//     \/_//     robfinch<remove>@finitron.ca
6
//       ||
7
//
8
// This source file is free software: you can redistribute it and/or modify 
9
// it under the terms of the GNU Lesser General Public License as published 
10
// by the Free Software Foundation, either version 3 of the License, or     
11
// (at your option) any later version.                                      
12
//                                                                          
13
// This source file is distributed in the hope that it will be useful,      
14
// but WITHOUT ANY WARRANTY; without even the implied warranty of           
15
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
16
// GNU General Public License for more details.                             
17
//                                                                          
18
// You should have received a copy of the GNU General Public License        
19
// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
20
//
21
//
22
// Thor Scaler
23
//
24
// ============================================================================
25
//
26
`ifndef THOR_DEFINES
27
`define THOR_DEFINES    1'b1
28
 
29
`define SIMULATION      1'b1
30
`define SEGMENTATION    1'b1
31 10 robfinch
//`define SEGLIMITS       1'b1
32 3 robfinch
//`define STACKOPS        1'b1
33 10 robfinch
//`define UNLINKOP        1'b1
34 3 robfinch
//`define BITFIELDOPS     1'b1
35
//`define FLOATING_POINT        1'b1
36
`define STRINGOPS       1'b1
37 10 robfinch
//`define DEBUG_LOGIC     1'b1
38 3 robfinch
//`define THREEWAY    1'b1
39 10 robfinch
//`define TRAP_ILLEGALOPS 1'b1
40 13 robfinch
//`define PRIVCHKS        1'b1
41
//`define PCHIST      1'b1      // Primarily for debugging the processor
42 3 robfinch
 
43
`define TRUE    1'b1
44
`define FALSE   1'b0
45
`define INV             1'b0
46
`define VAL             1'b1
47
`define ZERO            64'd0
48
 
49
 
50 9 robfinch
`define TST                     4'b0000
51
`define CMP                     4'b0001
52
`define CMPI            4'b0010
53
`define BR                      4'b0011
54 3 robfinch
 
55
`define RR                      8'h40
56
`define ADD                             6'h00
57
`define SUB                             6'h01
58
`define MUL                             6'h02
59
`define DIV                             6'h03
60
`define ADDU                    6'h04
61
`define SUBU                    6'h05
62
`define MULU                    6'h06
63
`define DIVU                    6'h07
64
`define _2ADDU                  6'h08
65
`define _4ADDU                  6'h09
66
`define _8ADDU                  6'h0A
67
`define _16ADDU                 6'h0B
68
`define MIN             6'h10
69
`define MAX             6'h11
70 13 robfinch
`define MOD             6'h13
71
`define MODU            6'h17
72 3 robfinch
`define R2          8'h41
73
`define CPUID           4'h0
74
`define REDOR           4'h1    // reduction or
75
`define REDAND          4'h2    // reduction and
76
`define PAR             4'h3    // parity
77
`define P           8'h42
78
`define PAND            6'd0
79
`define POR             6'd1
80
`define PEOR            6'd2
81
`define PNAND           6'd3
82
`define PNOR            6'd4
83
`define PENOR           6'd5
84
`define PANDC           6'd6
85
`define PORC            6'd7
86
`define BITI        8'h46
87
`define ADDUIS      8'h47
88
`define ADDI            8'h48
89
`define SUBI            8'h49
90
`define MULI            8'h4A
91
`define DIVI            8'h4B
92
`define ADDUI           8'h4C
93
`define SUBUI           8'h4D
94
`define MULUI           8'h4E
95
`define DIVUI           8'h4F
96
`define LOGIC           8'h50
97
`define AND                             6'h0
98
`define OR                              6'h1
99
`define EOR                             6'h2
100
`define NAND                    6'h3
101
`define NOR                             6'h4
102
`define ENOR                    6'h5
103
`define ANDC                    6'h6
104
`define ORC                             6'h7
105
`define MLO         8'h51
106
`define ANDI            8'h53
107
`define ORI                     8'h54
108
`define EORI            8'h55
109
 
110
`define SHIFT           8'h58
111
`define SHL                             6'h00
112
`define SHR                             6'h01
113
`define SHLU                    6'h02
114
`define SHRU                    6'h03
115
`define ROL                             6'h04
116
`define ROR                             6'h05
117
`define SHLI                    6'h10
118
`define SHRI                    6'h11
119
`define SHLUI                   6'h12
120
`define SHRUI                   6'h13
121
`define ROLI                    6'h14
122
`define RORI                    6'h15
123 13 robfinch
`define MODI        8'h5B
124 18 robfinch
`define LEA         8'h5C
125 13 robfinch
`define MODUI       8'h5F
126 3 robfinch
 
127 13 robfinch
`define LLA         8'h6A       // compute linear address
128 3 robfinch
`define _2ADDUI         8'h6B
129
`define _4ADDUI         8'h6C
130
`define _8ADDUI         8'h6D
131
`define _16ADDUI        8'h6E
132
`define LDI                     8'h6F
133
 
134
`define MUX                     8'h72
135
 
136
`define FSTAT           8'h73
137
`define FRM                     8'h74
138
`define FTX                     8'h75
139
`define DOUBLE_R    8'h77
140
`define FMOV            4'h00
141
`define FTOI                4'h02
142
`define ITOF                4'h03
143
`define FNEG                    4'h04
144
`define FABS                    4'h05
145
`define FSIGN                   4'h06
146
`define FMAN            4'h07
147
`define FNABS           4'h08
148
`define FSTAT           4'h0C
149
`define FRM             4'h0D
150
`define FLOAT           8'h78
151
`define FCMP            6'h07
152
`define FADD                    6'h08
153
`define FSUB                    6'h09
154
`define FMUL                    6'h0A
155
`define FDIV                    6'h0B
156
`define FCMPS           6'h17
157
`define FADDS           6'h18
158
`define FSUBS           6'h19
159
`define FMULS           6'h1A
160
`define FDIVS           6'h1B
161
`define SINGLE_R    8'h79
162
`define FMOVS           4'h00
163
`define FTOIS               4'h02
164
`define ITOFS               4'h03
165
`define FNEGS                   4'h04
166
`define FABSS                   4'h05
167
`define FSIGNS                  4'h06
168
`define FMANS           4'h07
169
`define FNABSS          4'h08
170
`define FTX             4'h0C
171
`define FCX             4'h0D
172
`define FEX             4'h0E
173
`define FDX             4'h0F
174
 
175
`define LB                      8'h80
176
`define LBU                     8'h81
177
`define LC                      8'h82
178
`define LCU                     8'h83
179
`define LH                      8'h84
180
`define LHU                     8'h85
181
`define LW                      8'h86
182
`define LFS                     8'h87
183
`define LFD                     8'h88
184
`define LVWAR       8'h8B
185
`define SWCR        8'h8C
186 10 robfinch
`define JMPI            8'h8D
187 3 robfinch
`define LWS                     8'h8E
188
`define LCL                 8'h8F
189
 
190
`define SB                      8'h90
191
`define SC                      8'h91
192
`define SH                      8'h92
193
`define SW                      8'h93
194
`define SFS                     8'h94
195
`define SFD                     8'h95
196
`define STI                     8'h96
197
`define CAS                     8'h97
198
`define STS             8'h98
199
`define STMV        8'h99
200
`define STCMP       8'h9A
201
`define STFND       8'h9B
202
 
203
`define LDIT10          8'h9C
204
`define LDIS            8'h9D
205
`define SWS                     8'h9E
206
`define CACHE           8'h9F
207
 
208
// Flow control Opcodes
209
`define JSRZ        8'hA0
210
`define JSRS        8'hA1
211
`define JSR                     8'hA2
212
`define RTS                     8'hA3
213
`define LOOP            8'hA4
214
`define SYS                     8'hA5
215
`define INT                     8'hA6
216
`define R           8'hA7
217
`define MOV                         4'h0
218
`define NEG                         4'h1
219
`define NOT                         4'h2
220
`define ABS             4'h3
221
`define SGN             4'h4
222
`define CNTLZ           4'h5
223
`define CNTLO           4'h6
224
`define CNTPOP          4'h7
225
`define SXB             4'h8
226
`define SXC             4'h9
227
`define SXH             4'hA
228
`define COM             4'hB
229
`define ZXB             4'hC
230
`define ZXC             4'hD
231
`define ZXH             4'hE
232
`define MFSPR           8'hA8
233
`define MTSPR           8'hA9
234
 
235
`define BITFIELD        8'hAA
236
`define BFINS                   4'h0
237
`define BFSET                   4'h1
238
`define BFCLR                   4'h2
239
`define BFCHG                   4'h3
240
`define BFEXTU                  4'h4
241
`define BFEXT                   4'h5
242 9 robfinch
`define BFINSI          4'd6
243 3 robfinch
 
244
`define MOVS            8'hAB
245
// Uncached access instructions
246
`define LVB                     8'hAC
247
`define LVC                     8'hAD
248
`define LVH                     8'hAE
249
`define LVW                     8'hAF
250
 
251
`define LBX                     8'hB0
252
`define LBUX            8'hB1
253
`define LCX                     8'hB2
254
`define LCUX            8'hB3
255
`define LHX                     8'hB4
256
`define LHUX            8'hB5
257
`define LWX                     8'hB6
258 10 robfinch
`define JMPIX       8'hB7
259 13 robfinch
`define LLAX        8'hB8
260 3 robfinch
 
261
`define SBX                     8'hC0
262
`define SCX                     8'hC1
263
`define SHX                     8'hC2
264
`define SWX                     8'hC3
265
`define STIX        8'hC6
266
`define INC         8'hC7
267
`define PUSH        8'hC8
268
`define PEA         8'hC9
269
`define POP         8'hCA
270
`define LINK        8'hCB
271
`define UNLINK      8'hCC
272
 
273
`define TLB                     8'hF0
274
`define TLB_NOP                 4'd0
275
`define TLB_P                   4'd1
276
`define TLB_RD                  4'd2
277
`define TLB_WR                  4'd3
278
`define TLB_WI                  4'd4
279
`define TLB_EN                  4'd5
280
`define TLB_DIS                 4'd6
281
`define TLB_RDREG               4'd7
282
`define TLB_WRREG               4'd8
283
`define TLB_INVALL              4'd9
284
`define NOP                     8'hF1
285
 
286
`define TLBWired                4'h0
287
`define TLBIndex                4'h1
288
`define TLBRandom               4'h2
289
`define TLBPageSize             4'h3
290
`define TLBVirtPage             4'h4
291
`define TLBPhysPage             4'h5
292
`define TLBASID                 4'h7
293
`define TLBDMissAdr             4'd8
294
`define TLBIMissAdr             4'd9
295
`define TLBPageTblAddr  4'd10
296
`define TLBPageTblCtrl  4'd11
297
 
298
`define RTS2        8'hF2
299
`define RTE                     8'hF3
300
`define RTI                     8'hF4
301
`define BCD                     8'hF5
302
`define BCDADD                  8'h00
303
`define BCDSUB                  8'h01
304
`define BCDMUL                  8'h02
305
`define STP         8'hF6
306
`define SYNC        8'hF7
307
`define MEMSB           8'hF8   // synchronization barrier
308
`define MEMDB           8'hF9   // data barrier
309
`define CLI                     8'hFA
310
`define SEI                     8'hFB
311
`define RTD         8'hFC
312
`define IMM                     8'hFF
313
 
314
`define PREDC   3:0
315
`define PREDR   7:4
316
`define OPCODE  15:8
317
`define RA              21:16
318
`define RB              27:22
319
`define INSTRUCTION_RA  21:16
320
`define INSTRUCTION_RB  27:22
321
`define INSTRUCTION_RC  33:28
322
 
323
`define XTBL    4'd12
324
`define EPC             4'd13
325
`define IPC             4'd14
326
 
327
// Special Registers
328
`define PREGS           6'h0x
329
`define CREGS                   6'h1x
330
`define SREGS                   6'h2x
331
`define PREGS_ALL               6'h30
332
`define TICK                    6'h32
333
`define LCTR                    6'h33
334
`define ASID                    6'h36
335
`define SR                              6'h37
336
`define FPSCR           6'h38
337
`define CLK_THROTTLE    6'h3F
338
 
339
// exception types:
340
`define EXC_NONE        4'd0
341
`define EXC_HALT        4'd1
342
`define EXC_TLBMISS     4'd2
343
`define EXC_SEGV        4'd3
344
`define EXC_INVALID     4'd4
345
`define EXC_SYS         4'd5
346
`define EXC_INT         4'd6
347
`define EXC_OFL         4'd7
348
`define EXC_DBE         4'd8            // databus error
349
`define EXC_DBZ         4'd9            // divide by zero
350
`define EXC_FLT     4'd10       // floating point exception
351
`define EXC_DBG     4'd11
352
`define EXC_PRIV    4'd12
353
//
354
// define PANIC types
355
//
356
`define PANIC_NONE              4'd0
357
`define PANIC_FETCHBUFBEQ       4'd1
358
`define PANIC_INVALIDISLOT      4'd2
359
`define PANIC_MEMORYRACE        4'd3
360
`define PANIC_IDENTICALDRAMS    4'd4
361
`define PANIC_OVERRUN           4'd5
362
`define PANIC_HALTINSTRUCTION   4'd6
363
`define PANIC_INVALIDMEMOP      4'd7
364
`define PANIC_INVALIDFBSTATE    4'd9
365
`define PANIC_INVALIDIQSTATE    4'd10
366
`define PANIC_BRANCHBACK        4'd11
367
`define PANIC_BADTARGETID       4'd12
368
 
369
`define DRAMSLOT_AVAIL  2'b00
370
`define DRAMREQ_READY   2'b11
371
 
372
`endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.