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[/] [tiny_tate_bilinear_pairing/] [trunk/] [group_size_is_911_bits/] [rtl/] [pairing.v] - Blame information for rev 11

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1 11 homer.hsin
/*
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    Copyright 2012 Homer Hsing
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    This file is part of Tiny Tate Bilinear Pairing Core.
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    Tiny Tate Bilinear Pairing Core is free software: you can redistribute it and/or modify
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    it under the terms of the GNU Lesser General Public License as published by
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    the Free Software Foundation, either version 3 of the License, or
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    (at your option) any later version.
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    Tiny Tate Bilinear Pairing Core is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU Lesser General Public License for more details.
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    You should have received a copy of the GNU Lesser General Public License
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    along with Tiny Tate Bilinear Pairing Core.  If not, see http://www.gnu.org/licenses/lgpl.txt
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*/
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`define M     593         // M is the degree of the irreducible polynomial
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`define WIDTH (2*`M-1)    // width for a GF(3^M) element
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`define WIDTH_D0 1187
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module pairing(clk, reset, sel, addr, w, update, ready, i, o, done);
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   input clk;
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   input reset; // for the arithmethic core
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   input sel;
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   input [5:0] addr;
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   input w;
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   input update; // update reg_in & reg_out
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   input ready;  // shift reg_in & reg_out
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   input i;
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   output o;
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   output done;
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   reg [`WIDTH_D0:0] reg_in, reg_out;
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   wire [`WIDTH_D0:0] out;
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   assign o = reg_out[0];
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   tiny
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      tiny0 (clk, reset, sel, addr, w, reg_in, out, done);
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   always @ (posedge clk) // write LSB firstly
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      if (update) reg_in <= 0;
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      else if (ready) reg_in <= {i,reg_in[`WIDTH_D0:1]};
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   always @ (posedge clk) // read LSB firstly
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      if (update) reg_out <= out;
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      else if (ready) reg_out <= reg_out>>1;
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endmodule

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