OpenCores
URL https://opencores.org/ocsvn/tinycpu/tinycpu/trunk

Subversion Repositories tinycpu

[/] [tinycpu/] [trunk/] [assembler/] [asm.rb] - Blame information for rev 37

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 36 earlz
PREFIX = "MemIn <= x\"";
2
SUFFIX = "\";";
3
SEPERATOR = "\n";
4
 
5
 
6
 
7
class OpcodeByte1
8
  attr_accessor :op, :register, :cond;
9
  def to_hex
10
    s = (op << 4 | register.number << 1 | cond).to_s(16);
11
    if s.length == 1
12
      "0"+s;
13
    elsif s.length == 0
14
      "00";
15
    else
16
      s
17
    end
18
  end
19
end
20 37 earlz
 
21 36 earlz
 
22
 
23 35 earlz
class Register8
24
  attr_accessor :number
25
  def initialize(num)
26
        @number=num
27
  end
28
end
29
 
30 36 earlz
$iftr = 0; #0 for no condition, 1 for if TR, 2 for if not TR
31 37 earlz
$useextra = 0;
32 36 earlz
 
33 35 earlz
def mov_r8_imm8(reg,imm)
34 36 earlz
  o = OpcodeByte1.new();
35
  o.op = 0;
36
  o.register=reg;
37
  if $iftr<2 then
38
    o.cond=$iftr;
39
  else
40
    raise "if_tr_notset is not allowed with this opcode";
41
  end
42
  puts PREFIX + o.to_hex + imm.to_s(16) + SUFFIX;
43
  puts SEPERATOR;
44 35 earlz
end
45 37 earlz
def mov_rm8_imm8(reg,imm)
46
  o=OpcodeByte1.new();
47
  o.op=1;
48
  o.register=reg;
49
  if $iftr<2 then
50
    o.cond=$iftr;
51
  else
52
    raise "if_tr_notset is not allowed with this opcode";
53
  end
54
  puts PREFIX + o.to_hex + imm.to_s(16) + SUFFIX;
55
  puts SEPERATOR;
56
end
57
 
58 35 earlz
 
59
def mov(arg1,arg2)
60 37 earlz
  if arg1.kind_of? Register8 and arg2.kind_of? Integer and arg2<0x100 then
61
    mov_r8_imm8 arg1,arg2
62
  elsif arg1.kind_of? Array and arg2.kind_of? Integer and arg2<0x100 then
63
    if arg1.length>1 or arg1.length<1 then
64
      raise "memory reference is not correct. Only a register is allowed";
65
    end
66
    reg=arg1[0];
67
    mov_rm8_imm8 reg, arg2
68
  else
69
    raise "No suitable mov opcode found";
70
  end
71
 
72 35 earlz
end
73 36 earlz
def if_tr_set
74
  $iftr = 1
75
  yield
76
  $iftr = 0
77
end
78 35 earlz
 
79
 
80 36 earlz
r0=Register8.new(0)
81
r1=Register8.new(1)
82
r2=Register8.new(2)
83
r3=Register8.new(3)
84
 
85
#test code follows. Only do it here for convenience.. real usage should prefix assembly files with `require "asm.rb"`
86
if_tr_set{
87
  mov r1,0x10
88
}
89 37 earlz
mov r1,0x20
90
mov [r1], 0x50

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.