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This is the design of TinyCPU. It's goals are as follows:
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1. 8-bit registers and operations (8 bit processor)
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2. 16-bit address bus
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3. fixed 16-bit instruction length
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4. use a small amount of "rich" instructions to do powerful things
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5. 1 instruction per clock cycle
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Register list:
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r0-r2 general purpose registers
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ip instruction pointer register (represented as r3)
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cs, ds, es, ss segment registers (code segment, data segment, extra segment, stack segment)
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tr truth register for conditionals
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general opcode format
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first byte:
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first 4 bits: actual instruction
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next 2 bits: (target) register
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last 2 bits: conditional
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second byte:
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first 1 bit: use segment registers
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next 1 bit: exchange target and source register
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next 2 bits: other register
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next 1 bit: dereference first register for memory (respecting the "exchange" bit)
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next 3 bits: extra opcode information(optional) or last two bits is third register (such as for ADD it could be target=source+third_register)
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...or second byte is immediate value
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For opcodes requiring 3 registers but without room, the target opcode is assume to be the second operation. Such as for AND, target=source AND target
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short list of instructions: (not final, still planning)
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1 -move immediate (only uses first byte)
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2 -move
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3 -push
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4 -push immediate
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5 -push and move (or call when acting on ip)
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6 -compare (is less than, is less than or equal, is greater than, is greater than or equal, is equal, is not equal) (6 conditions room for 2 more in extra)
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7 -add
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8 -subtract
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9 -bitwise operations (xor, or, and, shift right, shift left, not)
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x -multiply (if room)
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x -divide
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conditionals
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00 -- always
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01 -- if true
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10 -- if false
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11 -- reserved/not used
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push
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pop
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move
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add
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sub

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