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mongoq |
Timing Analyzer report for tm1637
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Sat Mar 13 16:24:04 2021
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Quartus Prime Version 20.1.0 Build 711 06/05/2020 SJ Lite Edition
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; Table of Contents ;
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1. Legal Notice
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2. Timing Analyzer Summary
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3. Parallel Compilation
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4. SDC File List
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5. Clocks
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6. Slow 1200mV 85C Model Fmax Summary
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7. Timing Closure Recommendations
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8. Slow 1200mV 85C Model Setup Summary
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9. Slow 1200mV 85C Model Hold Summary
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10. Slow 1200mV 85C Model Recovery Summary
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11. Slow 1200mV 85C Model Removal Summary
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12. Slow 1200mV 85C Model Minimum Pulse Width Summary
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13. Slow 1200mV 85C Model Setup: 'clk25'
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14. Slow 1200mV 85C Model Hold: 'clk25'
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15. Slow 1200mV 85C Model Metastability Summary
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16. Slow 1200mV 0C Model Fmax Summary
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17. Slow 1200mV 0C Model Setup Summary
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18. Slow 1200mV 0C Model Hold Summary
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19. Slow 1200mV 0C Model Recovery Summary
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20. Slow 1200mV 0C Model Removal Summary
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21. Slow 1200mV 0C Model Minimum Pulse Width Summary
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22. Slow 1200mV 0C Model Setup: 'clk25'
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23. Slow 1200mV 0C Model Hold: 'clk25'
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24. Slow 1200mV 0C Model Metastability Summary
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25. Fast 1200mV 0C Model Setup Summary
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26. Fast 1200mV 0C Model Hold Summary
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27. Fast 1200mV 0C Model Recovery Summary
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28. Fast 1200mV 0C Model Removal Summary
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29. Fast 1200mV 0C Model Minimum Pulse Width Summary
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30. Fast 1200mV 0C Model Setup: 'clk25'
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31. Fast 1200mV 0C Model Hold: 'clk25'
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32. Fast 1200mV 0C Model Metastability Summary
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33. Multicorner Timing Analysis Summary
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34. Board Trace Model Assignments
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35. Input Transition Times
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36. Signal Integrity Metrics (Slow 1200mv 0c Model)
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37. Signal Integrity Metrics (Slow 1200mv 85c Model)
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38. Signal Integrity Metrics (Fast 1200mv 0c Model)
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39. Setup Transfers
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40. Hold Transfers
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41. Report TCCS
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42. Report RSKM
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43. Unconstrained Paths Summary
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44. Clock Status Summary
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45. Unconstrained Output Ports
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46. Unconstrained Output Ports
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47. Timing Analyzer Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 2020 Intel Corporation. All rights reserved.
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Your use of Intel Corporation's design tools, logic functions
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and other software and tools, and any partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Intel Program License
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Subscription Agreement, the Intel Quartus Prime License Agreement,
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the Intel FPGA IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Intel and sold by Intel or its authorized distributors. Please
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refer to the applicable agreement for further details, at
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https://fpgasoftware.intel.com/eula.
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+-----------------------------------------------------------------------------+
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; Timing Analyzer Summary ;
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+-----------------------+-----------------------------------------------------+
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; Quartus Prime Version ; Version 20.1.0 Build 711 06/05/2020 SJ Lite Edition ;
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; Timing Analyzer ; Legacy Timing Analyzer ;
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; Revision Name ; tm1637 ;
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; Device Family ; Cyclone IV E ;
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; Device Name ; EP4CE6E22C8 ;
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; Timing Models ; Final ;
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; Delay Model ; Combined ;
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; Rise/Fall Delays ; Enabled ;
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+-----------------------+-----------------------------------------------------+
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+------------------------------------------+
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; Parallel Compilation ;
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+----------------------------+-------------+
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; Processors ; Number ;
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+----------------------------+-------------+
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; Number detected on machine ; 4 ;
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; Maximum allowed ; 2 ;
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; ; ;
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; Average used ; 1.10 ;
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; Maximum used ; 2 ;
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; ; ;
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; Usage by Processor ; % Time Used ;
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; Processor 1 ; 100.0% ;
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; Processor 2 ; 10.3% ;
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+----------------------------+-------------+
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+---------------------------------------------------+
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; SDC File List ;
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+---------------+--------+--------------------------+
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; SDC File Path ; Status ; Read at ;
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+---------------+--------+--------------------------+
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; tm1637.sdc ; OK ; Sat Mar 13 16:24:03 2021 ;
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+---------------+--------+--------------------------+
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Clocks ;
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+------------+------+--------+-----------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------+
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; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ;
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+------------+------+--------+-----------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------+
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; clk25 ; Base ; 25.000 ; 40.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk25 } ;
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+------------+------+--------+-----------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------+
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+-------------------------------------------------+
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; Slow 1200mV 85C Model Fmax Summary ;
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+-----------+-----------------+------------+------+
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; Fmax ; Restricted Fmax ; Clock Name ; Note ;
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+-----------+-----------------+------------+------+
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; 72.03 MHz ; 72.03 MHz ; clk25 ; ;
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+-----------+-----------------+------------+------+
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This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
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----------------------------------
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; Timing Closure Recommendations ;
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----------------------------------
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HTML report is unavailable in plain text report export.
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+-------------------------------------+
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; Slow 1200mV 85C Model Setup Summary ;
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+-------+--------+--------------------+
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; Clock ; Slack ; End Point TNS ;
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+-------+--------+--------------------+
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; clk25 ; 11.116 ; 0.000 ;
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+-------+--------+--------------------+
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+------------------------------------+
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; Slow 1200mV 85C Model Hold Summary ;
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+-------+-------+--------------------+
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; Clock ; Slack ; End Point TNS ;
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+-------+-------+--------------------+
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; clk25 ; 0.454 ; 0.000 ;
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+-------+-------+--------------------+
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------------------------------------------
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; Slow 1200mV 85C Model Recovery Summary ;
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------------------------------------------
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No paths to report.
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-----------------------------------------
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; Slow 1200mV 85C Model Removal Summary ;
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-----------------------------------------
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No paths to report.
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+---------------------------------------------------+
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; Slow 1200mV 85C Model Minimum Pulse Width Summary ;
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+-------+-------+-----------------------------------+
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; Clock ; Slack ; End Point TNS ;
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+-------+-------+-----------------------------------+
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; clk25 ; 0.281 ; 0.000 ;
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+-------+-------+-----------------------------------+
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Setup: 'clk25' ;
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+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
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; 11.116 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.812 ;
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; 11.305 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.623 ;
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; 11.353 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.575 ;
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; 11.379 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.549 ;
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; 11.505 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.423 ;
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; 11.510 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.418 ;
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; 11.580 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.348 ;
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; 11.612 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.316 ;
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; 11.627 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.301 ;
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; 11.632 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.296 ;
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; 11.643 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.285 ;
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; 11.666 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.262 ;
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; 11.674 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.254 ;
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; 11.681 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 13.229 ;
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; 11.870 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 13.040 ;
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; 11.881 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 13.047 ;
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; 11.918 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.992 ;
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; 11.932 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 12.996 ;
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; 11.944 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.966 ;
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; 11.974 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.073 ; 12.954 ;
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; 12.070 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.075 ; 12.856 ;
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; 12.070 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.840 ;
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; 12.075 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.835 ;
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; 12.118 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.809 ;
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; 12.145 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.765 ;
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; 12.177 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.733 ;
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; 12.192 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.718 ;
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; 12.197 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.713 ;
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; 12.208 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.702 ;
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; 12.215 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.712 ;
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; 12.231 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.679 ;
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; 12.239 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.671 ;
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; 12.255 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.075 ; 12.671 ;
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; 12.264 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.075 ; 12.662 ;
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; 12.305 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.075 ; 12.621 ;
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; 12.427 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.500 ;
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; 12.446 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.464 ;
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225 |
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; 12.497 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.413 ;
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; 12.539 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.371 ;
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; 12.562 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.365 ;
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; 12.592 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.075 ; 12.334 ;
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; 12.601 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.326 ;
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; 12.635 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.093 ; 12.273 ;
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; 12.662 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.265 ;
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; 12.678 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.232 ;
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; 12.683 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 12.226 ;
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; 12.703 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.224 ;
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; 12.767 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.160 ;
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; 12.780 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 12.129 ;
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; 12.820 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.093 ; 12.088 ;
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; 12.829 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.093 ; 12.079 ;
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|
|
; 12.850 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 12.077 ;
|
240 |
|
|
; 12.867 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 12.043 ;
|
241 |
|
|
; 12.870 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.093 ; 12.038 ;
|
242 |
|
|
; 12.915 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.995 ;
|
243 |
|
|
; 12.941 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.969 ;
|
244 |
|
|
; 12.992 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.917 ;
|
245 |
|
|
; 13.067 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.843 ;
|
246 |
|
|
; 13.072 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.838 ;
|
247 |
|
|
; 13.114 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.074 ; 11.813 ;
|
248 |
|
|
; 13.127 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.782 ;
|
249 |
|
|
; 13.142 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.768 ;
|
250 |
|
|
; 13.157 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.093 ; 11.751 ;
|
251 |
|
|
; 13.166 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.743 ;
|
252 |
|
|
; 13.174 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.736 ;
|
253 |
|
|
; 13.189 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.721 ;
|
254 |
|
|
; 13.194 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.716 ;
|
255 |
|
|
; 13.205 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.705 ;
|
256 |
|
|
; 13.227 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.682 ;
|
257 |
|
|
; 13.228 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.682 ;
|
258 |
|
|
; 13.236 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.674 ;
|
259 |
|
|
; 13.268 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.641 ;
|
260 |
|
|
; 13.332 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.577 ;
|
261 |
|
|
; 13.349 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.075 ; 11.577 ;
|
262 |
|
|
; 13.415 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.494 ;
|
263 |
|
|
; 13.443 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.467 ;
|
264 |
|
|
; 13.494 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.416 ;
|
265 |
|
|
; 13.536 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.091 ; 11.374 ;
|
266 |
|
|
; 13.632 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.093 ; 11.276 ;
|
267 |
|
|
; 13.679 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.230 ;
|
268 |
|
|
; 13.680 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.229 ;
|
269 |
|
|
; 13.777 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 11.132 ;
|
270 |
|
|
; 13.817 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.093 ; 11.091 ;
|
271 |
|
|
; 13.826 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.093 ; 11.082 ;
|
272 |
|
|
; 13.834 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.093 ; 11.074 ;
|
273 |
|
|
; 13.867 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.093 ; 11.041 ;
|
274 |
|
|
; 13.989 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 10.920 ;
|
275 |
|
|
; 14.124 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 10.785 ;
|
276 |
|
|
; 14.154 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.093 ; 10.754 ;
|
277 |
|
|
; 14.163 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 10.746 ;
|
278 |
|
|
; 14.224 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 10.685 ;
|
279 |
|
|
; 14.265 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 10.644 ;
|
280 |
|
|
; 14.329 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 10.580 ;
|
281 |
|
|
; 14.412 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 10.497 ;
|
282 |
|
|
; 14.676 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.092 ; 10.233 ;
|
283 |
|
|
; 14.824 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.093 ; 10.084 ;
|
284 |
|
|
; 17.182 ; tm1637_external_connect:tec|reg_digit0[2] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.063 ; 7.756 ;
|
285 |
|
|
; 17.187 ; tm1637_external_connect:tec|reg_digit0[0] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.063 ; 7.751 ;
|
286 |
|
|
; 17.372 ; tm1637_external_connect:tec|reg_digit0[3] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.063 ; 7.566 ;
|
287 |
|
|
; 17.563 ; tm1637_external_connect:tec|reg_digit0[1] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.063 ; 7.375 ;
|
288 |
|
|
+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
|
289 |
|
|
|
290 |
|
|
|
291 |
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
292 |
|
|
; Slow 1200mV 85C Model Hold: 'clk25' ;
|
293 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
294 |
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
295 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
296 |
|
|
; 0.454 ; tm1637_external_connect:tec|clk ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 0.000 ; 0.080 ; 0.746 ;
|
297 |
|
|
; 0.491 ; tm1637_decimal_count:dc|clkdiv[11] ; tm1637_decimal_count:dc|clkdiv[11] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 0.783 ;
|
298 |
|
|
; 0.500 ; tm1637_decimal_count:dc|d1Next[3] ; tm1637_decimal_count:dc|d1Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.793 ;
|
299 |
|
|
; 0.501 ; tm1637_decimal_count:dc|d100Next[0] ; tm1637_decimal_count:dc|d100Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.794 ;
|
300 |
|
|
; 0.501 ; tm1637_decimal_count:dc|d10Next[1] ; tm1637_decimal_count:dc|d10Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.794 ;
|
301 |
|
|
; 0.501 ; tm1637_decimal_count:dc|d1Next[1] ; tm1637_decimal_count:dc|d1Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.794 ;
|
302 |
|
|
; 0.502 ; tm1637_decimal_count:dc|d10Next[2] ; tm1637_decimal_count:dc|d10Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.795 ;
|
303 |
|
|
; 0.503 ; tm1637_decimal_count:dc|d100Next[2] ; tm1637_decimal_count:dc|d100Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.796 ;
|
304 |
|
|
; 0.512 ; tm1637_decimal_count:dc|clkdiv[9] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.080 ; 0.804 ;
|
305 |
|
|
; 0.524 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.817 ;
|
306 |
|
|
; 0.525 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.818 ;
|
307 |
|
|
; 0.532 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.825 ;
|
308 |
|
|
; 0.533 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.826 ;
|
309 |
|
|
; 0.535 ; tm1637_decimal_count:dc|d100Curr[3] ; tm1637_decimal_count:dc|d100Next[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.828 ;
|
310 |
|
|
; 0.537 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[0] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.830 ;
|
311 |
|
|
; 0.538 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.831 ;
|
312 |
|
|
; 0.656 ; tm1637_decimal_count:dc|clkdiv[10] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.080 ; 0.948 ;
|
313 |
|
|
; 0.686 ; tm1637_decimal_count:dc|d100Next[1] ; tm1637_decimal_count:dc|d100Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.979 ;
|
314 |
|
|
; 0.698 ; tm1637_decimal_count:dc|d1Next[2] ; tm1637_decimal_count:dc|d1Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.991 ;
|
315 |
|
|
; 0.699 ; tm1637_decimal_count:dc|d100Next[3] ; tm1637_decimal_count:dc|d100Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.992 ;
|
316 |
|
|
; 0.699 ; tm1637_decimal_count:dc|d10Next[0] ; tm1637_decimal_count:dc|d10Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.992 ;
|
317 |
|
|
; 0.700 ; tm1637_decimal_count:dc|d10Next[3] ; tm1637_decimal_count:dc|d10Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.993 ;
|
318 |
|
|
; 0.701 ; tm1637_decimal_count:dc|d1000Next[2] ; tm1637_decimal_count:dc|d1000Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.994 ;
|
319 |
|
|
; 0.701 ; tm1637_decimal_count:dc|d1000Next[0] ; tm1637_decimal_count:dc|d1000Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.994 ;
|
320 |
|
|
; 0.702 ; tm1637_decimal_count:dc|d1Next[0] ; tm1637_decimal_count:dc|d1Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 0.995 ;
|
321 |
|
|
; 0.728 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.021 ;
|
322 |
|
|
; 0.730 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.023 ;
|
323 |
|
|
; 0.747 ; tm1637_decimal_count:dc|clkdiv[9] ; tm1637_decimal_count:dc|clkdiv[9] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.039 ;
|
324 |
|
|
; 0.747 ; tm1637_decimal_count:dc|clkdiv[1] ; tm1637_decimal_count:dc|clkdiv[1] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.039 ;
|
325 |
|
|
; 0.747 ; tm1637_decimal_count:dc|clkdiv[7] ; tm1637_decimal_count:dc|clkdiv[7] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.039 ;
|
326 |
|
|
; 0.747 ; tm1637_decimal_count:dc|clkdiv[8] ; tm1637_decimal_count:dc|clkdiv[8] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.039 ;
|
327 |
|
|
; 0.747 ; tm1637_decimal_count:dc|clkdiv[10] ; tm1637_decimal_count:dc|clkdiv[10] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.039 ;
|
328 |
|
|
; 0.748 ; tm1637_decimal_count:dc|clkdiv[2] ; tm1637_decimal_count:dc|clkdiv[2] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.040 ;
|
329 |
|
|
; 0.748 ; tm1637_decimal_count:dc|clkdiv[5] ; tm1637_decimal_count:dc|clkdiv[5] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.040 ;
|
330 |
|
|
; 0.750 ; tm1637_decimal_count:dc|clkdiv[4] ; tm1637_decimal_count:dc|clkdiv[4] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.042 ;
|
331 |
|
|
; 0.750 ; tm1637_decimal_count:dc|clkdiv[6] ; tm1637_decimal_count:dc|clkdiv[6] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.042 ;
|
332 |
|
|
; 0.753 ; tm1637_decimal_count:dc|clkdiv[11] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.045 ;
|
333 |
|
|
; 0.760 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|sm_counter[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.053 ;
|
334 |
|
|
; 0.760 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|sm_counter[15] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.053 ;
|
335 |
|
|
; 0.761 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|sm_counter[19] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.054 ;
|
336 |
|
|
; 0.761 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|sm_counter[11] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.054 ;
|
337 |
|
|
; 0.761 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|sm_counter[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.054 ;
|
338 |
|
|
; 0.762 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|sm_counter[27] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.055 ;
|
339 |
|
|
; 0.762 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|sm_counter[29] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.055 ;
|
340 |
|
|
; 0.762 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|sm_counter[21] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.055 ;
|
341 |
|
|
; 0.762 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|sm_counter[17] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.055 ;
|
342 |
|
|
; 0.763 ; tm1637_decimal_count:dc|clkdiv[3] ; tm1637_decimal_count:dc|clkdiv[3] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.055 ;
|
343 |
|
|
; 0.763 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|sm_counter[31] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.056 ;
|
344 |
|
|
; 0.763 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|sm_counter[16] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.056 ;
|
345 |
|
|
; 0.763 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|sm_counter[6] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.056 ;
|
346 |
|
|
; 0.763 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|sm_counter[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.056 ;
|
347 |
|
|
; 0.764 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|sm_counter[12] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.057 ;
|
348 |
|
|
; 0.764 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|sm_counter[25] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.057 ;
|
349 |
|
|
; 0.764 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|sm_counter[23] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.057 ;
|
350 |
|
|
; 0.764 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|sm_counter[22] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.057 ;
|
351 |
|
|
; 0.764 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|sm_counter[18] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.057 ;
|
352 |
|
|
; 0.764 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|sm_counter[14] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.057 ;
|
353 |
|
|
; 0.765 ; tm1637_decimal_count:dc|clkdiv[0] ; tm1637_decimal_count:dc|clkdiv[0] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.057 ;
|
354 |
|
|
; 0.765 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|sm_counter[30] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.058 ;
|
355 |
|
|
; 0.765 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|sm_counter[20] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.058 ;
|
356 |
|
|
; 0.766 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|sm_counter[28] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.059 ;
|
357 |
|
|
; 0.766 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|sm_counter[26] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.059 ;
|
358 |
|
|
; 0.766 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|sm_counter[24] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.059 ;
|
359 |
|
|
; 0.784 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[0] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.077 ;
|
360 |
|
|
; 0.784 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|sm_counter[5] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.077 ;
|
361 |
|
|
; 0.786 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|sm_counter[7] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.079 ;
|
362 |
|
|
; 0.788 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.081 ;
|
363 |
|
|
; 0.790 ; tm1637_decimal_count:dc|d1000Curr[3] ; tm1637_external_connect:tec|reg_digit0[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.083 ;
|
364 |
|
|
; 0.794 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.087 ;
|
365 |
|
|
; 0.809 ; tm1637_decimal_count:dc|d1000Curr[3] ; tm1637_decimal_count:dc|d1000Next[3] ; clk25 ; clk25 ; 0.000 ; 0.099 ; 1.120 ;
|
366 |
|
|
; 0.818 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.111 ;
|
367 |
|
|
; 0.819 ; tm1637_decimal_count:dc|d1000Next[3] ; tm1637_decimal_count:dc|d1000Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.063 ; 1.094 ;
|
368 |
|
|
; 0.867 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_decimal_count:dc|d100Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.160 ;
|
369 |
|
|
; 0.869 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.162 ;
|
370 |
|
|
; 0.874 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_decimal_count:dc|d1000Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.167 ;
|
371 |
|
|
; 0.887 ; tm1637_decimal_count:dc|d10Curr[0] ; tm1637_decimal_count:dc|d10Next[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.180 ;
|
372 |
|
|
; 0.887 ; tm1637_decimal_count:dc|d10Curr[0] ; tm1637_decimal_count:dc|d10Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.180 ;
|
373 |
|
|
; 0.908 ; tm1637_decimal_count:dc|d1000Next[1] ; tm1637_decimal_count:dc|d1000Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.201 ;
|
374 |
|
|
; 0.911 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_external_connect:tec|reg_digit1[1] ; clk25 ; clk25 ; 0.000 ; 0.082 ; 1.205 ;
|
375 |
|
|
; 0.939 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.232 ;
|
376 |
|
|
; 0.941 ; tm1637_decimal_count:dc|d1Curr[3] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.234 ;
|
377 |
|
|
; 0.942 ; tm1637_decimal_count:dc|d1Curr[3] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.235 ;
|
378 |
|
|
; 0.955 ; tm1637_decimal_count:dc|d100Curr[2] ; tm1637_external_connect:tec|reg_digit1[2] ; clk25 ; clk25 ; 0.000 ; 0.082 ; 1.249 ;
|
379 |
|
|
; 0.980 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.273 ;
|
380 |
|
|
; 1.006 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.299 ;
|
381 |
|
|
; 1.007 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[0] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.300 ;
|
382 |
|
|
; 1.023 ; tm1637_decimal_count:dc|d100Curr[2] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.316 ;
|
383 |
|
|
; 1.029 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_external_connect:tec|reg_digit0[0] ; clk25 ; clk25 ; 0.000 ; 0.063 ; 1.304 ;
|
384 |
|
|
; 1.031 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.324 ;
|
385 |
|
|
; 1.037 ; tm1637_decimal_count:dc|d1000Curr[2] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.330 ;
|
386 |
|
|
; 1.044 ; tm1637_decimal_count:dc|d10Curr[3] ; tm1637_decimal_count:dc|d10Next[3] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.337 ;
|
387 |
|
|
; 1.047 ; tm1637_decimal_count:dc|d1000Curr[2] ; tm1637_external_connect:tec|reg_digit0[2] ; clk25 ; clk25 ; 0.000 ; 0.063 ; 1.322 ;
|
388 |
|
|
; 1.064 ; tm1637_decimal_count:dc|d10Curr[1] ; tm1637_decimal_count:dc|d10Next[1] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.357 ;
|
389 |
|
|
; 1.066 ; tm1637_decimal_count:dc|d10Curr[2] ; tm1637_decimal_count:dc|d10Next[2] ; clk25 ; clk25 ; 0.000 ; 0.081 ; 1.359 ;
|
390 |
|
|
; 1.069 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_external_connect:tec|reg_digit0[1] ; clk25 ; clk25 ; 0.000 ; 0.063 ; 1.344 ;
|
391 |
|
|
; 1.101 ; tm1637_decimal_count:dc|clkdiv[7] ; tm1637_decimal_count:dc|clkdiv[8] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.393 ;
|
392 |
|
|
; 1.101 ; tm1637_decimal_count:dc|clkdiv[9] ; tm1637_decimal_count:dc|clkdiv[10] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.393 ;
|
393 |
|
|
; 1.101 ; tm1637_decimal_count:dc|clkdiv[1] ; tm1637_decimal_count:dc|clkdiv[2] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.393 ;
|
394 |
|
|
; 1.102 ; tm1637_decimal_count:dc|clkdiv[5] ; tm1637_decimal_count:dc|clkdiv[6] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.394 ;
|
395 |
|
|
; 1.108 ; tm1637_decimal_count:dc|clkdiv[10] ; tm1637_decimal_count:dc|clkdiv[11] ; clk25 ; clk25 ; 0.000 ; 0.080 ; 1.400 ;
|
396 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
397 |
|
|
|
398 |
|
|
|
399 |
|
|
-----------------------------------------------
|
400 |
|
|
; Slow 1200mV 85C Model Metastability Summary ;
|
401 |
|
|
-----------------------------------------------
|
402 |
|
|
No synchronizer chains to report.
|
403 |
|
|
|
404 |
|
|
|
405 |
|
|
+-------------------------------------------------+
|
406 |
|
|
; Slow 1200mV 0C Model Fmax Summary ;
|
407 |
|
|
+-----------+-----------------+------------+------+
|
408 |
|
|
; Fmax ; Restricted Fmax ; Clock Name ; Note ;
|
409 |
|
|
+-----------+-----------------+------------+------+
|
410 |
|
|
; 77.38 MHz ; 77.38 MHz ; clk25 ; ;
|
411 |
|
|
+-----------+-----------------+------------+------+
|
412 |
|
|
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
|
413 |
|
|
|
414 |
|
|
|
415 |
|
|
+------------------------------------+
|
416 |
|
|
; Slow 1200mV 0C Model Setup Summary ;
|
417 |
|
|
+-------+--------+-------------------+
|
418 |
|
|
; Clock ; Slack ; End Point TNS ;
|
419 |
|
|
+-------+--------+-------------------+
|
420 |
|
|
; clk25 ; 12.076 ; 0.000 ;
|
421 |
|
|
+-------+--------+-------------------+
|
422 |
|
|
|
423 |
|
|
|
424 |
|
|
+-----------------------------------+
|
425 |
|
|
; Slow 1200mV 0C Model Hold Summary ;
|
426 |
|
|
+-------+-------+-------------------+
|
427 |
|
|
; Clock ; Slack ; End Point TNS ;
|
428 |
|
|
+-------+-------+-------------------+
|
429 |
|
|
; clk25 ; 0.402 ; 0.000 ;
|
430 |
|
|
+-------+-------+-------------------+
|
431 |
|
|
|
432 |
|
|
|
433 |
|
|
-----------------------------------------
|
434 |
|
|
; Slow 1200mV 0C Model Recovery Summary ;
|
435 |
|
|
-----------------------------------------
|
436 |
|
|
No paths to report.
|
437 |
|
|
|
438 |
|
|
|
439 |
|
|
----------------------------------------
|
440 |
|
|
; Slow 1200mV 0C Model Removal Summary ;
|
441 |
|
|
----------------------------------------
|
442 |
|
|
No paths to report.
|
443 |
|
|
|
444 |
|
|
|
445 |
|
|
+--------------------------------------------------+
|
446 |
|
|
; Slow 1200mV 0C Model Minimum Pulse Width Summary ;
|
447 |
|
|
+-------+-------+----------------------------------+
|
448 |
|
|
; Clock ; Slack ; End Point TNS ;
|
449 |
|
|
+-------+-------+----------------------------------+
|
450 |
|
|
; clk25 ; 0.272 ; 0.000 ;
|
451 |
|
|
+-------+-------+----------------------------------+
|
452 |
|
|
|
453 |
|
|
|
454 |
|
|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
455 |
|
|
; Slow 1200mV 0C Model Setup: 'clk25' ;
|
456 |
|
|
+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
|
457 |
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
458 |
|
|
+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
|
459 |
|
|
; 12.076 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.862 ;
|
460 |
|
|
; 12.247 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.691 ;
|
461 |
|
|
; 12.362 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.576 ;
|
462 |
|
|
; 12.383 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.555 ;
|
463 |
|
|
; 12.416 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.522 ;
|
464 |
|
|
; 12.474 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.464 ;
|
465 |
|
|
; 12.531 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.407 ;
|
466 |
|
|
; 12.571 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.367 ;
|
467 |
|
|
; 12.576 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.362 ;
|
468 |
|
|
; 12.602 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.336 ;
|
469 |
|
|
; 12.608 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.330 ;
|
470 |
|
|
; 12.609 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.329 ;
|
471 |
|
|
; 12.627 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 12.293 ;
|
472 |
|
|
; 12.641 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.297 ;
|
473 |
|
|
; 12.664 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.066 ; 12.272 ;
|
474 |
|
|
; 12.714 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 12.223 ;
|
475 |
|
|
; 12.791 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.147 ;
|
476 |
|
|
; 12.798 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 12.122 ;
|
477 |
|
|
; 12.803 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 12.134 ;
|
478 |
|
|
; 12.873 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.065 ;
|
479 |
|
|
; 12.879 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.064 ; 12.059 ;
|
480 |
|
|
; 12.913 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 12.007 ;
|
481 |
|
|
; 12.934 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.986 ;
|
482 |
|
|
; 12.967 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.953 ;
|
483 |
|
|
; 13.025 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.895 ;
|
484 |
|
|
; 13.082 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.838 ;
|
485 |
|
|
; 13.094 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 11.843 ;
|
486 |
|
|
; 13.122 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.798 ;
|
487 |
|
|
; 13.127 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.793 ;
|
488 |
|
|
; 13.134 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.066 ; 11.802 ;
|
489 |
|
|
; 13.139 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.066 ; 11.797 ;
|
490 |
|
|
; 13.153 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.767 ;
|
491 |
|
|
; 13.159 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.761 ;
|
492 |
|
|
; 13.160 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.760 ;
|
493 |
|
|
; 13.169 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.066 ; 11.767 ;
|
494 |
|
|
; 13.183 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 11.754 ;
|
495 |
|
|
; 13.184 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 11.753 ;
|
496 |
|
|
; 13.192 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.728 ;
|
497 |
|
|
; 13.215 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.084 ; 11.703 ;
|
498 |
|
|
; 13.265 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 11.654 ;
|
499 |
|
|
; 13.342 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.578 ;
|
500 |
|
|
; 13.354 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 11.565 ;
|
501 |
|
|
; 13.404 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 11.533 ;
|
502 |
|
|
; 13.424 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.496 ;
|
503 |
|
|
; 13.429 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.066 ; 11.507 ;
|
504 |
|
|
; 13.430 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.490 ;
|
505 |
|
|
; 13.566 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.354 ;
|
506 |
|
|
; 13.572 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 11.365 ;
|
507 |
|
|
; 13.611 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 11.326 ;
|
508 |
|
|
; 13.645 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 11.274 ;
|
509 |
|
|
; 13.659 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 11.278 ;
|
510 |
|
|
; 13.685 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.084 ; 11.233 ;
|
511 |
|
|
; 13.690 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.084 ; 11.228 ;
|
512 |
|
|
; 13.720 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.084 ; 11.198 ;
|
513 |
|
|
; 13.734 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 11.185 ;
|
514 |
|
|
; 13.735 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 11.184 ;
|
515 |
|
|
; 13.737 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.183 ;
|
516 |
|
|
; 13.849 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.071 ;
|
517 |
|
|
; 13.873 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.047 ;
|
518 |
|
|
; 13.906 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 11.014 ;
|
519 |
|
|
; 13.955 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.964 ;
|
520 |
|
|
; 13.964 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.956 ;
|
521 |
|
|
; 13.974 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.065 ; 10.963 ;
|
522 |
|
|
; 13.980 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.084 ; 10.938 ;
|
523 |
|
|
; 14.021 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.899 ;
|
524 |
|
|
; 14.061 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.859 ;
|
525 |
|
|
; 14.066 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.854 ;
|
526 |
|
|
; 14.090 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.830 ;
|
527 |
|
|
; 14.092 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.066 ; 10.844 ;
|
528 |
|
|
; 14.098 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.822 ;
|
529 |
|
|
; 14.099 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.821 ;
|
530 |
|
|
; 14.123 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.796 ;
|
531 |
|
|
; 14.131 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.789 ;
|
532 |
|
|
; 14.154 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.084 ; 10.764 ;
|
533 |
|
|
; 14.162 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.757 ;
|
534 |
|
|
; 14.204 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.715 ;
|
535 |
|
|
; 14.210 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.709 ;
|
536 |
|
|
; 14.281 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.639 ;
|
537 |
|
|
; 14.293 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.626 ;
|
538 |
|
|
; 14.363 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.557 ;
|
539 |
|
|
; 14.369 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.082 ; 10.551 ;
|
540 |
|
|
; 14.522 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.084 ; 10.396 ;
|
541 |
|
|
; 14.525 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.394 ;
|
542 |
|
|
; 14.584 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.335 ;
|
543 |
|
|
; 14.624 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.084 ; 10.294 ;
|
544 |
|
|
; 14.629 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.084 ; 10.289 ;
|
545 |
|
|
; 14.659 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.084 ; 10.259 ;
|
546 |
|
|
; 14.673 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.246 ;
|
547 |
|
|
; 14.674 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.245 ;
|
548 |
|
|
; 14.894 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 10.025 ;
|
549 |
|
|
; 14.919 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.084 ; 9.999 ;
|
550 |
|
|
; 15.062 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 9.857 ;
|
551 |
|
|
; 15.101 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 9.818 ;
|
552 |
|
|
; 15.149 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 9.770 ;
|
553 |
|
|
; 15.436 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.084 ; 9.482 ;
|
554 |
|
|
; 15.464 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.083 ; 9.455 ;
|
555 |
|
|
; 17.696 ; tm1637_external_connect:tec|reg_digit0[2] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.056 ; 7.250 ;
|
556 |
|
|
; 17.709 ; tm1637_external_connect:tec|reg_digit0[0] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.056 ; 7.237 ;
|
557 |
|
|
; 17.870 ; tm1637_external_connect:tec|reg_digit0[3] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.056 ; 7.076 ;
|
558 |
|
|
; 18.043 ; tm1637_external_connect:tec|reg_digit0[1] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.056 ; 6.903 ;
|
559 |
|
|
+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
|
560 |
|
|
|
561 |
|
|
|
562 |
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
563 |
|
|
; Slow 1200mV 0C Model Hold: 'clk25' ;
|
564 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
565 |
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
566 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
567 |
|
|
; 0.402 ; tm1637_external_connect:tec|clk ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.669 ;
|
568 |
|
|
; 0.455 ; tm1637_decimal_count:dc|clkdiv[11] ; tm1637_decimal_count:dc|clkdiv[11] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.722 ;
|
569 |
|
|
; 0.470 ; tm1637_decimal_count:dc|d100Next[0] ; tm1637_decimal_count:dc|d100Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.738 ;
|
570 |
|
|
; 0.470 ; tm1637_decimal_count:dc|d1Next[3] ; tm1637_decimal_count:dc|d1Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.737 ;
|
571 |
|
|
; 0.471 ; tm1637_decimal_count:dc|d10Next[2] ; tm1637_decimal_count:dc|d10Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.738 ;
|
572 |
|
|
; 0.471 ; tm1637_decimal_count:dc|d10Next[1] ; tm1637_decimal_count:dc|d10Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.738 ;
|
573 |
|
|
; 0.471 ; tm1637_decimal_count:dc|d1Next[1] ; tm1637_decimal_count:dc|d1Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.738 ;
|
574 |
|
|
; 0.472 ; tm1637_decimal_count:dc|d100Next[2] ; tm1637_decimal_count:dc|d100Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.740 ;
|
575 |
|
|
; 0.481 ; tm1637_decimal_count:dc|clkdiv[9] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.748 ;
|
576 |
|
|
; 0.484 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[1] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.752 ;
|
577 |
|
|
; 0.484 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.752 ;
|
578 |
|
|
; 0.491 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.758 ;
|
579 |
|
|
; 0.492 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.759 ;
|
580 |
|
|
; 0.496 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.763 ;
|
581 |
|
|
; 0.497 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[0] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.764 ;
|
582 |
|
|
; 0.498 ; tm1637_decimal_count:dc|d100Curr[3] ; tm1637_decimal_count:dc|d100Next[3] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.766 ;
|
583 |
|
|
; 0.609 ; tm1637_decimal_count:dc|d100Next[1] ; tm1637_decimal_count:dc|d100Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.877 ;
|
584 |
|
|
; 0.612 ; tm1637_decimal_count:dc|clkdiv[10] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.879 ;
|
585 |
|
|
; 0.646 ; tm1637_decimal_count:dc|d100Next[3] ; tm1637_decimal_count:dc|d100Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.914 ;
|
586 |
|
|
; 0.646 ; tm1637_decimal_count:dc|d1Next[2] ; tm1637_decimal_count:dc|d1Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.913 ;
|
587 |
|
|
; 0.647 ; tm1637_decimal_count:dc|d1000Next[2] ; tm1637_decimal_count:dc|d1000Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.915 ;
|
588 |
|
|
; 0.647 ; tm1637_decimal_count:dc|d1000Next[0] ; tm1637_decimal_count:dc|d1000Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.915 ;
|
589 |
|
|
; 0.647 ; tm1637_decimal_count:dc|d10Next[0] ; tm1637_decimal_count:dc|d10Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.914 ;
|
590 |
|
|
; 0.648 ; tm1637_decimal_count:dc|d10Next[3] ; tm1637_decimal_count:dc|d10Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.915 ;
|
591 |
|
|
; 0.649 ; tm1637_decimal_count:dc|d1Next[0] ; tm1637_decimal_count:dc|d1Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.916 ;
|
592 |
|
|
; 0.669 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.937 ;
|
593 |
|
|
; 0.670 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[1] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.938 ;
|
594 |
|
|
; 0.694 ; tm1637_decimal_count:dc|clkdiv[9] ; tm1637_decimal_count:dc|clkdiv[9] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.961 ;
|
595 |
|
|
; 0.694 ; tm1637_decimal_count:dc|clkdiv[8] ; tm1637_decimal_count:dc|clkdiv[8] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.961 ;
|
596 |
|
|
; 0.694 ; tm1637_decimal_count:dc|clkdiv[10] ; tm1637_decimal_count:dc|clkdiv[10] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.961 ;
|
597 |
|
|
; 0.696 ; tm1637_decimal_count:dc|clkdiv[1] ; tm1637_decimal_count:dc|clkdiv[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.963 ;
|
598 |
|
|
; 0.696 ; tm1637_decimal_count:dc|clkdiv[2] ; tm1637_decimal_count:dc|clkdiv[2] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.963 ;
|
599 |
|
|
; 0.696 ; tm1637_decimal_count:dc|clkdiv[5] ; tm1637_decimal_count:dc|clkdiv[5] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.963 ;
|
600 |
|
|
; 0.696 ; tm1637_decimal_count:dc|clkdiv[7] ; tm1637_decimal_count:dc|clkdiv[7] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.963 ;
|
601 |
|
|
; 0.698 ; tm1637_decimal_count:dc|clkdiv[6] ; tm1637_decimal_count:dc|clkdiv[6] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.965 ;
|
602 |
|
|
; 0.699 ; tm1637_decimal_count:dc|clkdiv[4] ; tm1637_decimal_count:dc|clkdiv[4] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.966 ;
|
603 |
|
|
; 0.700 ; tm1637_decimal_count:dc|clkdiv[11] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.967 ;
|
604 |
|
|
; 0.704 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|sm_counter[3] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.972 ;
|
605 |
|
|
; 0.704 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|sm_counter[15] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.972 ;
|
606 |
|
|
; 0.705 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|sm_counter[11] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.973 ;
|
607 |
|
|
; 0.706 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|sm_counter[29] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.973 ;
|
608 |
|
|
; 0.706 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|sm_counter[21] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.973 ;
|
609 |
|
|
; 0.706 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|sm_counter[19] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.973 ;
|
610 |
|
|
; 0.706 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|sm_counter[1] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.974 ;
|
611 |
|
|
; 0.707 ; tm1637_decimal_count:dc|clkdiv[3] ; tm1637_decimal_count:dc|clkdiv[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.974 ;
|
612 |
|
|
; 0.707 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|sm_counter[27] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.974 ;
|
613 |
|
|
; 0.707 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|sm_counter[17] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.974 ;
|
614 |
|
|
; 0.707 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|sm_counter[6] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.975 ;
|
615 |
|
|
; 0.708 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|sm_counter[31] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.975 ;
|
616 |
|
|
; 0.708 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|sm_counter[22] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.975 ;
|
617 |
|
|
; 0.709 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|sm_counter[25] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.976 ;
|
618 |
|
|
; 0.709 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|sm_counter[23] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.976 ;
|
619 |
|
|
; 0.709 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|sm_counter[14] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.977 ;
|
620 |
|
|
; 0.709 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|sm_counter[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.977 ;
|
621 |
|
|
; 0.710 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|sm_counter[12] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.978 ;
|
622 |
|
|
; 0.710 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|sm_counter[16] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.977 ;
|
623 |
|
|
; 0.711 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|sm_counter[18] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.978 ;
|
624 |
|
|
; 0.712 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|sm_counter[30] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.979 ;
|
625 |
|
|
; 0.712 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|sm_counter[28] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.979 ;
|
626 |
|
|
; 0.712 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|sm_counter[26] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.979 ;
|
627 |
|
|
; 0.712 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|sm_counter[20] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.979 ;
|
628 |
|
|
; 0.713 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|sm_counter[24] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.980 ;
|
629 |
|
|
; 0.715 ; tm1637_decimal_count:dc|clkdiv[0] ; tm1637_decimal_count:dc|clkdiv[0] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.982 ;
|
630 |
|
|
; 0.725 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[0] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.993 ;
|
631 |
|
|
; 0.726 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|sm_counter[5] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.994 ;
|
632 |
|
|
; 0.727 ; tm1637_decimal_count:dc|d1000Curr[3] ; tm1637_external_connect:tec|reg_digit0[3] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.995 ;
|
633 |
|
|
; 0.729 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|sm_counter[7] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 0.997 ;
|
634 |
|
|
; 0.732 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 0.999 ;
|
635 |
|
|
; 0.736 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.003 ;
|
636 |
|
|
; 0.740 ; tm1637_decimal_count:dc|d1000Curr[3] ; tm1637_decimal_count:dc|d1000Next[3] ; clk25 ; clk25 ; 0.000 ; 0.090 ; 1.025 ;
|
637 |
|
|
; 0.740 ; tm1637_decimal_count:dc|d1000Next[3] ; tm1637_decimal_count:dc|d1000Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.056 ; 0.991 ;
|
638 |
|
|
; 0.763 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.030 ;
|
639 |
|
|
; 0.797 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_decimal_count:dc|d100Next[1] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 1.065 ;
|
640 |
|
|
; 0.799 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 1.067 ;
|
641 |
|
|
; 0.803 ; tm1637_decimal_count:dc|d10Curr[0] ; tm1637_decimal_count:dc|d10Next[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.070 ;
|
642 |
|
|
; 0.803 ; tm1637_decimal_count:dc|d10Curr[0] ; tm1637_decimal_count:dc|d10Next[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.070 ;
|
643 |
|
|
; 0.805 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_decimal_count:dc|d1000Next[1] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 1.073 ;
|
644 |
|
|
; 0.837 ; tm1637_decimal_count:dc|d1000Next[1] ; tm1637_decimal_count:dc|d1000Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 1.105 ;
|
645 |
|
|
; 0.852 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_external_connect:tec|reg_digit1[1] ; clk25 ; clk25 ; 0.000 ; 0.074 ; 1.121 ;
|
646 |
|
|
; 0.879 ; tm1637_decimal_count:dc|d100Curr[2] ; tm1637_external_connect:tec|reg_digit1[2] ; clk25 ; clk25 ; 0.000 ; 0.074 ; 1.148 ;
|
647 |
|
|
; 0.884 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.151 ;
|
648 |
|
|
; 0.886 ; tm1637_decimal_count:dc|d1Curr[3] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.153 ;
|
649 |
|
|
; 0.887 ; tm1637_decimal_count:dc|d1Curr[3] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.154 ;
|
650 |
|
|
; 0.895 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 1.163 ;
|
651 |
|
|
; 0.899 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[0] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 1.167 ;
|
652 |
|
|
; 0.917 ; tm1637_decimal_count:dc|d100Curr[2] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 1.185 ;
|
653 |
|
|
; 0.927 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.194 ;
|
654 |
|
|
; 0.941 ; tm1637_decimal_count:dc|d10Curr[2] ; tm1637_decimal_count:dc|d10Next[2] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.208 ;
|
655 |
|
|
; 0.961 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_external_connect:tec|reg_digit0[0] ; clk25 ; clk25 ; 0.000 ; 0.056 ; 1.212 ;
|
656 |
|
|
; 0.966 ; tm1637_decimal_count:dc|d1000Curr[2] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.073 ; 1.234 ;
|
657 |
|
|
; 0.972 ; tm1637_decimal_count:dc|d10Curr[3] ; tm1637_decimal_count:dc|d10Next[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.239 ;
|
658 |
|
|
; 0.975 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.242 ;
|
659 |
|
|
; 0.985 ; tm1637_decimal_count:dc|d1000Curr[2] ; tm1637_external_connect:tec|reg_digit0[2] ; clk25 ; clk25 ; 0.000 ; 0.056 ; 1.236 ;
|
660 |
|
|
; 1.004 ; tm1637_decimal_count:dc|d10Curr[1] ; tm1637_decimal_count:dc|d10Next[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.271 ;
|
661 |
|
|
; 1.007 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_external_connect:tec|reg_digit0[1] ; clk25 ; clk25 ; 0.000 ; 0.056 ; 1.258 ;
|
662 |
|
|
; 1.013 ; tm1637_decimal_count:dc|clkdiv[10] ; tm1637_decimal_count:dc|clkdiv[11] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.280 ;
|
663 |
|
|
; 1.013 ; tm1637_decimal_count:dc|clkdiv[8] ; tm1637_decimal_count:dc|clkdiv[9] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.280 ;
|
664 |
|
|
; 1.013 ; tm1637_decimal_count:dc|clkdiv[0] ; tm1637_decimal_count:dc|clkdiv[1] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.280 ;
|
665 |
|
|
; 1.015 ; tm1637_decimal_count:dc|clkdiv[2] ; tm1637_decimal_count:dc|clkdiv[3] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.282 ;
|
666 |
|
|
; 1.017 ; tm1637_decimal_count:dc|clkdiv[6] ; tm1637_decimal_count:dc|clkdiv[7] ; clk25 ; clk25 ; 0.000 ; 0.072 ; 1.284 ;
|
667 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
668 |
|
|
|
669 |
|
|
|
670 |
|
|
----------------------------------------------
|
671 |
|
|
; Slow 1200mV 0C Model Metastability Summary ;
|
672 |
|
|
----------------------------------------------
|
673 |
|
|
No synchronizer chains to report.
|
674 |
|
|
|
675 |
|
|
|
676 |
|
|
+------------------------------------+
|
677 |
|
|
; Fast 1200mV 0C Model Setup Summary ;
|
678 |
|
|
+-------+--------+-------------------+
|
679 |
|
|
; Clock ; Slack ; End Point TNS ;
|
680 |
|
|
+-------+--------+-------------------+
|
681 |
|
|
; clk25 ; 18.963 ; 0.000 ;
|
682 |
|
|
+-------+--------+-------------------+
|
683 |
|
|
|
684 |
|
|
|
685 |
|
|
+-----------------------------------+
|
686 |
|
|
; Fast 1200mV 0C Model Hold Summary ;
|
687 |
|
|
+-------+-------+-------------------+
|
688 |
|
|
; Clock ; Slack ; End Point TNS ;
|
689 |
|
|
+-------+-------+-------------------+
|
690 |
|
|
; clk25 ; 0.187 ; 0.000 ;
|
691 |
|
|
+-------+-------+-------------------+
|
692 |
|
|
|
693 |
|
|
|
694 |
|
|
-----------------------------------------
|
695 |
|
|
; Fast 1200mV 0C Model Recovery Summary ;
|
696 |
|
|
-----------------------------------------
|
697 |
|
|
No paths to report.
|
698 |
|
|
|
699 |
|
|
|
700 |
|
|
----------------------------------------
|
701 |
|
|
; Fast 1200mV 0C Model Removal Summary ;
|
702 |
|
|
----------------------------------------
|
703 |
|
|
No paths to report.
|
704 |
|
|
|
705 |
|
|
|
706 |
|
|
+--------------------------------------------------+
|
707 |
|
|
; Fast 1200mV 0C Model Minimum Pulse Width Summary ;
|
708 |
|
|
+-------+-------+----------------------------------+
|
709 |
|
|
; Clock ; Slack ; End Point TNS ;
|
710 |
|
|
+-------+-------+----------------------------------+
|
711 |
|
|
; clk25 ; 0.500 ; 0.000 ;
|
712 |
|
|
+-------+-------+----------------------------------+
|
713 |
|
|
|
714 |
|
|
|
715 |
|
|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
716 |
|
|
; Fast 1200mV 0C Model Setup: 'clk25' ;
|
717 |
|
|
+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
|
718 |
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
719 |
|
|
+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
|
720 |
|
|
; 18.963 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.991 ;
|
721 |
|
|
; 19.036 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.918 ;
|
722 |
|
|
; 19.042 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.912 ;
|
723 |
|
|
; 19.055 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.899 ;
|
724 |
|
|
; 19.120 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.834 ;
|
725 |
|
|
; 19.135 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.819 ;
|
726 |
|
|
; 19.142 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.812 ;
|
727 |
|
|
; 19.144 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.810 ;
|
728 |
|
|
; 19.152 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.802 ;
|
729 |
|
|
; 19.153 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.801 ;
|
730 |
|
|
; 19.185 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.769 ;
|
731 |
|
|
; 19.197 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.757 ;
|
732 |
|
|
; 19.206 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.035 ; 5.746 ;
|
733 |
|
|
; 19.215 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.739 ;
|
734 |
|
|
; 19.219 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.725 ;
|
735 |
|
|
; 19.235 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.719 ;
|
736 |
|
|
; 19.274 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.680 ;
|
737 |
|
|
; 19.277 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.677 ;
|
738 |
|
|
; 19.292 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.652 ;
|
739 |
|
|
; 19.298 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.646 ;
|
740 |
|
|
; 19.311 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.633 ;
|
741 |
|
|
; 19.317 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.637 ;
|
742 |
|
|
; 19.319 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.635 ;
|
743 |
|
|
; 19.367 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.577 ;
|
744 |
|
|
; 19.376 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.568 ;
|
745 |
|
|
; 19.398 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.546 ;
|
746 |
|
|
; 19.400 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.544 ;
|
747 |
|
|
; 19.408 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.536 ;
|
748 |
|
|
; 19.409 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.535 ;
|
749 |
|
|
; 19.416 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.538 ;
|
750 |
|
|
; 19.424 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.530 ;
|
751 |
|
|
; 19.441 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.503 ;
|
752 |
|
|
; 19.453 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.491 ;
|
753 |
|
|
; 19.462 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.045 ; 5.480 ;
|
754 |
|
|
; 19.468 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.035 ; 5.484 ;
|
755 |
|
|
; 19.469 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.485 ;
|
756 |
|
|
; 19.469 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.035 ; 5.483 ;
|
757 |
|
|
; 19.471 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.473 ;
|
758 |
|
|
; 19.485 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.035 ; 5.467 ;
|
759 |
|
|
; 19.491 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.453 ;
|
760 |
|
|
; 19.530 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.414 ;
|
761 |
|
|
; 19.533 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.411 ;
|
762 |
|
|
; 19.559 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.395 ;
|
763 |
|
|
; 19.573 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.371 ;
|
764 |
|
|
; 19.575 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.369 ;
|
765 |
|
|
; 19.609 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.035 ; 5.343 ;
|
766 |
|
|
; 19.633 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.321 ;
|
767 |
|
|
; 19.646 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.308 ;
|
768 |
|
|
; 19.649 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.295 ;
|
769 |
|
|
; 19.672 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.272 ;
|
770 |
|
|
; 19.675 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.279 ;
|
771 |
|
|
; 19.680 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.264 ;
|
772 |
|
|
; 19.722 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.222 ;
|
773 |
|
|
; 19.724 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.045 ; 5.218 ;
|
774 |
|
|
; 19.725 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.219 ;
|
775 |
|
|
; 19.725 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.045 ; 5.217 ;
|
776 |
|
|
; 19.728 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.216 ;
|
777 |
|
|
; 19.741 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.203 ;
|
778 |
|
|
; 19.741 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.045 ; 5.201 ;
|
779 |
|
|
; 19.772 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.172 ;
|
780 |
|
|
; 19.776 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.035 ; 5.176 ;
|
781 |
|
|
; 19.806 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.138 ;
|
782 |
|
|
; 19.815 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.129 ;
|
783 |
|
|
; 19.828 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.116 ;
|
784 |
|
|
; 19.829 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.033 ; 5.125 ;
|
785 |
|
|
; 19.830 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.114 ;
|
786 |
|
|
; 19.838 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.106 ;
|
787 |
|
|
; 19.839 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.105 ;
|
788 |
|
|
; 19.850 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.094 ;
|
789 |
|
|
; 19.865 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.045 ; 5.077 ;
|
790 |
|
|
; 19.871 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.073 ;
|
791 |
|
|
; 19.889 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.055 ;
|
792 |
|
|
; 19.892 ; tm1637_external_connect:tec|sm_counter[4] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.045 ; 5.050 ;
|
793 |
|
|
; 19.901 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.043 ;
|
794 |
|
|
; 19.902 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.042 ;
|
795 |
|
|
; 19.921 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.023 ;
|
796 |
|
|
; 19.931 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 5.013 ;
|
797 |
|
|
; 19.960 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.984 ;
|
798 |
|
|
; 19.963 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.981 ;
|
799 |
|
|
; 20.003 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.941 ;
|
800 |
|
|
; 20.005 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.939 ;
|
801 |
|
|
; 20.008 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.045 ; 4.934 ;
|
802 |
|
|
; 20.085 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|dio~en ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.859 ;
|
803 |
|
|
; 20.102 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.842 ;
|
804 |
|
|
; 20.110 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.834 ;
|
805 |
|
|
; 20.154 ; tm1637_external_connect:tec|sm_counter[8] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.045 ; 4.788 ;
|
806 |
|
|
; 20.155 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.789 ;
|
807 |
|
|
; 20.155 ; tm1637_external_connect:tec|sm_counter[10] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.045 ; 4.787 ;
|
808 |
|
|
; 20.171 ; tm1637_external_connect:tec|sm_counter[9] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.045 ; 4.771 ;
|
809 |
|
|
; 20.245 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.699 ;
|
810 |
|
|
; 20.295 ; tm1637_external_connect:tec|sm_counter[13] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.045 ; 4.647 ;
|
811 |
|
|
; 20.300 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.644 ;
|
812 |
|
|
; 20.318 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.626 ;
|
813 |
|
|
; 20.361 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.583 ;
|
814 |
|
|
; 20.413 ; tm1637_external_connect:tec|sm_counter[0] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.045 ; 4.529 ;
|
815 |
|
|
; 20.515 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 25.000 ; -0.043 ; 4.429 ;
|
816 |
|
|
; 21.566 ; tm1637_external_connect:tec|reg_digit0[2] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.027 ; 3.394 ;
|
817 |
|
|
; 21.649 ; tm1637_external_connect:tec|reg_digit0[0] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.027 ; 3.311 ;
|
818 |
|
|
; 21.682 ; tm1637_external_connect:tec|reg_digit0[3] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.027 ; 3.278 ;
|
819 |
|
|
; 21.746 ; tm1637_external_connect:tec|reg_digit0[1] ; tm1637_external_connect:tec|dio~reg0 ; clk25 ; clk25 ; 25.000 ; -0.027 ; 3.214 ;
|
820 |
|
|
+--------+--------------------------------------------+--------------------------------------+--------------+-------------+--------------+------------+------------+
|
821 |
|
|
|
822 |
|
|
|
823 |
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
824 |
|
|
; Fast 1200mV 0C Model Hold: 'clk25' ;
|
825 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
826 |
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
827 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
828 |
|
|
; 0.187 ; tm1637_external_connect:tec|clk ; tm1637_external_connect:tec|clk ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.307 ;
|
829 |
|
|
; 0.193 ; tm1637_decimal_count:dc|d100Next[0] ; tm1637_decimal_count:dc|d100Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.314 ;
|
830 |
|
|
; 0.193 ; tm1637_decimal_count:dc|d1Next[3] ; tm1637_decimal_count:dc|d1Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.313 ;
|
831 |
|
|
; 0.194 ; tm1637_decimal_count:dc|d10Next[2] ; tm1637_decimal_count:dc|d10Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.314 ;
|
832 |
|
|
; 0.194 ; tm1637_decimal_count:dc|d10Next[1] ; tm1637_decimal_count:dc|d10Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.314 ;
|
833 |
|
|
; 0.194 ; tm1637_decimal_count:dc|d1Next[1] ; tm1637_decimal_count:dc|d1Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.314 ;
|
834 |
|
|
; 0.195 ; tm1637_decimal_count:dc|d100Next[2] ; tm1637_decimal_count:dc|d100Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.316 ;
|
835 |
|
|
; 0.196 ; tm1637_decimal_count:dc|clkdiv[11] ; tm1637_decimal_count:dc|clkdiv[11] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.316 ;
|
836 |
|
|
; 0.201 ; tm1637_decimal_count:dc|clkdiv[9] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.321 ;
|
837 |
|
|
; 0.208 ; tm1637_decimal_count:dc|d100Curr[3] ; tm1637_decimal_count:dc|d100Next[3] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.329 ;
|
838 |
|
|
; 0.212 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[1] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.333 ;
|
839 |
|
|
; 0.212 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.333 ;
|
840 |
|
|
; 0.217 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.337 ;
|
841 |
|
|
; 0.217 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.337 ;
|
842 |
|
|
; 0.221 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.341 ;
|
843 |
|
|
; 0.226 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[0] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.346 ;
|
844 |
|
|
; 0.259 ; tm1637_decimal_count:dc|d100Next[1] ; tm1637_decimal_count:dc|d100Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.380 ;
|
845 |
|
|
; 0.261 ; tm1637_decimal_count:dc|clkdiv[10] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.381 ;
|
846 |
|
|
; 0.266 ; tm1637_decimal_count:dc|d100Next[3] ; tm1637_decimal_count:dc|d100Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.387 ;
|
847 |
|
|
; 0.267 ; tm1637_decimal_count:dc|d10Next[0] ; tm1637_decimal_count:dc|d10Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.387 ;
|
848 |
|
|
; 0.267 ; tm1637_decimal_count:dc|d1Next[2] ; tm1637_decimal_count:dc|d1Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.387 ;
|
849 |
|
|
; 0.268 ; tm1637_decimal_count:dc|d1000Next[2] ; tm1637_decimal_count:dc|d1000Curr[2] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.389 ;
|
850 |
|
|
; 0.269 ; tm1637_decimal_count:dc|d1000Next[0] ; tm1637_decimal_count:dc|d1000Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.390 ;
|
851 |
|
|
; 0.269 ; tm1637_decimal_count:dc|d10Next[3] ; tm1637_decimal_count:dc|d10Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.389 ;
|
852 |
|
|
; 0.270 ; tm1637_decimal_count:dc|d1Next[0] ; tm1637_decimal_count:dc|d1Curr[0] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.390 ;
|
853 |
|
|
; 0.285 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.406 ;
|
854 |
|
|
; 0.286 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[1] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.407 ;
|
855 |
|
|
; 0.299 ; tm1637_decimal_count:dc|clkdiv[9] ; tm1637_decimal_count:dc|clkdiv[9] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.419 ;
|
856 |
|
|
; 0.299 ; tm1637_decimal_count:dc|clkdiv[5] ; tm1637_decimal_count:dc|clkdiv[5] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.419 ;
|
857 |
|
|
; 0.299 ; tm1637_decimal_count:dc|clkdiv[8] ; tm1637_decimal_count:dc|clkdiv[8] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.419 ;
|
858 |
|
|
; 0.299 ; tm1637_decimal_count:dc|clkdiv[10] ; tm1637_decimal_count:dc|clkdiv[10] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.419 ;
|
859 |
|
|
; 0.300 ; tm1637_decimal_count:dc|clkdiv[1] ; tm1637_decimal_count:dc|clkdiv[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.420 ;
|
860 |
|
|
; 0.300 ; tm1637_decimal_count:dc|clkdiv[2] ; tm1637_decimal_count:dc|clkdiv[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.420 ;
|
861 |
|
|
; 0.300 ; tm1637_decimal_count:dc|clkdiv[4] ; tm1637_decimal_count:dc|clkdiv[4] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.420 ;
|
862 |
|
|
; 0.300 ; tm1637_decimal_count:dc|clkdiv[6] ; tm1637_decimal_count:dc|clkdiv[6] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.420 ;
|
863 |
|
|
; 0.300 ; tm1637_decimal_count:dc|clkdiv[7] ; tm1637_decimal_count:dc|clkdiv[7] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.420 ;
|
864 |
|
|
; 0.303 ; tm1637_decimal_count:dc|clkdiv[11] ; tm1637_decimal_count:dc|ce ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.423 ;
|
865 |
|
|
; 0.303 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|sm_counter[15] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.423 ;
|
866 |
|
|
; 0.304 ; tm1637_external_connect:tec|sm_counter[3] ; tm1637_external_connect:tec|sm_counter[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.424 ;
|
867 |
|
|
; 0.304 ; tm1637_external_connect:tec|sm_counter[31] ; tm1637_external_connect:tec|sm_counter[31] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.424 ;
|
868 |
|
|
; 0.305 ; tm1637_decimal_count:dc|clkdiv[3] ; tm1637_decimal_count:dc|clkdiv[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
869 |
|
|
; 0.305 ; tm1637_external_connect:tec|sm_counter[27] ; tm1637_external_connect:tec|sm_counter[27] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
870 |
|
|
; 0.305 ; tm1637_external_connect:tec|sm_counter[29] ; tm1637_external_connect:tec|sm_counter[29] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
871 |
|
|
; 0.305 ; tm1637_external_connect:tec|sm_counter[21] ; tm1637_external_connect:tec|sm_counter[21] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
872 |
|
|
; 0.305 ; tm1637_external_connect:tec|sm_counter[19] ; tm1637_external_connect:tec|sm_counter[19] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
873 |
|
|
; 0.305 ; tm1637_external_connect:tec|sm_counter[17] ; tm1637_external_connect:tec|sm_counter[17] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
874 |
|
|
; 0.305 ; tm1637_external_connect:tec|sm_counter[11] ; tm1637_external_connect:tec|sm_counter[11] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
875 |
|
|
; 0.305 ; tm1637_external_connect:tec|sm_counter[6] ; tm1637_external_connect:tec|sm_counter[6] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
876 |
|
|
; 0.305 ; tm1637_external_connect:tec|sm_counter[1] ; tm1637_external_connect:tec|sm_counter[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.425 ;
|
877 |
|
|
; 0.306 ; tm1637_external_connect:tec|sm_counter[25] ; tm1637_external_connect:tec|sm_counter[25] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.426 ;
|
878 |
|
|
; 0.306 ; tm1637_external_connect:tec|sm_counter[23] ; tm1637_external_connect:tec|sm_counter[23] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.426 ;
|
879 |
|
|
; 0.306 ; tm1637_external_connect:tec|sm_counter[22] ; tm1637_external_connect:tec|sm_counter[22] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.426 ;
|
880 |
|
|
; 0.306 ; tm1637_external_connect:tec|sm_counter[16] ; tm1637_external_connect:tec|sm_counter[16] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.426 ;
|
881 |
|
|
; 0.306 ; tm1637_external_connect:tec|sm_counter[14] ; tm1637_external_connect:tec|sm_counter[14] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.426 ;
|
882 |
|
|
; 0.306 ; tm1637_external_connect:tec|sm_counter[2] ; tm1637_external_connect:tec|sm_counter[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.426 ;
|
883 |
|
|
; 0.307 ; tm1637_external_connect:tec|sm_counter[12] ; tm1637_external_connect:tec|sm_counter[12] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.427 ;
|
884 |
|
|
; 0.307 ; tm1637_external_connect:tec|sm_counter[30] ; tm1637_external_connect:tec|sm_counter[30] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.427 ;
|
885 |
|
|
; 0.307 ; tm1637_external_connect:tec|sm_counter[24] ; tm1637_external_connect:tec|sm_counter[24] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.427 ;
|
886 |
|
|
; 0.307 ; tm1637_external_connect:tec|sm_counter[20] ; tm1637_external_connect:tec|sm_counter[20] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.427 ;
|
887 |
|
|
; 0.307 ; tm1637_external_connect:tec|sm_counter[18] ; tm1637_external_connect:tec|sm_counter[18] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.427 ;
|
888 |
|
|
; 0.308 ; tm1637_decimal_count:dc|clkdiv[0] ; tm1637_decimal_count:dc|clkdiv[0] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.428 ;
|
889 |
|
|
; 0.308 ; tm1637_external_connect:tec|sm_counter[28] ; tm1637_external_connect:tec|sm_counter[28] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.428 ;
|
890 |
|
|
; 0.308 ; tm1637_external_connect:tec|sm_counter[26] ; tm1637_external_connect:tec|sm_counter[26] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.428 ;
|
891 |
|
|
; 0.316 ; tm1637_decimal_count:dc|d1000Curr[3] ; tm1637_external_connect:tec|reg_digit0[3] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.437 ;
|
892 |
|
|
; 0.316 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_decimal_count:dc|d1000Next[0] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.437 ;
|
893 |
|
|
; 0.316 ; tm1637_external_connect:tec|sm_counter[5] ; tm1637_external_connect:tec|sm_counter[5] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.436 ;
|
894 |
|
|
; 0.317 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.437 ;
|
895 |
|
|
; 0.317 ; tm1637_external_connect:tec|sm_counter[7] ; tm1637_external_connect:tec|sm_counter[7] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.437 ;
|
896 |
|
|
; 0.318 ; tm1637_decimal_count:dc|d1000Curr[3] ; tm1637_decimal_count:dc|d1000Next[3] ; clk25 ; clk25 ; 0.000 ; 0.047 ; 0.449 ;
|
897 |
|
|
; 0.322 ; tm1637_decimal_count:dc|d1Curr[1] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.442 ;
|
898 |
|
|
; 0.324 ; tm1637_decimal_count:dc|d1000Next[3] ; tm1637_decimal_count:dc|d1000Curr[3] ; clk25 ; clk25 ; 0.000 ; 0.027 ; 0.435 ;
|
899 |
|
|
; 0.335 ; tm1637_decimal_count:dc|d1Curr[0] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.455 ;
|
900 |
|
|
; 0.336 ; tm1637_decimal_count:dc|d1000Next[1] ; tm1637_decimal_count:dc|d1000Curr[1] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.457 ;
|
901 |
|
|
; 0.337 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_decimal_count:dc|d100Next[1] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.458 ;
|
902 |
|
|
; 0.338 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_external_connect:tec|reg_digit1[1] ; clk25 ; clk25 ; 0.000 ; 0.038 ; 0.460 ;
|
903 |
|
|
; 0.339 ; tm1637_decimal_count:dc|d100Curr[1] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.460 ;
|
904 |
|
|
; 0.343 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_decimal_count:dc|d1000Next[1] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.464 ;
|
905 |
|
|
; 0.351 ; tm1637_decimal_count:dc|d100Curr[2] ; tm1637_external_connect:tec|reg_digit1[2] ; clk25 ; clk25 ; 0.000 ; 0.038 ; 0.473 ;
|
906 |
|
|
; 0.359 ; tm1637_decimal_count:dc|d10Curr[0] ; tm1637_decimal_count:dc|d10Next[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.479 ;
|
907 |
|
|
; 0.359 ; tm1637_decimal_count:dc|d10Curr[0] ; tm1637_decimal_count:dc|d10Next[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.479 ;
|
908 |
|
|
; 0.382 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.502 ;
|
909 |
|
|
; 0.386 ; tm1637_decimal_count:dc|d1Curr[3] ; tm1637_decimal_count:dc|d1Next[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.506 ;
|
910 |
|
|
; 0.387 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.507 ;
|
911 |
|
|
; 0.387 ; tm1637_decimal_count:dc|d1Curr[3] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.507 ;
|
912 |
|
|
; 0.392 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.513 ;
|
913 |
|
|
; 0.393 ; tm1637_decimal_count:dc|d100Curr[2] ; tm1637_decimal_count:dc|d100Next[2] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.514 ;
|
914 |
|
|
; 0.394 ; tm1637_decimal_count:dc|d100Curr[0] ; tm1637_decimal_count:dc|d100Next[0] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.515 ;
|
915 |
|
|
; 0.405 ; tm1637_decimal_count:dc|d1000Curr[0] ; tm1637_external_connect:tec|reg_digit0[0] ; clk25 ; clk25 ; 0.000 ; 0.027 ; 0.516 ;
|
916 |
|
|
; 0.405 ; tm1637_decimal_count:dc|d10Curr[2] ; tm1637_decimal_count:dc|d10Next[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.525 ;
|
917 |
|
|
; 0.407 ; tm1637_decimal_count:dc|d1Curr[2] ; tm1637_decimal_count:dc|d1Next[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.527 ;
|
918 |
|
|
; 0.410 ; tm1637_decimal_count:dc|d1000Curr[2] ; tm1637_external_connect:tec|reg_digit0[2] ; clk25 ; clk25 ; 0.000 ; 0.027 ; 0.521 ;
|
919 |
|
|
; 0.419 ; tm1637_decimal_count:dc|d1000Curr[1] ; tm1637_external_connect:tec|reg_digit0[1] ; clk25 ; clk25 ; 0.000 ; 0.027 ; 0.530 ;
|
920 |
|
|
; 0.420 ; tm1637_decimal_count:dc|d1000Curr[2] ; tm1637_decimal_count:dc|d1000Next[2] ; clk25 ; clk25 ; 0.000 ; 0.037 ; 0.541 ;
|
921 |
|
|
; 0.424 ; tm1637_decimal_count:dc|d10Curr[3] ; tm1637_decimal_count:dc|d10Next[3] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.544 ;
|
922 |
|
|
; 0.437 ; tm1637_decimal_count:dc|d10Curr[1] ; tm1637_decimal_count:dc|d10Next[1] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.557 ;
|
923 |
|
|
; 0.448 ; tm1637_decimal_count:dc|clkdiv[9] ; tm1637_decimal_count:dc|clkdiv[10] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.568 ;
|
924 |
|
|
; 0.448 ; tm1637_decimal_count:dc|clkdiv[5] ; tm1637_decimal_count:dc|clkdiv[6] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.568 ;
|
925 |
|
|
; 0.449 ; tm1637_decimal_count:dc|clkdiv[7] ; tm1637_decimal_count:dc|clkdiv[8] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.569 ;
|
926 |
|
|
; 0.449 ; tm1637_decimal_count:dc|clkdiv[1] ; tm1637_decimal_count:dc|clkdiv[2] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.569 ;
|
927 |
|
|
; 0.452 ; tm1637_external_connect:tec|sm_counter[15] ; tm1637_external_connect:tec|sm_counter[16] ; clk25 ; clk25 ; 0.000 ; 0.036 ; 0.572 ;
|
928 |
|
|
+-------+--------------------------------------------+--------------------------------------------+--------------+-------------+--------------+------------+------------+
|
929 |
|
|
|
930 |
|
|
|
931 |
|
|
----------------------------------------------
|
932 |
|
|
; Fast 1200mV 0C Model Metastability Summary ;
|
933 |
|
|
----------------------------------------------
|
934 |
|
|
No synchronizer chains to report.
|
935 |
|
|
|
936 |
|
|
|
937 |
|
|
+------------------------------------------------------------------------------+
|
938 |
|
|
; Multicorner Timing Analysis Summary ;
|
939 |
|
|
+------------------+--------+-------+----------+---------+---------------------+
|
940 |
|
|
; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ;
|
941 |
|
|
+------------------+--------+-------+----------+---------+---------------------+
|
942 |
|
|
; Worst-case Slack ; 11.116 ; 0.187 ; N/A ; N/A ; 0.272 ;
|
943 |
|
|
; clk25 ; 11.116 ; 0.187 ; N/A ; N/A ; 0.272 ;
|
944 |
|
|
; Design-wide TNS ; 0.0 ; 0.0 ; 0.0 ; 0.0 ; 0.0 ;
|
945 |
|
|
; clk25 ; 0.000 ; 0.000 ; N/A ; N/A ; 0.000 ;
|
946 |
|
|
+------------------+--------+-------+----------+---------+---------------------+
|
947 |
|
|
|
948 |
|
|
|
949 |
|
|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
950 |
|
|
; Board Trace Model Assignments ;
|
951 |
|
|
+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
|
952 |
|
|
; Pin ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
|
953 |
|
|
+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
|
954 |
|
|
; clk ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
955 |
|
|
; dio ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
956 |
|
|
; ~ALTERA_DCLK~ ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
957 |
|
|
; ~ALTERA_nCEO~ ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
958 |
|
|
+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
|
959 |
|
|
|
960 |
|
|
|
961 |
|
|
+----------------------------------------------------------------------------+
|
962 |
|
|
; Input Transition Times ;
|
963 |
|
|
+-------------------------+--------------+-----------------+-----------------+
|
964 |
|
|
; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
|
965 |
|
|
+-------------------------+--------------+-----------------+-----------------+
|
966 |
|
|
; clk25 ; 2.5 V ; 2000 ps ; 2000 ps ;
|
967 |
|
|
; ~ALTERA_ASDO_DATA1~ ; 2.5 V ; 2000 ps ; 2000 ps ;
|
968 |
|
|
; ~ALTERA_FLASH_nCE_nCSO~ ; 2.5 V ; 2000 ps ; 2000 ps ;
|
969 |
|
|
; ~ALTERA_DATA0~ ; 2.5 V ; 2000 ps ; 2000 ps ;
|
970 |
|
|
+-------------------------+--------------+-----------------+-----------------+
|
971 |
|
|
|
972 |
|
|
|
973 |
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
974 |
|
|
; Signal Integrity Metrics (Slow 1200mv 0c Model) ;
|
975 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
976 |
|
|
; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
|
977 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
978 |
|
|
; clk ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.8e-09 V ; 2.37 V ; -0.00373 V ; 0.104 V ; 0.011 V ; 4.34e-10 s ; 3.82e-10 s ; Yes ; Yes ; 2.32 V ; 2.8e-09 V ; 2.37 V ; -0.00373 V ; 0.104 V ; 0.011 V ; 4.34e-10 s ; 3.82e-10 s ; Yes ; Yes ;
|
979 |
|
|
; dio ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.8e-09 V ; 2.37 V ; -0.00373 V ; 0.104 V ; 0.011 V ; 4.34e-10 s ; 3.82e-10 s ; Yes ; Yes ; 2.32 V ; 2.8e-09 V ; 2.37 V ; -0.00373 V ; 0.104 V ; 0.011 V ; 4.34e-10 s ; 3.82e-10 s ; Yes ; Yes ;
|
980 |
|
|
; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.74e-09 V ; 2.37 V ; -0.0346 V ; 0.198 V ; 0.094 V ; 3.14e-10 s ; 2.92e-10 s ; Yes ; Yes ; 2.32 V ; 1.74e-09 V ; 2.37 V ; -0.0346 V ; 0.198 V ; 0.094 V ; 3.14e-10 s ; 2.92e-10 s ; Yes ; Yes ;
|
981 |
|
|
; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.57e-09 V ; 2.37 V ; -0.00683 V ; 0.171 V ; 0.018 V ; 4.97e-10 s ; 6.66e-10 s ; Yes ; Yes ; 2.32 V ; 2.57e-09 V ; 2.37 V ; -0.00683 V ; 0.171 V ; 0.018 V ; 4.97e-10 s ; 6.66e-10 s ; Yes ; Yes ;
|
982 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
983 |
|
|
|
984 |
|
|
|
985 |
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
986 |
|
|
; Signal Integrity Metrics (Slow 1200mv 85c Model) ;
|
987 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
988 |
|
|
; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
|
989 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
990 |
|
|
; clk ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.85e-07 V ; 2.35 V ; -0.0123 V ; 0.144 V ; 0.042 V ; 4.81e-10 s ; 4.81e-10 s ; Yes ; Yes ; 2.32 V ; 2.85e-07 V ; 2.35 V ; -0.0123 V ; 0.144 V ; 0.042 V ; 4.81e-10 s ; 4.81e-10 s ; Yes ; Yes ;
|
991 |
|
|
; dio ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.85e-07 V ; 2.35 V ; -0.0123 V ; 0.144 V ; 0.042 V ; 4.81e-10 s ; 4.81e-10 s ; Yes ; Yes ; 2.32 V ; 2.85e-07 V ; 2.35 V ; -0.0123 V ; 0.144 V ; 0.042 V ; 4.81e-10 s ; 4.81e-10 s ; Yes ; Yes ;
|
992 |
|
|
; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.55e-07 V ; 2.35 V ; -0.00221 V ; 0.097 V ; 0.005 V ; 4.49e-10 s ; 3.85e-10 s ; Yes ; Yes ; 2.32 V ; 1.55e-07 V ; 2.35 V ; -0.00221 V ; 0.097 V ; 0.005 V ; 4.49e-10 s ; 3.85e-10 s ; Yes ; Yes ;
|
993 |
|
|
; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.54e-07 V ; 2.34 V ; -0.00774 V ; 0.109 V ; 0.026 V ; 6.58e-10 s ; 8.24e-10 s ; Yes ; Yes ; 2.32 V ; 2.54e-07 V ; 2.34 V ; -0.00774 V ; 0.109 V ; 0.026 V ; 6.58e-10 s ; 8.24e-10 s ; Yes ; Yes ;
|
994 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
995 |
|
|
|
996 |
|
|
|
997 |
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
998 |
|
|
; Signal Integrity Metrics (Fast 1200mv 0c Model) ;
|
999 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
1000 |
|
|
; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
|
1001 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
1002 |
|
|
; clk ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;
|
1003 |
|
|
; dio ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;
|
1004 |
|
|
; ~ALTERA_DCLK~ ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.22e-08 V ; 2.74 V ; -0.06 V ; 0.158 V ; 0.08 V ; 2.68e-10 s ; 2.19e-10 s ; Yes ; Yes ; 2.62 V ; 2.22e-08 V ; 2.74 V ; -0.06 V ; 0.158 V ; 0.08 V ; 2.68e-10 s ; 2.19e-10 s ; Yes ; Yes ;
|
1005 |
|
|
; ~ALTERA_nCEO~ ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 3.54e-08 V ; 2.7 V ; -0.00943 V ; 0.276 V ; 0.035 V ; 3.19e-10 s ; 4.99e-10 s ; No ; Yes ; 2.62 V ; 3.54e-08 V ; 2.7 V ; -0.00943 V ; 0.276 V ; 0.035 V ; 3.19e-10 s ; 4.99e-10 s ; No ; Yes ;
|
1006 |
|
|
+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
1007 |
|
|
|
1008 |
|
|
|
1009 |
|
|
+-------------------------------------------------------------------+
|
1010 |
|
|
; Setup Transfers ;
|
1011 |
|
|
+------------+----------+----------+----------+----------+----------+
|
1012 |
|
|
; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
|
1013 |
|
|
+------------+----------+----------+----------+----------+----------+
|
1014 |
|
|
; clk25 ; clk25 ; 15793 ; 0 ; 0 ; 0 ;
|
1015 |
|
|
+------------+----------+----------+----------+----------+----------+
|
1016 |
|
|
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
|
1017 |
|
|
|
1018 |
|
|
|
1019 |
|
|
+-------------------------------------------------------------------+
|
1020 |
|
|
; Hold Transfers ;
|
1021 |
|
|
+------------+----------+----------+----------+----------+----------+
|
1022 |
|
|
; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
|
1023 |
|
|
+------------+----------+----------+----------+----------+----------+
|
1024 |
|
|
; clk25 ; clk25 ; 15793 ; 0 ; 0 ; 0 ;
|
1025 |
|
|
+------------+----------+----------+----------+----------+----------+
|
1026 |
|
|
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
|
1027 |
|
|
|
1028 |
|
|
|
1029 |
|
|
---------------
|
1030 |
|
|
; Report TCCS ;
|
1031 |
|
|
---------------
|
1032 |
|
|
No dedicated SERDES Transmitter circuitry present in device or used in design
|
1033 |
|
|
|
1034 |
|
|
|
1035 |
|
|
---------------
|
1036 |
|
|
; Report RSKM ;
|
1037 |
|
|
---------------
|
1038 |
|
|
No non-DPA dedicated SERDES Receiver circuitry present in device or used in design
|
1039 |
|
|
|
1040 |
|
|
|
1041 |
|
|
+------------------------------------------------+
|
1042 |
|
|
; Unconstrained Paths Summary ;
|
1043 |
|
|
+---------------------------------+-------+------+
|
1044 |
|
|
; Property ; Setup ; Hold ;
|
1045 |
|
|
+---------------------------------+-------+------+
|
1046 |
|
|
; Illegal Clocks ; 0 ; 0 ;
|
1047 |
|
|
; Unconstrained Clocks ; 0 ; 0 ;
|
1048 |
|
|
; Unconstrained Input Ports ; 0 ; 0 ;
|
1049 |
|
|
; Unconstrained Input Port Paths ; 0 ; 0 ;
|
1050 |
|
|
; Unconstrained Output Ports ; 2 ; 2 ;
|
1051 |
|
|
; Unconstrained Output Port Paths ; 3 ; 3 ;
|
1052 |
|
|
+---------------------------------+-------+------+
|
1053 |
|
|
|
1054 |
|
|
|
1055 |
|
|
+-------------------------------------+
|
1056 |
|
|
; Clock Status Summary ;
|
1057 |
|
|
+--------+-------+------+-------------+
|
1058 |
|
|
; Target ; Clock ; Type ; Status ;
|
1059 |
|
|
+--------+-------+------+-------------+
|
1060 |
|
|
; clk25 ; clk25 ; Base ; Constrained ;
|
1061 |
|
|
+--------+-------+------+-------------+
|
1062 |
|
|
|
1063 |
|
|
|
1064 |
|
|
+-----------------------------------------------------------------------------------------------------+
|
1065 |
|
|
; Unconstrained Output Ports ;
|
1066 |
|
|
+-------------+---------------------------------------------------------------------------------------+
|
1067 |
|
|
; Output Port ; Comment ;
|
1068 |
|
|
+-------------+---------------------------------------------------------------------------------------+
|
1069 |
|
|
; clk ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
1070 |
|
|
; dio ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
1071 |
|
|
+-------------+---------------------------------------------------------------------------------------+
|
1072 |
|
|
|
1073 |
|
|
|
1074 |
|
|
+-----------------------------------------------------------------------------------------------------+
|
1075 |
|
|
; Unconstrained Output Ports ;
|
1076 |
|
|
+-------------+---------------------------------------------------------------------------------------+
|
1077 |
|
|
; Output Port ; Comment ;
|
1078 |
|
|
+-------------+---------------------------------------------------------------------------------------+
|
1079 |
|
|
; clk ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
1080 |
|
|
; dio ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
1081 |
|
|
+-------------+---------------------------------------------------------------------------------------+
|
1082 |
|
|
|
1083 |
|
|
|
1084 |
|
|
+--------------------------+
|
1085 |
|
|
; Timing Analyzer Messages ;
|
1086 |
|
|
+--------------------------+
|
1087 |
|
|
Info: *******************************************************************
|
1088 |
|
|
Info: Running Quartus Prime Timing Analyzer
|
1089 |
|
|
Info: Version 20.1.0 Build 711 06/05/2020 SJ Lite Edition
|
1090 |
|
|
Info: Processing started: Sat Mar 13 16:24:02 2021
|
1091 |
|
|
Info: Command: quartus_sta tm1637 -c tm1637
|
1092 |
|
|
Info: qsta_default_script.tcl version: #1
|
1093 |
|
|
Info (20030): Parallel compilation is enabled and will use 2 of the 2 processors detected
|
1094 |
|
|
Info (21077): Low junction temperature is 0 degrees C
|
1095 |
|
|
Info (21077): High junction temperature is 85 degrees C
|
1096 |
|
|
Info (332104): Reading SDC File: 'tm1637.sdc'
|
1097 |
|
|
Info: Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
|
1098 |
|
|
Info: Analyzing Slow 1200mV 85C Model
|
1099 |
|
|
Info (332146): Worst-case setup slack is 11.116
|
1100 |
|
|
Info (332119): Slack End Point TNS Clock
|
1101 |
|
|
Info (332119): ========= =================== =====================
|
1102 |
|
|
Info (332119): 11.116 0.000 clk25
|
1103 |
|
|
Info (332146): Worst-case hold slack is 0.454
|
1104 |
|
|
Info (332119): Slack End Point TNS Clock
|
1105 |
|
|
Info (332119): ========= =================== =====================
|
1106 |
|
|
Info (332119): 0.454 0.000 clk25
|
1107 |
|
|
Info (332140): No Recovery paths to report
|
1108 |
|
|
Info (332140): No Removal paths to report
|
1109 |
|
|
Info (332146): Worst-case minimum pulse width slack is 0.281
|
1110 |
|
|
Info (332119): Slack End Point TNS Clock
|
1111 |
|
|
Info (332119): ========= =================== =====================
|
1112 |
|
|
Info (332119): 0.281 0.000 clk25
|
1113 |
|
|
Info: Analyzing Slow 1200mV 0C Model
|
1114 |
|
|
Info (334003): Started post-fitting delay annotation
|
1115 |
|
|
Info (334004): Delay annotation completed successfully
|
1116 |
|
|
Info (332146): Worst-case setup slack is 12.076
|
1117 |
|
|
Info (332119): Slack End Point TNS Clock
|
1118 |
|
|
Info (332119): ========= =================== =====================
|
1119 |
|
|
Info (332119): 12.076 0.000 clk25
|
1120 |
|
|
Info (332146): Worst-case hold slack is 0.402
|
1121 |
|
|
Info (332119): Slack End Point TNS Clock
|
1122 |
|
|
Info (332119): ========= =================== =====================
|
1123 |
|
|
Info (332119): 0.402 0.000 clk25
|
1124 |
|
|
Info (332140): No Recovery paths to report
|
1125 |
|
|
Info (332140): No Removal paths to report
|
1126 |
|
|
Info (332146): Worst-case minimum pulse width slack is 0.272
|
1127 |
|
|
Info (332119): Slack End Point TNS Clock
|
1128 |
|
|
Info (332119): ========= =================== =====================
|
1129 |
|
|
Info (332119): 0.272 0.000 clk25
|
1130 |
|
|
Info: Analyzing Fast 1200mV 0C Model
|
1131 |
|
|
Info (332146): Worst-case setup slack is 18.963
|
1132 |
|
|
Info (332119): Slack End Point TNS Clock
|
1133 |
|
|
Info (332119): ========= =================== =====================
|
1134 |
|
|
Info (332119): 18.963 0.000 clk25
|
1135 |
|
|
Info (332146): Worst-case hold slack is 0.187
|
1136 |
|
|
Info (332119): Slack End Point TNS Clock
|
1137 |
|
|
Info (332119): ========= =================== =====================
|
1138 |
|
|
Info (332119): 0.187 0.000 clk25
|
1139 |
|
|
Info (332140): No Recovery paths to report
|
1140 |
|
|
Info (332140): No Removal paths to report
|
1141 |
|
|
Info (332146): Worst-case minimum pulse width slack is 0.500
|
1142 |
|
|
Info (332119): Slack End Point TNS Clock
|
1143 |
|
|
Info (332119): ========= =================== =====================
|
1144 |
|
|
Info (332119): 0.500 0.000 clk25
|
1145 |
|
|
Info (332102): Design is not fully constrained for setup requirements
|
1146 |
|
|
Info (332102): Design is not fully constrained for hold requirements
|
1147 |
|
|
Info: Quartus Prime Timing Analyzer was successful. 0 errors, 0 warnings
|
1148 |
|
|
Info: Peak virtual memory: 621 megabytes
|
1149 |
|
|
Info: Processing ended: Sat Mar 13 16:24:04 2021
|
1150 |
|
|
Info: Elapsed time: 00:00:02
|
1151 |
|
|
Info: Total CPU time (on all processors): 00:00:02
|
1152 |
|
|
|
1153 |
|
|
|