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mongoq |
# do tm1637_run_msim_rtl_vhdl.do
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# if {[file exists rtl_work]} {
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# vdel -lib rtl_work -all
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# }
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# vlib rtl_work
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# vmap work rtl_work
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# Model Technology ModelSim - Intel FPGA Edition vmap 2020.1 Lib Mapping Utility 2020.02 Feb 28 2020
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# vmap work rtl_work
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# Copying /home/mongoq/projects/fpga/intelFPGA_lite/20.1/modelsim_ase/linuxaloem/../modelsim.ini to modelsim.ini
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# Modifying modelsim.ini
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#
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# vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_external_connect.vhd}
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# Model Technology ModelSim - Intel FPGA Edition vcom 2020.1 Compiler 2020.02 Feb 28 2020
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# Start time: 20:07:47 on Feb 24,2021
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# vcom -reportprogress 300 -93 -work work /home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_external_connect.vhd
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# -- Loading package STANDARD
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# -- Loading package TEXTIO
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# -- Loading package std_logic_1164
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# -- Loading package NUMERIC_STD
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# -- Loading package std_logic_arith
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# -- Loading package STD_LOGIC_UNSIGNED
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# -- Compiling entity tm1637_external_connect
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# -- Compiling architecture Behavioral of tm1637_external_connect
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# End time: 20:07:47 on Feb 24,2021, Elapsed time: 0:00:00
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# Errors: 0, Warnings: 0
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# vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_toplevel.vhd}
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# Model Technology ModelSim - Intel FPGA Edition vcom 2020.1 Compiler 2020.02 Feb 28 2020
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# Start time: 20:07:48 on Feb 24,2021
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# vcom -reportprogress 300 -93 -work work /home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_toplevel.vhd
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# -- Loading package STANDARD
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# -- Loading package TEXTIO
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# -- Loading package std_logic_1164
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# -- Loading package NUMERIC_STD
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# -- Loading package std_logic_arith
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# -- Loading package STD_LOGIC_UNSIGNED
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# -- Compiling entity tm1637_toplevel
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# -- Compiling architecture Behavioral of tm1637_toplevel
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# End time: 20:07:48 on Feb 24,2021, Elapsed time: 0:00:00
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# Errors: 0, Warnings: 0
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# vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_decimal_count.vhd}
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# Model Technology ModelSim - Intel FPGA Edition vcom 2020.1 Compiler 2020.02 Feb 28 2020
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# Start time: 20:07:48 on Feb 24,2021
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# vcom -reportprogress 300 -93 -work work /home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_decimal_count.vhd
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# -- Loading package STANDARD
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# -- Loading package TEXTIO
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# -- Loading package std_logic_1164
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# -- Loading package NUMERIC_STD
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# -- Compiling entity tm1637_decimal_count
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# -- Compiling architecture behavioral of tm1637_decimal_count
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# End time: 20:07:48 on Feb 24,2021, Elapsed time: 0:00:00
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# Errors: 0, Warnings: 0
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#
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#
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# stdin:
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