URL https://opencores.org/ocsvn/tm1637/tm1637/trunk

Subversion Repositories tm1637

[/] [tm1637/] [trunk/] [hdl/] [intel_qp/] [dec_counter/] [simulation/] [modelsim/] [tm1637_run_msim_rtl_vhdl.do] - Blame information for rev 3

Details | Compare with Previous | View Log


transcript on
if {[file exists rtl_work]} {
        vdel -lib rtl_work -all
}
vlib rtl_work
vmap work rtl_work
 
vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_external_connect.vhd}
vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_toplevel.vhd}
vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_decimal_count.vhd}
 

Line No.	Rev	Author	Line
1	3	mongoq	`transcript on`
2			`if {[file exists rtl_work]} {`
3			`vdel -lib rtl_work -all`
4			`}`
5			`vlib rtl_work`
6			`vmap work rtl_work`
7
8			`vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_external_connect.vhd}`
9			`vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_toplevel.vhd}`
10			`vcom -93 -work work {/home/mongoq/projects/fpga/tm1637-opencores/tm1637-gama/testing-17.2.21/tm1637-decimal-counter-testing/tm1637_decimal_count.vhd}`
11

Browse

Tools

Subversion Repositories tm1637

[/] [tm1637/] [trunk/] [hdl/] [intel_qp/] [dec_counter/] [simulation/] [modelsim/] [tm1637_run_msim_rtl_vhdl.do] - Blame information for rev 3