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[/] [tm1637/] [trunk/] [hdl/] [intel_qp/] [dec_counter/] [tm1637_assignment_defaults.qdf] - Blame information for rev 3

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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 2020  Intel Corporation. All rights reserved.
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# Your use of Intel Corporation's design tools, logic functions
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# and other software and tools, and any partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Intel Program License
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# Subscription Agreement, the Intel Quartus Prime License Agreement,
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# the Intel FPGA IP License Agreement, or other applicable license
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# agreement, including, without limitation, that your use is for
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# the sole purpose of programming logic devices manufactured by
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# Intel and sold by Intel or its authorized distributors.  Please
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# refer to the applicable agreement for further details, at
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# https://fpgasoftware.intel.com/eula.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus Prime
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# Version 20.1.0 Build 711 06/05/2020 SJ Lite Edition
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# Date created = 19:30:00  Februar 10, 2021
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#
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# -------------------------------------------------------------------------- #
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#
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# Note:
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#
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# 1) Do not modify this file. This file was generated
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#    automatically by the Quartus Prime software and is used
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#    to preserve global assignments across Quartus Prime versions.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name IP_COMPONENT_REPORT_HIERARCHY Off
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set_global_assignment -name IP_COMPONENT_INTERNAL Off
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set_global_assignment -name PROJECT_SHOW_ENTITY_NAME On
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set_global_assignment -name PROJECT_USE_SIMPLIFIED_NAMES Off
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set_global_assignment -name ENABLE_REDUCED_MEMORY_MODE Off
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set_global_assignment -name VER_COMPATIBLE_DB_DIR export_db
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set_global_assignment -name AUTO_EXPORT_VER_COMPATIBLE_DB Off
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set_global_assignment -name FLOW_DISABLE_ASSEMBLER Off
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set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER Off
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set_global_assignment -name FLOW_ENABLE_HC_COMPARE Off
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set_global_assignment -name HC_OUTPUT_DIR hc_output
45
set_global_assignment -name SAVE_MIGRATION_INFO_DURING_COMPILATION Off
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set_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS Off
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set_global_assignment -name RUN_FULL_COMPILE_ON_DEVICE_CHANGE On
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set_global_assignment -name FLOW_ENABLE_RTL_VIEWER Off
49
set_global_assignment -name READ_OR_WRITE_IN_BYTE_ADDRESS "Use global settings"
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set_global_assignment -name FLOW_HARDCOPY_DESIGN_READINESS_CHECK On
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set_global_assignment -name FLOW_ENABLE_PARALLEL_MODULES On
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set_global_assignment -name ENABLE_COMPACT_REPORT_TABLE Off
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set_global_assignment -name REVISION_TYPE Base -family "Arria V"
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set_global_assignment -name REVISION_TYPE Base -family "Stratix V"
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set_global_assignment -name REVISION_TYPE Base -family "Arria V GZ"
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set_global_assignment -name REVISION_TYPE Base -family "Cyclone V"
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set_global_assignment -name DEFAULT_HOLD_MULTICYCLE "Same as Multicycle"
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set_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS On
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set_global_assignment -name CUT_OFF_READ_DURING_WRITE_PATHS On
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set_global_assignment -name CUT_OFF_IO_PIN_FEEDBACK On
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set_global_assignment -name DO_COMBINED_ANALYSIS Off
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set_global_assignment -name TDC_AGGRESSIVE_HOLD_CLOSURE_EFFORT Off
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set_global_assignment -name ENABLE_HPS_INTERNAL_TIMING Off
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set_global_assignment -name EMIF_SOC_PHYCLK_ADVANCE_MODELING Off
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set_global_assignment -name USE_DLL_FREQUENCY_FOR_DQS_DELAY_CHAIN Off
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set_global_assignment -name ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS On
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set_global_assignment -name TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS On
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Arria V"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Cyclone 10 LP"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "MAX 10"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Stratix IV"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Cyclone IV E"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Arria 10"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS Off -family "MAX V"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Stratix V"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Arria V GZ"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS Off -family "MAX II"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Arria II GX"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Arria II GZ"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Cyclone IV GX"
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS On -family "Cyclone V"
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set_global_assignment -name TIMING_ANALYZER_DO_REPORT_TIMING Off
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "Arria V"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS On -family "Cyclone 10 LP"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "MAX 10"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "Stratix IV"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS On -family "Cyclone IV E"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "Arria 10"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS On -family "MAX V"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "Stratix V"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "Arria V GZ"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS On -family "MAX II"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "Arria II GX"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "Arria II GZ"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS On -family "Cyclone IV GX"
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set_global_assignment -name TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS Off -family "Cyclone V"
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set_global_assignment -name TIMING_ANALYZER_REPORT_NUM_WORST_CASE_TIMING_PATHS 100
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Arria V"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Cyclone 10 LP"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "MAX 10"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Cyclone IV E"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Stratix IV"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Arria 10"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL Off -family "MAX V"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Stratix V"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Arria V GZ"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL Off -family "MAX II"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Arria II GX"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Arria II GZ"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Cyclone IV GX"
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set_global_assignment -name TIMING_ANALYZER_DO_CCPP_REMOVAL On -family "Cyclone V"
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set_global_assignment -name OPTIMIZATION_MODE Balanced
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set_global_assignment -name ALLOW_REGISTER_MERGING On
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set_global_assignment -name ALLOW_REGISTER_DUPLICATION On
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Arria V"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER ON -family "Cyclone 10 LP"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "MAX 10"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Stratix IV"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Cyclone IV E"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER ON -family "Arria 10"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "MAX V"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Stratix V"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Arria V GZ"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "MAX II"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Arria II GX"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Arria II GZ"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Cyclone IV GX"
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set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER OFF -family "Cyclone V"
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set_global_assignment -name MUX_RESTRUCTURE Auto
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set_global_assignment -name MLAB_ADD_TIMING_CONSTRAINTS_FOR_MIXED_PORT_FEED_THROUGH_MODE_SETTING_DONT_CARE Off
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set_global_assignment -name ENABLE_IP_DEBUG Off
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set_global_assignment -name SAVE_DISK_SPACE On
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set_global_assignment -name OCP_HW_EVAL Enable
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set_global_assignment -name DEVICE_FILTER_PACKAGE Any
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT Any
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE Any
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set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL ""
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set_global_assignment -name VERILOG_INPUT_VERSION Verilog_2001
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set_global_assignment -name VHDL_INPUT_VERSION VHDL_1993
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set_global_assignment -name FAMILY "Cyclone V"
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set_global_assignment -name TRUE_WYSIWYG_FLOW Off
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set_global_assignment -name SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES Off
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set_global_assignment -name STATE_MACHINE_PROCESSING Auto
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set_global_assignment -name SAFE_STATE_MACHINE Off
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set_global_assignment -name EXTRACT_VERILOG_STATE_MACHINES On
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set_global_assignment -name EXTRACT_VHDL_STATE_MACHINES On
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set_global_assignment -name IGNORE_VERILOG_INITIAL_CONSTRUCTS Off
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set_global_assignment -name VERILOG_CONSTANT_LOOP_LIMIT 5000
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set_global_assignment -name VERILOG_NON_CONSTANT_LOOP_LIMIT 250
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set_global_assignment -name INFER_RAMS_FROM_RAW_LOGIC On
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set_global_assignment -name PARALLEL_SYNTHESIS On
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set_global_assignment -name DSP_BLOCK_BALANCING Auto
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set_global_assignment -name MAX_BALANCING_DSP_BLOCKS "-1 (Unlimited)"
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set_global_assignment -name NOT_GATE_PUSH_BACK On
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set_global_assignment -name ALLOW_POWER_UP_DONT_CARE On
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set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS Off
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set_global_assignment -name REMOVE_DUPLICATE_REGISTERS On
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set_global_assignment -name IGNORE_CARRY_BUFFERS Off
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set_global_assignment -name IGNORE_CASCADE_BUFFERS Off
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set_global_assignment -name IGNORE_GLOBAL_BUFFERS Off
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set_global_assignment -name IGNORE_ROW_GLOBAL_BUFFERS Off
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set_global_assignment -name IGNORE_LCELL_BUFFERS Off
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set_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS AUTO
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set_global_assignment -name IGNORE_SOFT_BUFFERS On
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set_global_assignment -name MAX7000_IGNORE_SOFT_BUFFERS Off
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set_global_assignment -name LIMIT_AHDL_INTEGERS_TO_32_BITS Off
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set_global_assignment -name AUTO_GLOBAL_CLOCK_MAX On
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set_global_assignment -name AUTO_GLOBAL_OE_MAX On
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set_global_assignment -name MAX_AUTO_GLOBAL_REGISTER_CONTROLS On
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set_global_assignment -name AUTO_IMPLEMENT_IN_ROM Off
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set_global_assignment -name APEX20K_TECHNOLOGY_MAPPER Lut
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set_global_assignment -name OPTIMIZATION_TECHNIQUE Balanced
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set_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE Balanced
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set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE Balanced
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set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE Balanced
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set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE Balanced
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set_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE Balanced
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set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE Speed
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set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE Balanced
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set_global_assignment -name MERCURY_OPTIMIZATION_TECHNIQUE Area
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set_global_assignment -name FLEX6K_OPTIMIZATION_TECHNIQUE Area
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set_global_assignment -name FLEX10K_OPTIMIZATION_TECHNIQUE Area
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set_global_assignment -name ALLOW_XOR_GATE_USAGE On
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set_global_assignment -name AUTO_LCELL_INSERTION On
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set_global_assignment -name CARRY_CHAIN_LENGTH 48
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set_global_assignment -name FLEX6K_CARRY_CHAIN_LENGTH 32
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set_global_assignment -name FLEX10K_CARRY_CHAIN_LENGTH 32
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set_global_assignment -name MERCURY_CARRY_CHAIN_LENGTH 48
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set_global_assignment -name STRATIX_CARRY_CHAIN_LENGTH 70
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set_global_assignment -name STRATIXII_CARRY_CHAIN_LENGTH 70
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set_global_assignment -name CASCADE_CHAIN_LENGTH 2
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set_global_assignment -name PARALLEL_EXPANDER_CHAIN_LENGTH 16
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set_global_assignment -name MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH 4
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set_global_assignment -name AUTO_CARRY_CHAINS On
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set_global_assignment -name AUTO_CASCADE_CHAINS On
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set_global_assignment -name AUTO_PARALLEL_EXPANDERS On
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set_global_assignment -name AUTO_OPEN_DRAIN_PINS On
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set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP Off
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set_global_assignment -name AUTO_ROM_RECOGNITION On
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set_global_assignment -name AUTO_RAM_RECOGNITION On
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set_global_assignment -name AUTO_DSP_RECOGNITION On
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set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION Auto
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set_global_assignment -name ALLOW_SHIFT_REGISTER_MERGING_ACROSS_HIERARCHIES Auto
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set_global_assignment -name AUTO_CLOCK_ENABLE_RECOGNITION On
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set_global_assignment -name STRICT_RAM_RECOGNITION Off
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set_global_assignment -name ALLOW_SYNCH_CTRL_USAGE On
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set_global_assignment -name FORCE_SYNCH_CLEAR Off
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set_global_assignment -name AUTO_RAM_BLOCK_BALANCING On
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set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION Off
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set_global_assignment -name AUTO_RESOURCE_SHARING Off
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set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION Off
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set_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION Off
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set_global_assignment -name ALLOW_ANY_SHIFT_REGISTER_SIZE_FOR_RECOGNITION Off
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set_global_assignment -name MAX7000_FANIN_PER_CELL 100
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set_global_assignment -name USE_LOGICLOCK_CONSTRAINTS_IN_BALANCING On
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set_global_assignment -name MAX_RAM_BLOCKS_M512 "-1 (Unlimited)"
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set_global_assignment -name MAX_RAM_BLOCKS_M4K "-1 (Unlimited)"
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set_global_assignment -name MAX_RAM_BLOCKS_MRAM "-1 (Unlimited)"
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set_global_assignment -name IGNORE_TRANSLATE_OFF_AND_SYNTHESIS_OFF Off
220
set_global_assignment -name STRATIXGX_BYPASS_REMAPPING_OF_FORCE_SIGNAL_DETECT_SIGNAL_THRESHOLD_SELECT Off
221
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Arria II GZ"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Arria V"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Cyclone 10 LP"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "MAX 10"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Cyclone IV GX"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Stratix IV"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Cyclone IV E"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Arria 10"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Stratix V"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Arria V GZ"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Cyclone V"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family "Arria II GX"
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set_global_assignment -name REPORT_PARAMETER_SETTINGS On
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set_global_assignment -name REPORT_SOURCE_ASSIGNMENTS On
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set_global_assignment -name REPORT_CONNECTIVITY_CHECKS On
236
set_global_assignment -name IGNORE_MAX_FANOUT_ASSIGNMENTS Off
237
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family "Arria V"
238
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family "Cyclone 10 LP"
239
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family "MAX 10"
240
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family "Cyclone IV E"
241
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family "Stratix IV"
242
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family "Arria 10"
243
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family "MAX V"
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set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family "Stratix V"
245
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family "MAX II"
246
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family "Arria V GZ"
247
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family "Arria II GX"
248
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family "Arria II GZ"
249
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family "Cyclone IV GX"
250
set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family "Cyclone V"
251
set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS "Normal compilation"
252
set_global_assignment -name HDL_MESSAGE_LEVEL Level2
253
set_global_assignment -name USE_HIGH_SPEED_ADDER Auto
254
set_global_assignment -name NUMBER_OF_PROTECTED_REGISTERS_REPORTED 100
255
set_global_assignment -name NUMBER_OF_REMOVED_REGISTERS_REPORTED 5000
256
set_global_assignment -name NUMBER_OF_SYNTHESIS_MIGRATION_ROWS 5000
257
set_global_assignment -name SYNTHESIS_S10_MIGRATION_CHECKS Off
258
set_global_assignment -name NUMBER_OF_SWEPT_NODES_REPORTED 5000
259
set_global_assignment -name NUMBER_OF_INVERTED_REGISTERS_REPORTED 100
260
set_global_assignment -name SYNTH_CLOCK_MUX_PROTECTION On
261
set_global_assignment -name SYNTH_GATED_CLOCK_CONVERSION Off
262
set_global_assignment -name BLOCK_DESIGN_NAMING Auto
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set_global_assignment -name SYNTH_PROTECT_SDC_CONSTRAINT Off
264
set_global_assignment -name SYNTHESIS_EFFORT Auto
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set_global_assignment -name SHIFT_REGISTER_RECOGNITION_ACLR_SIGNAL On
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set_global_assignment -name PRE_MAPPING_RESYNTHESIS Off
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set_global_assignment -name SYNTH_MESSAGE_LEVEL Medium
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set_global_assignment -name DISABLE_REGISTER_MERGING_ACROSS_HIERARCHIES Auto
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set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Arria II GZ"
270
set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Arria V"
271
set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Cyclone 10 LP"
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set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "MAX 10"
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set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Cyclone IV GX"
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set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Stratix IV"
275
set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Cyclone IV E"
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set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Arria 10"
277
set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Stratix V"
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set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Arria V GZ"
279
set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Cyclone V"
280
set_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family "Arria II GX"
281
set_global_assignment -name MAX_LABS "-1 (Unlimited)"
282
set_global_assignment -name RBCGEN_CRITICAL_WARNING_TO_ERROR On
283
set_global_assignment -name MAX_NUMBER_OF_REGISTERS_FROM_UNINFERRED_RAMS "-1 (Unlimited)"
284
set_global_assignment -name AUTO_PARALLEL_SYNTHESIS On
285
set_global_assignment -name PRPOF_ID Off
286
set_global_assignment -name DISABLE_DSP_NEGATE_INFERENCING Off
287
set_global_assignment -name REPORT_PARAMETER_SETTINGS_PRO On
288
set_global_assignment -name REPORT_SOURCE_ASSIGNMENTS_PRO On
289
set_global_assignment -name ENABLE_STATE_MACHINE_INFERENCE Off
290
set_global_assignment -name FLEX10K_ENABLE_LOCK_OUTPUT Off
291
set_global_assignment -name AUTO_MERGE_PLLS On
292
set_global_assignment -name IGNORE_MODE_FOR_MERGE Off
293
set_global_assignment -name TXPMA_SLEW_RATE Low
294
set_global_assignment -name ADCE_ENABLED Auto
295
set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL Normal
296
set_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS Off
297
set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.0
298
set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 1.0
299
set_global_assignment -name FIT_ATTEMPTS_TO_SKIP 0.0
300
set_global_assignment -name PHYSICAL_SYNTHESIS Off
301
set_global_assignment -name ECO_ALLOW_ROUTING_CHANGES Off
302
set_global_assignment -name DEVICE AUTO
303
set_global_assignment -name BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE Off
304
set_global_assignment -name ENABLE_JTAG_BST_SUPPORT Off
305
set_global_assignment -name MAX7000_ENABLE_JTAG_BST_SUPPORT On
306
set_global_assignment -name ENABLE_NCEO_OUTPUT Off
307
set_global_assignment -name RESERVE_NCEO_AFTER_CONFIGURATION "Use as regular IO"
308
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "Use as programming pin"
309
set_global_assignment -name STRATIXIII_UPDATE_MODE Standard
310
set_global_assignment -name STRATIX_UPDATE_MODE Standard
311
set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "Single Image"
312
set_global_assignment -name CVP_MODE Off
313
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "Passive Serial" -family "Arria V"
314
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "Passive Serial" -family "Arria 10"
315
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "Passive Serial" -family "Stratix V"
316
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "Passive Serial" -family "Arria V GZ"
317
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "Passive Serial" -family "Cyclone V"
318
set_global_assignment -name VID_OPERATION_MODE "PMBus Slave"
319
set_global_assignment -name USE_CONF_DONE AUTO
320
set_global_assignment -name USE_PWRMGT_SCL AUTO
321
set_global_assignment -name USE_PWRMGT_SDA AUTO
322
set_global_assignment -name USE_PWRMGT_ALERT AUTO
323
set_global_assignment -name USE_INIT_DONE AUTO
324
set_global_assignment -name USE_CVP_CONFDONE AUTO
325
set_global_assignment -name USE_SEU_ERROR AUTO
326
set_global_assignment -name RESERVE_AVST_CLK_AFTER_CONFIGURATION "Use as regular IO"
327
set_global_assignment -name RESERVE_AVST_VALID_AFTER_CONFIGURATION "Use as regular IO"
328
set_global_assignment -name RESERVE_AVST_DATA15_THROUGH_DATA0_AFTER_CONFIGURATION "Use as regular IO"
329
set_global_assignment -name RESERVE_AVST_DATA31_THROUGH_DATA16_AFTER_CONFIGURATION "Use as regular IO"
330
set_global_assignment -name STRATIXIII_CONFIGURATION_SCHEME "Passive Serial"
331
set_global_assignment -name MAX10FPGA_CONFIGURATION_SCHEME "Internal Configuration"
332
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "Active Serial"
333
set_global_assignment -name STRATIXII_CONFIGURATION_SCHEME "Passive Serial"
334
set_global_assignment -name CYCLONEII_CONFIGURATION_SCHEME "Active Serial"
335
set_global_assignment -name APEX20K_CONFIGURATION_SCHEME "Passive Serial"
336
set_global_assignment -name STRATIX_CONFIGURATION_SCHEME "Passive Serial"
337
set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "Active Serial"
338
set_global_assignment -name MERCURY_CONFIGURATION_SCHEME "Passive Serial"
339
set_global_assignment -name FLEX6K_CONFIGURATION_SCHEME "Passive Serial"
340
set_global_assignment -name FLEX10K_CONFIGURATION_SCHEME "Passive Serial"
341
set_global_assignment -name APEXII_CONFIGURATION_SCHEME "Passive Serial"
342
set_global_assignment -name USER_START_UP_CLOCK Off
343
set_global_assignment -name ENABLE_UNUSED_RX_CLOCK_WORKAROUND Off
344
set_global_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL Off
345
set_global_assignment -name IGNORE_HSSI_COLUMN_POWER_WHEN_PRESERVING_UNUSED_XCVR_CHANNELS On
346
set_global_assignment -name AUTO_RESERVE_CLKUSR_FOR_CALIBRATION On
347
set_global_assignment -name DEVICE_INITIALIZATION_CLOCK INIT_INTOSC
348
set_global_assignment -name ENABLE_VREFA_PIN Off
349
set_global_assignment -name ENABLE_VREFB_PIN Off
350
set_global_assignment -name ALWAYS_ENABLE_INPUT_BUFFERS Off
351
set_global_assignment -name ENABLE_ASMI_FOR_FLASH_LOADER Off
352
set_global_assignment -name ENABLE_DEVICE_WIDE_RESET Off
353
set_global_assignment -name ENABLE_DEVICE_WIDE_OE Off
354
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "As output driving ground"
355
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT Off
356
set_global_assignment -name INIT_DONE_OPEN_DRAIN On
357
set_global_assignment -name RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION "Use as regular IO"
358
set_global_assignment -name RESERVE_RDYNBUSY_AFTER_CONFIGURATION "Use as regular IO"
359
set_global_assignment -name RESERVE_DATA31_THROUGH_DATA16_AFTER_CONFIGURATION "Use as regular IO"
360
set_global_assignment -name RESERVE_DATA15_THROUGH_DATA8_AFTER_CONFIGURATION "Use as regular IO"
361
set_global_assignment -name RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION "Use as regular IO"
362
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "As input tri-stated"
363
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "As input tri-stated"
364
set_global_assignment -name RESERVE_DATA7_THROUGH_DATA2_AFTER_CONFIGURATION "Use as regular IO"
365
set_global_assignment -name RESERVE_DATA7_THROUGH_DATA5_AFTER_CONFIGURATION "Use as regular IO"
366
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "As input tri-stated"
367
set_global_assignment -name RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION "Use as regular IO"
368
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "Use as programming pin"
369
set_global_assignment -name ENABLE_CONFIGURATION_PINS On
370
set_global_assignment -name ENABLE_JTAG_PIN_SHARING Off
371
set_global_assignment -name ENABLE_NCE_PIN Off
372
set_global_assignment -name ENABLE_BOOT_SEL_PIN On
373
set_global_assignment -name CRC_ERROR_CHECKING Off
374
set_global_assignment -name INTERNAL_SCRUBBING Off
375
set_global_assignment -name PR_ERROR_OPEN_DRAIN On
376
set_global_assignment -name PR_READY_OPEN_DRAIN On
377
set_global_assignment -name ENABLE_CVP_CONFDONE Off
378
set_global_assignment -name CVP_CONFDONE_OPEN_DRAIN On
379
set_global_assignment -name ENABLE_NCONFIG_FROM_CORE On
380
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Arria II GZ"
381
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Arria V"
382
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Cyclone 10 LP"
383
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "MAX 10"
384
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Cyclone IV GX"
385
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Stratix IV"
386
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Cyclone IV E"
387
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Arria 10"
388
set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO Paths and Minimum TPD Paths" -family "MAX V"
389
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Stratix V"
390
set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO Paths and Minimum TPD Paths" -family "MAX II"
391
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Arria V GZ"
392
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Cyclone V"
393
set_global_assignment -name OPTIMIZE_HOLD_TIMING "All Paths" -family "Arria II GX"
394
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Arria V"
395
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Cyclone 10 LP"
396
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "MAX 10"
397
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Cyclone IV E"
398
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Stratix IV"
399
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Arria 10"
400
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING Off -family "MAX V"
401
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Stratix V"
402
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Arria V GZ"
403
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING Off -family "MAX II"
404
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Arria II GX"
405
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Arria II GZ"
406
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Cyclone IV GX"
407
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family "Cyclone V"
408
set_global_assignment -name BLOCK_RAM_TO_MLAB_CELL_CONVERSION On
409
set_global_assignment -name BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS Auto
410
set_global_assignment -name BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES Care
411
set_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family "Stratix IV"
412
set_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family "Arria 10"
413
set_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family "Stratix V"
414
set_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family "Arria V GZ"
415
set_global_assignment -name PROGRAMMABLE_POWER_MAXIMUM_HIGH_SPEED_FRACTION_OF_USED_LAB_TILES 1.0
416
set_global_assignment -name GUARANTEE_MIN_DELAY_CORNER_IO_ZERO_HOLD_TIME On
417
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING "Normal compilation"
418
set_global_assignment -name OPTIMIZE_SSN Off
419
set_global_assignment -name OPTIMIZE_TIMING "Normal compilation"
420
set_global_assignment -name ECO_OPTIMIZE_TIMING Off
421
set_global_assignment -name ECO_REGENERATE_REPORT Off
422
set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING Normal
423
set_global_assignment -name FIT_ONLY_ONE_ATTEMPT Off
424
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION Automatically
425
set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION Automatically
426
set_global_assignment -name SEED 1
427
set_global_assignment -name PERIPHERY_TO_CORE_PLACEMENT_AND_ROUTING_OPTIMIZATION OFF
428
set_global_assignment -name RESERVE_ROUTING_OUTPUT_FLEXIBILITY Off
429
set_global_assignment -name SLOW_SLEW_RATE Off
430
set_global_assignment -name PCI_IO Off
431
set_global_assignment -name TURBO_BIT On
432
set_global_assignment -name WEAK_PULL_UP_RESISTOR Off
433
set_global_assignment -name ENABLE_BUS_HOLD_CIRCUITRY Off
434
set_global_assignment -name AUTO_GLOBAL_MEMORY_CONTROLS Off
435
set_global_assignment -name MIGRATION_CONSTRAIN_CORE_RESOURCES On
436
set_global_assignment -name QII_AUTO_PACKED_REGISTERS Auto
437
set_global_assignment -name AUTO_PACKED_REGISTERS_MAX Auto
438
set_global_assignment -name NORMAL_LCELL_INSERT On
439
set_global_assignment -name CARRY_OUT_PINS_LCELL_INSERT On
440
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Arria V"
441
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Cyclone 10 LP"
442
set_global_assignment -name AUTO_DELAY_CHAINS On -family "MAX 10"
443
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Stratix IV"
444
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Cyclone IV E"
445
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Arria 10"
446
set_global_assignment -name AUTO_DELAY_CHAINS On -family "MAX V"
447
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Stratix V"
448
set_global_assignment -name AUTO_DELAY_CHAINS On -family "MAX II"
449
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Arria V GZ"
450
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Arria II GX"
451
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Arria II GZ"
452
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Cyclone IV GX"
453
set_global_assignment -name AUTO_DELAY_CHAINS On -family "Cyclone V"
454
set_global_assignment -name AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS OFF
455
set_global_assignment -name XSTL_INPUT_ALLOW_SE_BUFFER Off
456
set_global_assignment -name TREAT_BIDIR_AS_OUTPUT Off
457
set_global_assignment -name AUTO_TURBO_BIT ON
458
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA Off
459
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC Off
460
set_global_assignment -name PHYSICAL_SYNTHESIS_LOG_FILE Off
461
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION Off
462
set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA Off
463
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING Off
464
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING Off
465
set_global_assignment -name IO_PLACEMENT_OPTIMIZATION On
466
set_global_assignment -name ALLOW_LVTTL_LVCMOS_INPUT_LEVELS_TO_OVERDRIVE_INPUT_BUFFER Off
467
set_global_assignment -name OVERRIDE_DEFAULT_ELECTROMIGRATION_PARAMETERS Off
468
set_global_assignment -name FITTER_EFFORT "Auto Fit"
469
set_global_assignment -name FITTER_AUTO_EFFORT_DESIRED_SLACK_MARGIN 0ns
470
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT Normal
471
set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION Auto
472
set_global_assignment -name ROUTER_REGISTER_DUPLICATION Auto
473
set_global_assignment -name STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET Off
474
set_global_assignment -name AUTO_GLOBAL_CLOCK On
475
set_global_assignment -name AUTO_GLOBAL_OE On
476
set_global_assignment -name AUTO_GLOBAL_REGISTER_CONTROLS On
477
set_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE Realistic
478
set_global_assignment -name STRATIXGX_ALLOW_GIGE_UNDER_FULL_DATARATE_RANGE Off
479
set_global_assignment -name STRATIXGX_ALLOW_RX_CORECLK_FROM_NON_RX_CLKOUT_SOURCE_IN_DOUBLE_DATA_WIDTH_MODE Off
480
set_global_assignment -name STRATIXGX_ALLOW_GIGE_IN_DOUBLE_DATA_WIDTH_MODE Off
481
set_global_assignment -name STRATIXGX_ALLOW_PARALLEL_LOOPBACK_IN_DOUBLE_DATA_WIDTH_MODE Off
482
set_global_assignment -name STRATIXGX_ALLOW_XAUI_IN_SINGLE_DATA_WIDTH_MODE Off
483
set_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off
484
set_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off
485
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off
486
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITHOUT_8B10B Off
487
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off
488
set_global_assignment -name STRATIXGX_ALLOW_POST8B10B_LOOPBACK Off
489
set_global_assignment -name STRATIXGX_ALLOW_REVERSE_PARALLEL_LOOPBACK Off
490
set_global_assignment -name STRATIXGX_ALLOW_USE_OF_GXB_COUPLED_IOS Off
491
set_global_assignment -name GENERATE_GXB_RECONFIG_MIF Off
492
set_global_assignment -name GENERATE_GXB_RECONFIG_MIF_WITH_PLL Off
493
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "As input tri-stated with weak pull-up"
494
set_global_assignment -name ENABLE_HOLD_BACK_OFF On
495
set_global_assignment -name CONFIGURATION_VCCIO_LEVEL Auto
496
set_global_assignment -name FORCE_CONFIGURATION_VCCIO Off
497
set_global_assignment -name SYNCHRONIZER_IDENTIFICATION Auto
498
set_global_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION On
499
set_global_assignment -name OPTIMIZE_FOR_METASTABILITY On
500
set_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family "Arria V"
501
set_global_assignment -name CRC_ERROR_OPEN_DRAIN Off -family "Cyclone 10 LP"
502
set_global_assignment -name CRC_ERROR_OPEN_DRAIN Off -family "MAX 10"
503
set_global_assignment -name CRC_ERROR_OPEN_DRAIN Off -family "Cyclone IV E"
504
set_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family "Arria 10"
505
set_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family "Stratix V"
506
set_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family "Arria V GZ"
507
set_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family "Cyclone V"
508
set_global_assignment -name MAX_GLOBAL_CLOCKS_ALLOWED "-1 (Unlimited)"
509
set_global_assignment -name MAX_REGIONAL_CLOCKS_ALLOWED "-1 (Unlimited)"
510
set_global_assignment -name MAX_PERIPHERY_CLOCKS_ALLOWED "-1 (Unlimited)"
511
set_global_assignment -name MAX_CLOCKS_ALLOWED "-1 (Unlimited)"
512
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family "Arria 10"
513
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family "Arria V"
514
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family "Stratix V"
515
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_40MHz -family "Cyclone IV GX"
516
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family "Arria V GZ"
517
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family "Cyclone V"
518
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_40MHz -family "Arria II GX"
519
set_global_assignment -name M144K_BLOCK_READ_CLOCK_DUTY_CYCLE_DEPENDENCY Off
520
set_global_assignment -name STRATIXIII_MRAM_COMPATIBILITY On
521
set_global_assignment -name FORCE_FITTER_TO_AVOID_PERIPHERY_PLACEMENT_WARNINGS Off
522
set_global_assignment -name AUTO_C3_M9K_BIT_SKIP Off
523
set_global_assignment -name PR_DONE_OPEN_DRAIN On
524
set_global_assignment -name NCEO_OPEN_DRAIN On
525
set_global_assignment -name ENABLE_CRC_ERROR_PIN Off
526
set_global_assignment -name ENABLE_PR_PINS Off
527
set_global_assignment -name RESERVE_PR_PINS Off
528
set_global_assignment -name CONVERT_PR_WARNINGS_TO_ERRORS Off
529
set_global_assignment -name PR_PINS_OPEN_DRAIN Off
530
set_global_assignment -name CLAMPING_DIODE Off
531
set_global_assignment -name TRI_STATE_SPI_PINS Off
532
set_global_assignment -name UNUSED_TSD_PINS_GND Off
533
set_global_assignment -name IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE Off
534
set_global_assignment -name FORM_DDR_CLUSTERING_CLIQUE Off
535
set_global_assignment -name ALM_REGISTER_PACKING_EFFORT Medium
536
set_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family "Arria V"
537
set_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION Off -family "Stratix IV"
538
set_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family "Arria 10"
539
set_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family "Stratix V"
540
set_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family "Arria V GZ"
541
set_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family "Cyclone V"
542
set_global_assignment -name RELATIVE_NEUTRON_FLUX 1.0
543
set_global_assignment -name SEU_FIT_REPORT Off
544
set_global_assignment -name HYPER_RETIMER Off -family "Arria 10"
545
set_global_assignment -name HYPER_RETIMER_FAST_FORWARD_ADD_PIPELINING_MAX "-1"
546
set_global_assignment -name HYPER_RETIMER_FAST_FORWARD_ASYNCH_CLEAR Auto
547
set_global_assignment -name HYPER_RETIMER_FAST_FORWARD_USER_PRESERVE_RESTRICTION Auto
548
set_global_assignment -name HYPER_RETIMER_FAST_FORWARD_DSP_BLOCKS On
549
set_global_assignment -name HYPER_RETIMER_FAST_FORWARD_RAM_BLOCKS On
550
set_global_assignment -name EDA_SIMULATION_TOOL ""
551
set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL ""
552
set_global_assignment -name EDA_BOARD_DESIGN_TIMING_TOOL ""
553
set_global_assignment -name EDA_BOARD_DESIGN_SYMBOL_TOOL ""
554
set_global_assignment -name EDA_BOARD_DESIGN_SIGNAL_INTEGRITY_TOOL ""
555
set_global_assignment -name EDA_BOARD_DESIGN_BOUNDARY_SCAN_TOOL ""
556
set_global_assignment -name EDA_BOARD_DESIGN_TOOL ""
557
set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL ""
558
set_global_assignment -name EDA_RESYNTHESIS_TOOL ""
559
set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION On
560
set_global_assignment -name COMPRESSION_MODE Off
561
set_global_assignment -name CLOCK_SOURCE Internal
562
set_global_assignment -name CONFIGURATION_CLOCK_FREQUENCY "10 MHz"
563
set_global_assignment -name CONFIGURATION_CLOCK_DIVISOR 1
564
set_global_assignment -name ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On
565
set_global_assignment -name FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE Off
566
set_global_assignment -name FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On
567
set_global_assignment -name MAX7000S_JTAG_USER_CODE FFFF
568
set_global_assignment -name STRATIX_JTAG_USER_CODE FFFFFFFF
569
set_global_assignment -name APEX20K_JTAG_USER_CODE FFFFFFFF
570
set_global_assignment -name MERCURY_JTAG_USER_CODE FFFFFFFF
571
set_global_assignment -name FLEX10K_JTAG_USER_CODE 7F
572
set_global_assignment -name MAX7000_JTAG_USER_CODE FFFFFFFF
573
set_global_assignment -name MAX7000_USE_CHECKSUM_AS_USERCODE Off
574
set_global_assignment -name USE_CHECKSUM_AS_USERCODE On
575
set_global_assignment -name SECURITY_BIT Off
576
set_global_assignment -name USE_CONFIGURATION_DEVICE Off -family "Cyclone 10 LP"
577
set_global_assignment -name USE_CONFIGURATION_DEVICE On -family "MAX 10"
578
set_global_assignment -name USE_CONFIGURATION_DEVICE Off -family "Cyclone IV E"
579
set_global_assignment -name USE_CONFIGURATION_DEVICE Off -family "Stratix IV"
580
set_global_assignment -name USE_CONFIGURATION_DEVICE On -family "MAX V"
581
set_global_assignment -name USE_CONFIGURATION_DEVICE On -family "MAX II"
582
set_global_assignment -name USE_CONFIGURATION_DEVICE Off -family "Arria II GX"
583
set_global_assignment -name USE_CONFIGURATION_DEVICE Off -family "Arria II GZ"
584
set_global_assignment -name USE_CONFIGURATION_DEVICE Off -family "Cyclone IV GX"
585
set_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE Auto
586
set_global_assignment -name STRATIXII_CONFIGURATION_DEVICE Auto
587
set_global_assignment -name PWRMGT_SLAVE_DEVICE_TYPE "PV3102 or EM1130"
588
set_global_assignment -name PWRMGT_SLAVE_DEVICE0_ADDRESS 0000000
589
set_global_assignment -name PWRMGT_SLAVE_DEVICE1_ADDRESS 0000000
590
set_global_assignment -name PWRMGT_SLAVE_DEVICE2_ADDRESS 0000000
591
set_global_assignment -name PWRMGT_SLAVE_DEVICE3_ADDRESS 0000000
592
set_global_assignment -name PWRMGT_SLAVE_DEVICE4_ADDRESS 0000000
593
set_global_assignment -name PWRMGT_SLAVE_DEVICE5_ADDRESS 0000000
594
set_global_assignment -name PWRMGT_SLAVE_DEVICE6_ADDRESS 0000000
595
set_global_assignment -name PWRMGT_SLAVE_DEVICE7_ADDRESS 0000000
596
set_global_assignment -name PWRMGT_VOLTAGE_OUTPUT_FORMAT "Auto discovery"
597
set_global_assignment -name PWRMGT_DIRECT_FORMAT_COEFFICIENT_M 0
598
set_global_assignment -name PWRMGT_DIRECT_FORMAT_COEFFICIENT_B 0
599
set_global_assignment -name PWRMGT_DIRECT_FORMAT_COEFFICIENT_R 0
600
set_global_assignment -name APEX20K_CONFIGURATION_DEVICE Auto
601
set_global_assignment -name MERCURY_CONFIGURATION_DEVICE Auto
602
set_global_assignment -name FLEX6K_CONFIGURATION_DEVICE Auto
603
set_global_assignment -name FLEX10K_CONFIGURATION_DEVICE Auto
604
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE Auto
605
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE Auto
606
set_global_assignment -name APEX20K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
607
set_global_assignment -name STRATIX_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
608
set_global_assignment -name MERCURY_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
609
set_global_assignment -name FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
610
set_global_assignment -name EPROM_USE_CHECKSUM_AS_USERCODE Off
611
set_global_assignment -name AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE On
612
set_global_assignment -name DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE Off
613
set_global_assignment -name GENERATE_TTF_FILE Off
614
set_global_assignment -name GENERATE_RBF_FILE Off
615
set_global_assignment -name GENERATE_HEX_FILE Off
616
set_global_assignment -name HEXOUT_FILE_START_ADDRESS 0
617
set_global_assignment -name HEXOUT_FILE_COUNT_DIRECTION Up
618
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "As output driving an unspecified signal"
619
set_global_assignment -name RELEASE_CLEARS_BEFORE_TRI_STATES Off
620
set_global_assignment -name AUTO_RESTART_CONFIGURATION On
621
set_global_assignment -name HARDCOPYII_POWER_ON_EXTRA_DELAY Off
622
set_global_assignment -name STRATIXII_MRAM_COMPATIBILITY Off
623
set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY On
624
set_global_assignment -name ENABLE_OCT_DONE Off -family "Arria V"
625
set_global_assignment -name ENABLE_OCT_DONE Off -family "Cyclone 10 LP"
626
set_global_assignment -name ENABLE_OCT_DONE On -family "MAX 10"
627
set_global_assignment -name ENABLE_OCT_DONE Off -family "Cyclone IV E"
628
set_global_assignment -name ENABLE_OCT_DONE Off -family "Arria 10"
629
set_global_assignment -name ENABLE_OCT_DONE Off -family "Stratix V"
630
set_global_assignment -name ENABLE_OCT_DONE Off -family "Arria V GZ"
631
set_global_assignment -name ENABLE_OCT_DONE Off -family "Arria II GX"
632
set_global_assignment -name ENABLE_OCT_DONE Off -family "Cyclone IV GX"
633
set_global_assignment -name ENABLE_OCT_DONE Off -family "Cyclone V"
634
set_global_assignment -name USE_CHECKERED_PATTERN_AS_UNINITIALIZED_RAM_CONTENT OFF
635
set_global_assignment -name ARRIAIIGX_RX_CDR_LOCKUP_FIX_OVERRIDE Off
636
set_global_assignment -name ENABLE_AUTONOMOUS_PCIE_HIP Off
637
set_global_assignment -name ENABLE_ADV_SEU_DETECTION Off
638
set_global_assignment -name POR_SCHEME "Instant ON"
639
set_global_assignment -name EN_USER_IO_WEAK_PULLUP On
640
set_global_assignment -name EN_SPI_IO_WEAK_PULLUP On
641
set_global_assignment -name POF_VERIFY_PROTECT Off
642
set_global_assignment -name ENABLE_SPI_MODE_CHECK Off
643
set_global_assignment -name FORCE_SSMCLK_TO_ISMCLK On
644
set_global_assignment -name FALLBACK_TO_EXTERNAL_FLASH Off
645
set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 0
646
set_global_assignment -name GENERATE_PMSF_FILES On
647
set_global_assignment -name START_TIME 0ns
648
set_global_assignment -name SIMULATION_MODE TIMING
649
set_global_assignment -name AUTO_USE_SIMULATION_PDB_NETLIST Off
650
set_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS On
651
set_global_assignment -name SETUP_HOLD_DETECTION Off
652
set_global_assignment -name SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off
653
set_global_assignment -name CHECK_OUTPUTS Off
654
set_global_assignment -name SIMULATION_COVERAGE On
655
set_global_assignment -name SIMULATION_COMPLETE_COVERAGE_REPORT_PANEL On
656
set_global_assignment -name SIMULATION_MISSING_1_VALUE_COVERAGE_REPORT_PANEL On
657
set_global_assignment -name SIMULATION_MISSING_0_VALUE_COVERAGE_REPORT_PANEL On
658
set_global_assignment -name GLITCH_DETECTION Off
659
set_global_assignment -name GLITCH_INTERVAL 1ns
660
set_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE Off
661
set_global_assignment -name SIMULATION_WITH_GLITCH_FILTERING_WHEN_GENERATING_SAF On
662
set_global_assignment -name SIMULATION_BUS_CHANNEL_GROUPING Off
663
set_global_assignment -name SIMULATION_VDB_RESULT_FLUSH On
664
set_global_assignment -name VECTOR_COMPARE_TRIGGER_MODE INPUT_EDGE
665
set_global_assignment -name SIMULATION_NETLIST_VIEWER Off
666
set_global_assignment -name SIMULATION_INTERCONNECT_DELAY_MODEL_TYPE TRANSPORT
667
set_global_assignment -name SIMULATION_CELL_DELAY_MODEL_TYPE TRANSPORT
668
set_global_assignment -name SIMULATOR_GENERATE_POWERPLAY_VCD_FILE Off
669
set_global_assignment -name SIMULATOR_PVT_TIMING_MODEL_TYPE AUTO
670
set_global_assignment -name SIMULATION_WITH_AUTO_GLITCH_FILTERING AUTO
671
set_global_assignment -name DRC_TOP_FANOUT 50
672
set_global_assignment -name DRC_FANOUT_EXCEEDING 30
673
set_global_assignment -name DRC_GATED_CLOCK_FEED 30
674
set_global_assignment -name HARDCOPY_FLOW_AUTOMATION MIGRATION_ONLY
675
set_global_assignment -name ENABLE_DRC_SETTINGS Off
676
set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES_THRESHOLD 25
677
set_global_assignment -name DRC_DETAIL_MESSAGE_LIMIT 10
678
set_global_assignment -name DRC_VIOLATION_MESSAGE_LIMIT 30
679
set_global_assignment -name DRC_DEADLOCK_STATE_LIMIT 2
680
set_global_assignment -name MERGE_HEX_FILE Off
681
set_global_assignment -name GENERATE_SVF_FILE Off
682
set_global_assignment -name GENERATE_ISC_FILE Off
683
set_global_assignment -name GENERATE_JAM_FILE Off
684
set_global_assignment -name GENERATE_JBC_FILE Off
685
set_global_assignment -name GENERATE_JBC_FILE_COMPRESSED On
686
set_global_assignment -name GENERATE_CONFIG_SVF_FILE Off
687
set_global_assignment -name GENERATE_CONFIG_ISC_FILE Off
688
set_global_assignment -name GENERATE_CONFIG_JAM_FILE Off
689
set_global_assignment -name GENERATE_CONFIG_JBC_FILE Off
690
set_global_assignment -name GENERATE_CONFIG_JBC_FILE_COMPRESSED On
691
set_global_assignment -name GENERATE_CONFIG_HEXOUT_FILE Off
692
set_global_assignment -name ISP_CLAMP_STATE_DEFAULT "Tri-state"
693
set_global_assignment -name HPS_EARLY_IO_RELEASE Off
694
set_global_assignment -name SIGNALPROBE_ALLOW_OVERUSE Off
695
set_global_assignment -name SIGNALPROBE_DURING_NORMAL_COMPILATION Off
696
set_global_assignment -name POWER_DEFAULT_TOGGLE_RATE 12.5%
697
set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE 12.5%
698
set_global_assignment -name POWER_USE_PVA On
699
set_global_assignment -name POWER_USE_INPUT_FILE "No File"
700
set_global_assignment -name POWER_USE_INPUT_FILES Off
701
set_global_assignment -name POWER_VCD_FILTER_GLITCHES On
702
set_global_assignment -name POWER_REPORT_SIGNAL_ACTIVITY Off
703
set_global_assignment -name POWER_REPORT_POWER_DISSIPATION Off
704
set_global_assignment -name POWER_USE_DEVICE_CHARACTERISTICS TYPICAL
705
set_global_assignment -name POWER_AUTO_COMPUTE_TJ On
706
set_global_assignment -name POWER_TJ_VALUE 25
707
set_global_assignment -name POWER_USE_TA_VALUE 25
708
set_global_assignment -name POWER_USE_CUSTOM_COOLING_SOLUTION Off
709
set_global_assignment -name POWER_BOARD_TEMPERATURE 25
710
set_global_assignment -name POWER_HPS_ENABLE Off
711
set_global_assignment -name POWER_HPS_PROC_FREQ 0.0
712
set_global_assignment -name ENABLE_SMART_VOLTAGE_ID Off
713
set_global_assignment -name IGNORE_PARTITIONS Off
714
set_global_assignment -name AUTO_EXPORT_INCREMENTAL_COMPILATION Off
715
set_global_assignment -name RAPID_RECOMPILE_ASSIGNMENT_CHECKING On
716
set_global_assignment -name OUTPUT_IO_TIMING_ENDPOINT "Near End"
717
set_global_assignment -name RTLV_REMOVE_FANOUT_FREE_REGISTERS On
718
set_global_assignment -name RTLV_SIMPLIFIED_LOGIC On
719
set_global_assignment -name RTLV_GROUP_RELATED_NODES On
720
set_global_assignment -name RTLV_GROUP_COMB_LOGIC_IN_CLOUD Off
721
set_global_assignment -name RTLV_GROUP_COMB_LOGIC_IN_CLOUD_TMV Off
722
set_global_assignment -name RTLV_GROUP_RELATED_NODES_TMV On
723
set_global_assignment -name EQC_CONSTANT_DFF_DETECTION On
724
set_global_assignment -name EQC_DUPLICATE_DFF_DETECTION On
725
set_global_assignment -name EQC_BBOX_MERGE On
726
set_global_assignment -name EQC_LVDS_MERGE On
727
set_global_assignment -name EQC_RAM_UNMERGING On
728
set_global_assignment -name EQC_DFF_SS_EMULATION On
729
set_global_assignment -name EQC_RAM_REGISTER_UNPACK On
730
set_global_assignment -name EQC_MAC_REGISTER_UNPACK On
731
set_global_assignment -name EQC_SET_PARTITION_BB_TO_VCC_GND On
732
set_global_assignment -name EQC_STRUCTURE_MATCHING On
733
set_global_assignment -name EQC_AUTO_BREAK_CONE On
734
set_global_assignment -name EQC_POWER_UP_COMPARE Off
735
set_global_assignment -name EQC_AUTO_COMP_LOOP_CUT On
736
set_global_assignment -name EQC_AUTO_INVERSION On
737
set_global_assignment -name EQC_AUTO_TERMINATE On
738
set_global_assignment -name EQC_SUB_CONE_REPORT Off
739
set_global_assignment -name EQC_RENAMING_RULES On
740
set_global_assignment -name EQC_PARAMETER_CHECK On
741
set_global_assignment -name EQC_AUTO_PORTSWAP On
742
set_global_assignment -name EQC_DETECT_DONT_CARES On
743
set_global_assignment -name EQC_SHOW_ALL_MAPPED_POINTS Off
744
set_global_assignment -name EDA_INPUT_GND_NAME GND -section_id ?
745
set_global_assignment -name EDA_INPUT_VCC_NAME VCC -section_id ?
746
set_global_assignment -name EDA_INPUT_DATA_FORMAT NONE -section_id ?
747
set_global_assignment -name EDA_SHOW_LMF_MAPPING_MESSAGES Off -section_id ?
748
set_global_assignment -name EDA_RUN_TOOL_AUTOMATICALLY Off -section_id ?
749
set_global_assignment -name RESYNTHESIS_RETIMING FULL -section_id ?
750
set_global_assignment -name RESYNTHESIS_OPTIMIZATION_EFFORT Normal -section_id ?
751
set_global_assignment -name RESYNTHESIS_PHYSICAL_SYNTHESIS Normal -section_id ?
752
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS On -section_id ?
753
set_global_assignment -name VCCPD_VOLTAGE 3.3V -section_id ?
754
set_global_assignment -name EDA_USER_COMPILED_SIMULATION_LIBRARY_DIRECTORY "" -section_id ?
755
set_global_assignment -name EDA_LAUNCH_CMD_LINE_TOOL Off -section_id ?
756
set_global_assignment -name EDA_ENABLE_IPUTF_MODE On -section_id ?
757
set_global_assignment -name EDA_NATIVELINK_PORTABLE_FILE_PATHS Off -section_id ?
758
set_global_assignment -name EDA_NATIVELINK_GENERATE_SCRIPT_ONLY Off -section_id ?
759
set_global_assignment -name EDA_WAIT_FOR_GUI_TOOL_COMPLETION Off -section_id ?
760
set_global_assignment -name EDA_TRUNCATE_LONG_HIERARCHY_PATHS Off -section_id ?
761
set_global_assignment -name EDA_FLATTEN_BUSES Off -section_id ?
762
set_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS Off -section_id ?
763
set_global_assignment -name EDA_GENERATE_TIMING_CLOSURE_DATA Off -section_id ?
764
set_global_assignment -name EDA_GENERATE_POWER_INPUT_FILE Off -section_id ?
765
set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS NOT_USED -section_id ?
766
set_global_assignment -name EDA_RTL_SIM_MODE NOT_USED -section_id ?
767
set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY OFF -section_id ?
768
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST On -section_id ?
769
set_global_assignment -name EDA_WRITE_DEVICE_CONTROL_PORTS Off -section_id ?
770
set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_TCL_FILE Off -section_id ?
771
set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE "All Except Combinational Logic Element Outputs" -section_id ?
772
set_global_assignment -name EDA_ENABLE_GLITCH_FILTERING Off -section_id ?
773
set_global_assignment -name EDA_WRITE_NODES_FOR_POWER_ESTIMATION OFF -section_id ?
774
set_global_assignment -name EDA_SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off -section_id ?
775
set_global_assignment -name EDA_WRITER_DONT_WRITE_TOP_ENTITY Off -section_id ?
776
set_global_assignment -name EDA_VHDL_ARCH_NAME structure -section_id ?
777
set_global_assignment -name EDA_IBIS_MODEL_SELECTOR Off -section_id ?
778
set_global_assignment -name EDA_IBIS_EXTENDED_MODEL_SELECTOR Off -section_id ?
779
set_global_assignment -name EDA_IBIS_MUTUAL_COUPLING Off -section_id ?
780
set_global_assignment -name EDA_FORMAL_VERIFICATION_ALLOW_RETIMING Off -section_id ?
781
set_global_assignment -name EDA_BOARD_BOUNDARY_SCAN_OPERATION PRE_CONFIG -section_id ?
782
set_global_assignment -name EDA_GENERATE_RTL_SIMULATION_COMMAND_SCRIPT Off -section_id ?
783
set_global_assignment -name EDA_GENERATE_GATE_LEVEL_SIMULATION_COMMAND_SCRIPT Off -section_id ?
784
set_global_assignment -name EDA_IBIS_SPECIFICATION_VERSION 4p2 -section_id ?
785
set_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_OFFSET 0ns -section_id ?
786
set_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_DUTY_CYCLE 50 -section_id ?
787
set_global_assignment -name APEX20K_CLIQUE_TYPE LAB -section_id ? -entity ?
788
set_global_assignment -name MAX7K_CLIQUE_TYPE LAB -section_id ? -entity ?
789
set_global_assignment -name MERCURY_CLIQUE_TYPE LAB -section_id ? -entity ?
790
set_global_assignment -name FLEX6K_CLIQUE_TYPE LAB -section_id ? -entity ?
791
set_global_assignment -name FLEX10K_CLIQUE_TYPE LAB -section_id ? -entity ?
792
set_global_assignment -name PARTITION_PRESERVE_HIGH_SPEED_TILES On -section_id ? -entity ?
793
set_global_assignment -name PARTITION_IGNORE_SOURCE_FILE_CHANGES Off -section_id ? -entity ?
794
set_global_assignment -name PARTITION_ALWAYS_USE_QXP_NETLIST Off -section_id ? -entity ?
795
set_global_assignment -name PARTITION_IMPORT_ASSIGNMENTS On -section_id ? -entity ?
796
set_global_assignment -name PARTITION_IMPORT_EXISTING_ASSIGNMENTS REPLACE_CONFLICTING -section_id ? -entity ?
797
set_global_assignment -name PARTITION_IMPORT_EXISTING_LOGICLOCK_REGIONS UPDATE_CONFLICTING -section_id ? -entity ?
798
set_global_assignment -name PARTITION_IMPORT_PROMOTE_ASSIGNMENTS On -section_id ? -entity ?
799
set_global_assignment -name ALLOW_MULTIPLE_PERSONAS Off -section_id ? -entity ?
800
set_global_assignment -name PARTITION_ASD_REGION_ID 1 -section_id ? -entity ?
801
set_global_assignment -name CROSS_BOUNDARY_OPTIMIZATIONS Off -section_id ? -entity ?
802
set_global_assignment -name PROPAGATE_CONSTANTS_ON_INPUTS On -section_id ? -entity ?
803
set_global_assignment -name PROPAGATE_INVERSIONS_ON_INPUTS On -section_id ? -entity ?
804
set_global_assignment -name REMOVE_LOGIC_ON_UNCONNECTED_OUTPUTS On -section_id ? -entity ?
805
set_global_assignment -name MERGE_EQUIVALENT_INPUTS On -section_id ? -entity ?
806
set_global_assignment -name MERGE_EQUIVALENT_BIDIRS On -section_id ? -entity ?
807
set_global_assignment -name ABSORB_PATHS_FROM_OUTPUTS_TO_INPUTS On -section_id ? -entity ?
808
set_global_assignment -name PARTITION_ENABLE_STRICT_PRESERVATION Off -section_id ? -entity ?

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