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[/] [tsv/] [trunk/] [test/] [T001.TSV] - Blame information for rev 3

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module mkExample (Empty);
    //Reg#(Bit#(8)) r <- mkReg(?);    // don't-care is used for the
    //Reg#(Bit#(8)) r1<- mkReg(8'h33);
    Reg#(Bit#(8)) r2<- mkReg(~0);
    rule every( True );             // reset value of the Reg
        $display("value is %h", r); // the value of r is displayed
    endrule
endmodule

Line No.	Rev	Author	Line
1	3	chenm001	`module mkExample (Empty);`
2			`//Reg#(Bit#(8)) r <- mkReg(?); // don't-care is used for the`
3			`//Reg#(Bit#(8)) r1<- mkReg(8'h33);`
4			`Reg#(Bit#(8)) r2<- mkReg(~0);`
5			`rule every( True ); // reset value of the Reg`
6			`$display("value is %h", r); // the value of r is displayed`
7			`endrule`
8			`endmodule`

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[/] [tsv/] [trunk/] [test/] [T001.TSV] - Blame information for rev 3