URL https://opencores.org/ocsvn/turbo8051/turbo8051/trunk

Subversion Repositories turbo8051

[/] [turbo8051/] [trunk/] [fpga/] [altera/] [summary/] [turbo8051.map.summary] - Blame information for rev 34

Details | Compare with Previous | View Log


Analysis & Synthesis Status : Successful - Wed Mar 16 11:29:22 2011
Quartus II Version : 9.0 Build 132 02/25/2009 SJ Full Version
Revision Name : turbo8051
Top-level Entity Name : turbo8051
Family : Cyclone II
Total logic elements : 7,566
    Total combinational functions : 5,072
    Dedicated logic registers : 3,261
Total registers : 3261
Total pins : 272
Total virtual pins : 0
Total memory bits : 3,072
Embedded Multiplier 9-bit elements : 0
Total PLLs : 1

Line No.	Rev	Author	Line
1	34	dinesha	`Analysis & Synthesis Status : Successful - Wed Mar 16 11:29:22 2011`
2			`Quartus II Version : 9.0 Build 132 02/25/2009 SJ Full Version`
3			`Revision Name : turbo8051`
4			`Top-level Entity Name : turbo8051`
5			`Family : Cyclone II`
6			`Total logic elements : 7,566`
7			`Total combinational functions : 5,072`
8			`Dedicated logic registers : 3,261`
9			`Total registers : 3261`
10			`Total pins : 272`
11			`Total virtual pins : 0`
12			`Total memory bits : 3,072`
13			`Embedded Multiplier 9-bit elements : 0`
14			`Total PLLs : 1`

Browse

Tools

Subversion Repositories turbo8051

[/] [turbo8051/] [trunk/] [fpga/] [altera/] [summary/] [turbo8051.map.summary] - Blame information for rev 34