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URL https://opencores.org/ocsvn/turbo8051/turbo8051/trunk

Subversion Repositories turbo8051

[/] [turbo8051/] [trunk/] [rtl/] [8051/] [make_verilog] - Blame information for rev 68

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Line No. Rev Author Line
1 2 dinesha
oc8051_top.v
2
oc8051_alu_src_sel.v
3
oc8051_alu.v
4
oc8051_decoder.v
5
oc8051_divide.v
6
oc8051_multiply.v
7
oc8051_memory_interface.v
8
oc8051_acc.v
9
oc8051_comp.v
10
oc8051_sp.v
11
oc8051_dptr.v
12
oc8051_cy_select.v
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oc8051_psw.v
14
oc8051_indi_addr.v
15
oc8051_ports.v
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oc8051_b_register.v
17
oc8051_int.v
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oc8051_tc.v
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oc8051_tc2.v
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oc8051_sfr.v
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oc8051_ram_top.v
22
oc8051_ram_256x8_two_bist.v
23
//../../common/generic_memories/rtl/verilog/generic_dpram.v

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