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dinesha |
//////////////////////////////////////////////////////////////////////
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//// ////
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//// 8051 internal program rom ////
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//// ////
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//// This file is part of the 8051 cores project ////
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//// http://www.opencores.org/cores/8051/ ////
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//// ////
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//// Description ////
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//// internal program rom for 8051 core ////
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//// ////
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//// To Do: ////
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//// Nothing ////
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//// ////
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//// Author(s): ////
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//// - Simon Teran, simont@opencores.org ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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//
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// $Log: not supported by cvs2svn $
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// Revision 1.3 2003/06/03 17:09:57 simont
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// pipelined acces to axternal instruction interface added.
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//
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// Revision 1.2 2003/04/03 19:17:19 simont
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// add `include "oc8051_defines.v"
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//
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// Revision 1.1 2003/04/02 11:16:22 simont
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// initial inport
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//
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// Revision 1.4 2002/10/23 17:00:18 simont
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// signal es_int=1'b0
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//
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// Revision 1.3 2002/09/30 17:34:01 simont
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// prepared header
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//
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//
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`include "oc8051_defines.v"
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module oc8051_rom (rst, clk, addr, ea_int, data_o);
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//parameter INT_ROM_WID= 15;
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input rst, clk;
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input [15:0] addr;
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//input [22:0] addr;
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output ea_int;
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output [31:0] data_o;
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reg [31:0] data_o;
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wire ea;
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reg ea_int;
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`ifdef OC8051_XILINX_ROM
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parameter INT_ROM_WID= 12;
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reg [4:0] addr01;
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reg [7:0] data1,data2,data3;
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wire [15:0] addr_rst;
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wire [7:0] int_data0, int_data1, int_data2, int_data3, int_data4, int_data5, int_data6, int_data7, int_data8, int_data9, int_data10, int_data11, int_data12, int_data13, int_data14, int_data15, int_data16, int_data17, int_data18, int_data19, int_data20, int_data21, int_data22, int_data23, int_data24, int_data25, int_data26, int_data27, int_data28, int_data29, int_data30, int_data31, int_data32, int_data33, int_data34, int_data35, int_data36, int_data37, int_data38, int_data39, int_data40, int_data41, int_data42, int_data43, int_data44, int_data45, int_data46, int_data47, int_data48, int_data49, int_data50, int_data51, int_data52, int_data53, int_data54, int_data55, int_data56, int_data57, int_data58, int_data59, int_data60, int_data61, int_data62, int_data63, int_data64, int_data65, int_data66, int_data67, int_data68, int_data69, int_data70, int_data71, int_data72, int_data73, int_data74, int_data75, int_data76, int_data77, int_data78, int_data79, int_data80, int_data81, int_data82, int_data83, int_data84, int_data85, int_data86, int_data87, int_data88, int_data89, int_data90, int_data91, int_data92, int_data93, int_data94, int_data95, int_data96, int_data97, int_data98, int_data99, int_data100, int_data101, int_data102, int_data103, int_data104, int_data105, int_data106, int_data107, int_data108, int_data109, int_data110, int_data111, int_data112, int_data113, int_data114, int_data115, int_data116, int_data117, int_data118, int_data119, int_data120, int_data121, int_data122, int_data123, int_data124, int_data125, int_data126, int_data127;
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assign ea = | addr[15:INT_ROM_WID];
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assign addr_rst = rst ? 16'h0000 : addr;
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rom0 rom_0 (.a(addr01), .o(int_data0));
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rom1 rom_1 (.a(addr01), .o(int_data1));
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rom2 rom_2 (.a(addr_rst[11:7]), .o(int_data2));
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rom3 rom_3 (.a(addr_rst[11:7]), .o(int_data3));
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rom4 rom_4 (.a(addr_rst[11:7]), .o(int_data4));
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rom5 rom_5 (.a(addr_rst[11:7]), .o(int_data5));
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rom6 rom_6 (.a(addr_rst[11:7]), .o(int_data6));
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rom7 rom_7 (.a(addr_rst[11:7]), .o(int_data7));
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rom8 rom_8 (.a(addr_rst[11:7]), .o(int_data8));
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rom9 rom_9 (.a(addr_rst[11:7]), .o(int_data9));
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rom10 rom_10 (.a(addr_rst[11:7]), .o(int_data10));
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rom11 rom_11 (.a(addr_rst[11:7]), .o(int_data11));
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rom12 rom_12 (.a(addr_rst[11:7]), .o(int_data12));
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rom13 rom_13 (.a(addr_rst[11:7]), .o(int_data13));
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rom14 rom_14 (.a(addr_rst[11:7]), .o(int_data14));
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rom15 rom_15 (.a(addr_rst[11:7]), .o(int_data15));
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rom16 rom_16 (.a(addr_rst[11:7]), .o(int_data16));
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rom17 rom_17 (.a(addr_rst[11:7]), .o(int_data17));
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rom18 rom_18 (.a(addr_rst[11:7]), .o(int_data18));
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rom19 rom_19 (.a(addr_rst[11:7]), .o(int_data19));
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rom20 rom_20 (.a(addr_rst[11:7]), .o(int_data20));
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rom21 rom_21 (.a(addr_rst[11:7]), .o(int_data21));
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rom22 rom_22 (.a(addr_rst[11:7]), .o(int_data22));
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rom23 rom_23 (.a(addr_rst[11:7]), .o(int_data23));
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rom24 rom_24 (.a(addr_rst[11:7]), .o(int_data24));
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rom25 rom_25 (.a(addr_rst[11:7]), .o(int_data25));
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rom26 rom_26 (.a(addr_rst[11:7]), .o(int_data26));
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rom27 rom_27 (.a(addr_rst[11:7]), .o(int_data27));
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rom28 rom_28 (.a(addr_rst[11:7]), .o(int_data28));
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rom29 rom_29 (.a(addr_rst[11:7]), .o(int_data29));
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rom30 rom_30 (.a(addr_rst[11:7]), .o(int_data30));
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rom31 rom_31 (.a(addr_rst[11:7]), .o(int_data31));
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rom32 rom_32 (.a(addr_rst[11:7]), .o(int_data32));
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rom33 rom_33 (.a(addr_rst[11:7]), .o(int_data33));
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rom34 rom_34 (.a(addr_rst[11:7]), .o(int_data34));
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rom35 rom_35 (.a(addr_rst[11:7]), .o(int_data35));
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rom36 rom_36 (.a(addr_rst[11:7]), .o(int_data36));
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rom37 rom_37 (.a(addr_rst[11:7]), .o(int_data37));
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rom38 rom_38 (.a(addr_rst[11:7]), .o(int_data38));
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rom39 rom_39 (.a(addr_rst[11:7]), .o(int_data39));
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rom40 rom_40 (.a(addr_rst[11:7]), .o(int_data40));
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rom41 rom_41 (.a(addr_rst[11:7]), .o(int_data41));
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rom42 rom_42 (.a(addr_rst[11:7]), .o(int_data42));
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rom43 rom_43 (.a(addr_rst[11:7]), .o(int_data43));
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rom44 rom_44 (.a(addr_rst[11:7]), .o(int_data44));
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rom45 rom_45 (.a(addr_rst[11:7]), .o(int_data45));
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rom46 rom_46 (.a(addr_rst[11:7]), .o(int_data46));
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rom47 rom_47 (.a(addr_rst[11:7]), .o(int_data47));
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rom48 rom_48 (.a(addr_rst[11:7]), .o(int_data48));
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rom49 rom_49 (.a(addr_rst[11:7]), .o(int_data49));
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rom50 rom_50 (.a(addr_rst[11:7]), .o(int_data50));
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rom51 rom_51 (.a(addr_rst[11:7]), .o(int_data51));
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rom52 rom_52 (.a(addr_rst[11:7]), .o(int_data52));
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rom53 rom_53 (.a(addr_rst[11:7]), .o(int_data53));
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rom54 rom_54 (.a(addr_rst[11:7]), .o(int_data54));
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rom55 rom_55 (.a(addr_rst[11:7]), .o(int_data55));
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rom56 rom_56 (.a(addr_rst[11:7]), .o(int_data56));
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rom57 rom_57 (.a(addr_rst[11:7]), .o(int_data57));
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rom58 rom_58 (.a(addr_rst[11:7]), .o(int_data58));
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rom59 rom_59 (.a(addr_rst[11:7]), .o(int_data59));
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rom60 rom_60 (.a(addr_rst[11:7]), .o(int_data60));
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rom61 rom_61 (.a(addr_rst[11:7]), .o(int_data61));
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rom62 rom_62 (.a(addr_rst[11:7]), .o(int_data62));
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rom63 rom_63 (.a(addr_rst[11:7]), .o(int_data63));
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rom64 rom_64 (.a(addr_rst[11:7]), .o(int_data64));
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rom65 rom_65 (.a(addr_rst[11:7]), .o(int_data65));
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rom66 rom_66 (.a(addr_rst[11:7]), .o(int_data66));
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rom67 rom_67 (.a(addr_rst[11:7]), .o(int_data67));
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rom68 rom_68 (.a(addr_rst[11:7]), .o(int_data68));
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rom69 rom_69 (.a(addr_rst[11:7]), .o(int_data69));
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rom70 rom_70 (.a(addr_rst[11:7]), .o(int_data70));
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rom71 rom_71 (.a(addr_rst[11:7]), .o(int_data71));
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rom72 rom_72 (.a(addr_rst[11:7]), .o(int_data72));
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rom73 rom_73 (.a(addr_rst[11:7]), .o(int_data73));
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rom74 rom_74 (.a(addr_rst[11:7]), .o(int_data74));
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rom75 rom_75 (.a(addr_rst[11:7]), .o(int_data75));
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rom76 rom_76 (.a(addr_rst[11:7]), .o(int_data76));
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rom77 rom_77 (.a(addr_rst[11:7]), .o(int_data77));
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rom78 rom_78 (.a(addr_rst[11:7]), .o(int_data78));
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rom79 rom_79 (.a(addr_rst[11:7]), .o(int_data79));
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rom80 rom_80 (.a(addr_rst[11:7]), .o(int_data80));
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rom81 rom_81 (.a(addr_rst[11:7]), .o(int_data81));
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rom82 rom_82 (.a(addr_rst[11:7]), .o(int_data82));
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rom83 rom_83 (.a(addr_rst[11:7]), .o(int_data83));
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rom84 rom_84 (.a(addr_rst[11:7]), .o(int_data84));
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rom85 rom_85 (.a(addr_rst[11:7]), .o(int_data85));
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rom86 rom_86 (.a(addr_rst[11:7]), .o(int_data86));
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rom87 rom_87 (.a(addr_rst[11:7]), .o(int_data87));
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rom88 rom_88 (.a(addr_rst[11:7]), .o(int_data88));
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rom89 rom_89 (.a(addr_rst[11:7]), .o(int_data89));
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rom90 rom_90 (.a(addr_rst[11:7]), .o(int_data90));
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rom91 rom_91 (.a(addr_rst[11:7]), .o(int_data91));
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rom92 rom_92 (.a(addr_rst[11:7]), .o(int_data92));
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rom93 rom_93 (.a(addr_rst[11:7]), .o(int_data93));
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rom94 rom_94 (.a(addr_rst[11:7]), .o(int_data94));
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rom95 rom_95 (.a(addr_rst[11:7]), .o(int_data95));
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rom96 rom_96 (.a(addr_rst[11:7]), .o(int_data96));
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rom97 rom_97 (.a(addr_rst[11:7]), .o(int_data97));
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rom98 rom_98 (.a(addr_rst[11:7]), .o(int_data98));
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rom99 rom_99 (.a(addr_rst[11:7]), .o(int_data99));
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rom100 rom_100 (.a(addr_rst[11:7]), .o(int_data100));
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rom101 rom_101 (.a(addr_rst[11:7]), .o(int_data101));
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rom102 rom_102 (.a(addr_rst[11:7]), .o(int_data102));
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rom103 rom_103 (.a(addr_rst[11:7]), .o(int_data103));
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rom104 rom_104 (.a(addr_rst[11:7]), .o(int_data104));
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rom105 rom_105 (.a(addr_rst[11:7]), .o(int_data105));
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rom106 rom_106 (.a(addr_rst[11:7]), .o(int_data106));
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rom107 rom_107 (.a(addr_rst[11:7]), .o(int_data107));
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rom108 rom_108 (.a(addr_rst[11:7]), .o(int_data108));
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rom109 rom_109 (.a(addr_rst[11:7]), .o(int_data109));
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rom110 rom_110 (.a(addr_rst[11:7]), .o(int_data110));
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rom111 rom_111 (.a(addr_rst[11:7]), .o(int_data111));
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rom112 rom_112 (.a(addr_rst[11:7]), .o(int_data112));
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rom113 rom_113 (.a(addr_rst[11:7]), .o(int_data113));
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rom114 rom_114 (.a(addr_rst[11:7]), .o(int_data114));
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rom115 rom_115 (.a(addr_rst[11:7]), .o(int_data115));
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rom116 rom_116 (.a(addr_rst[11:7]), .o(int_data116));
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rom117 rom_117 (.a(addr_rst[11:7]), .o(int_data117));
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rom118 rom_118 (.a(addr_rst[11:7]), .o(int_data118));
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214 |
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rom119 rom_119 (.a(addr_rst[11:7]), .o(int_data119));
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rom120 rom_120 (.a(addr_rst[11:7]), .o(int_data120));
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rom121 rom_121 (.a(addr_rst[11:7]), .o(int_data121));
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217 |
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rom122 rom_122 (.a(addr_rst[11:7]), .o(int_data122));
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218 |
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rom123 rom_123 (.a(addr_rst[11:7]), .o(int_data123));
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219 |
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rom124 rom_124 (.a(addr_rst[11:7]), .o(int_data124));
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220 |
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rom125 rom_125 (.a(addr_rst[11:7]), .o(int_data125));
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221 |
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rom126 rom_126 (.a(addr_rst[11:7]), .o(int_data126));
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222 |
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rom127 rom_127 (.a(addr_rst[11:7]), .o(int_data127));
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always @(addr_rst)
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225 |
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begin
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226 |
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if (addr_rst[1])
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addr01= addr_rst[11:7]+ 5'h1;
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else
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addr01= addr_rst[11:7];
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end
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231 |
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232 |
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//
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233 |
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// always read tree bits in row
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234 |
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always @(posedge clk)
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235 |
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begin
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236 |
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case(addr[6:0]) /* synopsys parallel_case */
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237 |
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7'd0: begin
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238 |
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data1 <= #1 int_data0;
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239 |
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data2 <= #1 int_data1;
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data3 <= #1 int_data2;
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end
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7'd1: begin
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243 |
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data1 <= #1 int_data1;
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244 |
|
|
data2 <= #1 int_data2;
|
245 |
|
|
data3 <= #1 int_data3;
|
246 |
|
|
end
|
247 |
|
|
7'd2: begin
|
248 |
|
|
data1 <= #1 int_data2;
|
249 |
|
|
data2 <= #1 int_data3;
|
250 |
|
|
data3 <= #1 int_data4;
|
251 |
|
|
end
|
252 |
|
|
7'd3: begin
|
253 |
|
|
data1 <= #1 int_data3;
|
254 |
|
|
data2 <= #1 int_data4;
|
255 |
|
|
data3 <= #1 int_data5;
|
256 |
|
|
end
|
257 |
|
|
7'd4: begin
|
258 |
|
|
data1 <= #1 int_data4;
|
259 |
|
|
data2 <= #1 int_data5;
|
260 |
|
|
data3 <= #1 int_data6;
|
261 |
|
|
end
|
262 |
|
|
7'd5: begin
|
263 |
|
|
data1 <= #1 int_data5;
|
264 |
|
|
data2 <= #1 int_data6;
|
265 |
|
|
data3 <= #1 int_data7;
|
266 |
|
|
end
|
267 |
|
|
7'd6: begin
|
268 |
|
|
data1 <= #1 int_data6;
|
269 |
|
|
data2 <= #1 int_data7;
|
270 |
|
|
data3 <= #1 int_data8;
|
271 |
|
|
end
|
272 |
|
|
7'd7: begin
|
273 |
|
|
data1 <= #1 int_data7;
|
274 |
|
|
data2 <= #1 int_data8;
|
275 |
|
|
data3 <= #1 int_data9;
|
276 |
|
|
end
|
277 |
|
|
7'd8: begin
|
278 |
|
|
data1 <= #1 int_data8;
|
279 |
|
|
data2 <= #1 int_data9;
|
280 |
|
|
data3 <= #1 int_data10;
|
281 |
|
|
end
|
282 |
|
|
7'd9: begin
|
283 |
|
|
data1 <= #1 int_data9;
|
284 |
|
|
data2 <= #1 int_data10;
|
285 |
|
|
data3 <= #1 int_data11;
|
286 |
|
|
end
|
287 |
|
|
7'd10: begin
|
288 |
|
|
data1 <= #1 int_data10;
|
289 |
|
|
data2 <= #1 int_data11;
|
290 |
|
|
data3 <= #1 int_data12;
|
291 |
|
|
end
|
292 |
|
|
7'd11: begin
|
293 |
|
|
data1 <= #1 int_data11;
|
294 |
|
|
data2 <= #1 int_data12;
|
295 |
|
|
data3 <= #1 int_data13;
|
296 |
|
|
end
|
297 |
|
|
7'd12: begin
|
298 |
|
|
data1 <= #1 int_data12;
|
299 |
|
|
data2 <= #1 int_data13;
|
300 |
|
|
data3 <= #1 int_data14;
|
301 |
|
|
end
|
302 |
|
|
7'd13: begin
|
303 |
|
|
data1 <= #1 int_data13;
|
304 |
|
|
data2 <= #1 int_data14;
|
305 |
|
|
data3 <= #1 int_data15;
|
306 |
|
|
end
|
307 |
|
|
7'd14: begin
|
308 |
|
|
data1 <= #1 int_data14;
|
309 |
|
|
data2 <= #1 int_data15;
|
310 |
|
|
data3 <= #1 int_data16;
|
311 |
|
|
end
|
312 |
|
|
7'd15: begin
|
313 |
|
|
data1 <= #1 int_data15;
|
314 |
|
|
data2 <= #1 int_data16;
|
315 |
|
|
data3 <= #1 int_data17;
|
316 |
|
|
end
|
317 |
|
|
7'd16: begin
|
318 |
|
|
data1 <= #1 int_data16;
|
319 |
|
|
data2 <= #1 int_data17;
|
320 |
|
|
data3 <= #1 int_data18;
|
321 |
|
|
end
|
322 |
|
|
7'd17: begin
|
323 |
|
|
data1 <= #1 int_data17;
|
324 |
|
|
data2 <= #1 int_data18;
|
325 |
|
|
data3 <= #1 int_data19;
|
326 |
|
|
end
|
327 |
|
|
7'd18: begin
|
328 |
|
|
data1 <= #1 int_data18;
|
329 |
|
|
data2 <= #1 int_data19;
|
330 |
|
|
data3 <= #1 int_data20;
|
331 |
|
|
end
|
332 |
|
|
7'd19: begin
|
333 |
|
|
data1 <= #1 int_data19;
|
334 |
|
|
data2 <= #1 int_data20;
|
335 |
|
|
data3 <= #1 int_data21;
|
336 |
|
|
end
|
337 |
|
|
7'd20: begin
|
338 |
|
|
data1 <= #1 int_data20;
|
339 |
|
|
data2 <= #1 int_data21;
|
340 |
|
|
data3 <= #1 int_data22;
|
341 |
|
|
end
|
342 |
|
|
7'd21: begin
|
343 |
|
|
data1 <= #1 int_data21;
|
344 |
|
|
data2 <= #1 int_data22;
|
345 |
|
|
data3 <= #1 int_data23;
|
346 |
|
|
end
|
347 |
|
|
7'd22: begin
|
348 |
|
|
data1 <= #1 int_data22;
|
349 |
|
|
data2 <= #1 int_data23;
|
350 |
|
|
data3 <= #1 int_data24;
|
351 |
|
|
end
|
352 |
|
|
7'd23: begin
|
353 |
|
|
data1 <= #1 int_data23;
|
354 |
|
|
data2 <= #1 int_data24;
|
355 |
|
|
data3 <= #1 int_data25;
|
356 |
|
|
end
|
357 |
|
|
7'd24: begin
|
358 |
|
|
data1 <= #1 int_data24;
|
359 |
|
|
data2 <= #1 int_data25;
|
360 |
|
|
data3 <= #1 int_data26;
|
361 |
|
|
end
|
362 |
|
|
7'd25: begin
|
363 |
|
|
data1 <= #1 int_data25;
|
364 |
|
|
data2 <= #1 int_data26;
|
365 |
|
|
data3 <= #1 int_data27;
|
366 |
|
|
end
|
367 |
|
|
7'd26: begin
|
368 |
|
|
data1 <= #1 int_data26;
|
369 |
|
|
data2 <= #1 int_data27;
|
370 |
|
|
data3 <= #1 int_data28;
|
371 |
|
|
end
|
372 |
|
|
7'd27: begin
|
373 |
|
|
data1 <= #1 int_data27;
|
374 |
|
|
data2 <= #1 int_data28;
|
375 |
|
|
data3 <= #1 int_data29;
|
376 |
|
|
end
|
377 |
|
|
7'd28: begin
|
378 |
|
|
data1 <= #1 int_data28;
|
379 |
|
|
data2 <= #1 int_data29;
|
380 |
|
|
data3 <= #1 int_data30;
|
381 |
|
|
end
|
382 |
|
|
7'd29: begin
|
383 |
|
|
data1 <= #1 int_data29;
|
384 |
|
|
data2 <= #1 int_data30;
|
385 |
|
|
data3 <= #1 int_data31;
|
386 |
|
|
end
|
387 |
|
|
7'd30: begin
|
388 |
|
|
data1 <= #1 int_data30;
|
389 |
|
|
data2 <= #1 int_data31;
|
390 |
|
|
data3 <= #1 int_data32;
|
391 |
|
|
end
|
392 |
|
|
7'd31: begin
|
393 |
|
|
data1 <= #1 int_data31;
|
394 |
|
|
data2 <= #1 int_data32;
|
395 |
|
|
data3 <= #1 int_data33;
|
396 |
|
|
end
|
397 |
|
|
7'd32: begin
|
398 |
|
|
data1 <= #1 int_data32;
|
399 |
|
|
data2 <= #1 int_data33;
|
400 |
|
|
data3 <= #1 int_data34;
|
401 |
|
|
end
|
402 |
|
|
7'd33: begin
|
403 |
|
|
data1 <= #1 int_data33;
|
404 |
|
|
data2 <= #1 int_data34;
|
405 |
|
|
data3 <= #1 int_data35;
|
406 |
|
|
end
|
407 |
|
|
7'd34: begin
|
408 |
|
|
data1 <= #1 int_data34;
|
409 |
|
|
data2 <= #1 int_data35;
|
410 |
|
|
data3 <= #1 int_data36;
|
411 |
|
|
end
|
412 |
|
|
7'd35: begin
|
413 |
|
|
data1 <= #1 int_data35;
|
414 |
|
|
data2 <= #1 int_data36;
|
415 |
|
|
data3 <= #1 int_data37;
|
416 |
|
|
end
|
417 |
|
|
7'd36: begin
|
418 |
|
|
data1 <= #1 int_data36;
|
419 |
|
|
data2 <= #1 int_data37;
|
420 |
|
|
data3 <= #1 int_data38;
|
421 |
|
|
end
|
422 |
|
|
7'd37: begin
|
423 |
|
|
data1 <= #1 int_data37;
|
424 |
|
|
data2 <= #1 int_data38;
|
425 |
|
|
data3 <= #1 int_data39;
|
426 |
|
|
end
|
427 |
|
|
7'd38: begin
|
428 |
|
|
data1 <= #1 int_data38;
|
429 |
|
|
data2 <= #1 int_data39;
|
430 |
|
|
data3 <= #1 int_data40;
|
431 |
|
|
end
|
432 |
|
|
7'd39: begin
|
433 |
|
|
data1 <= #1 int_data39;
|
434 |
|
|
data2 <= #1 int_data40;
|
435 |
|
|
data3 <= #1 int_data41;
|
436 |
|
|
end
|
437 |
|
|
7'd40: begin
|
438 |
|
|
data1 <= #1 int_data40;
|
439 |
|
|
data2 <= #1 int_data41;
|
440 |
|
|
data3 <= #1 int_data42;
|
441 |
|
|
end
|
442 |
|
|
7'd41: begin
|
443 |
|
|
data1 <= #1 int_data41;
|
444 |
|
|
data2 <= #1 int_data42;
|
445 |
|
|
data3 <= #1 int_data43;
|
446 |
|
|
end
|
447 |
|
|
7'd42: begin
|
448 |
|
|
data1 <= #1 int_data42;
|
449 |
|
|
data2 <= #1 int_data43;
|
450 |
|
|
data3 <= #1 int_data44;
|
451 |
|
|
end
|
452 |
|
|
7'd43: begin
|
453 |
|
|
data1 <= #1 int_data43;
|
454 |
|
|
data2 <= #1 int_data44;
|
455 |
|
|
data3 <= #1 int_data45;
|
456 |
|
|
end
|
457 |
|
|
7'd44: begin
|
458 |
|
|
data1 <= #1 int_data44;
|
459 |
|
|
data2 <= #1 int_data45;
|
460 |
|
|
data3 <= #1 int_data46;
|
461 |
|
|
end
|
462 |
|
|
7'd45: begin
|
463 |
|
|
data1 <= #1 int_data45;
|
464 |
|
|
data2 <= #1 int_data46;
|
465 |
|
|
data3 <= #1 int_data47;
|
466 |
|
|
end
|
467 |
|
|
7'd46: begin
|
468 |
|
|
data1 <= #1 int_data46;
|
469 |
|
|
data2 <= #1 int_data47;
|
470 |
|
|
data3 <= #1 int_data48;
|
471 |
|
|
end
|
472 |
|
|
7'd47: begin
|
473 |
|
|
data1 <= #1 int_data47;
|
474 |
|
|
data2 <= #1 int_data48;
|
475 |
|
|
data3 <= #1 int_data49;
|
476 |
|
|
end
|
477 |
|
|
7'd48: begin
|
478 |
|
|
data1 <= #1 int_data48;
|
479 |
|
|
data2 <= #1 int_data49;
|
480 |
|
|
data3 <= #1 int_data50;
|
481 |
|
|
end
|
482 |
|
|
7'd49: begin
|
483 |
|
|
data1 <= #1 int_data49;
|
484 |
|
|
data2 <= #1 int_data50;
|
485 |
|
|
data3 <= #1 int_data51;
|
486 |
|
|
end
|
487 |
|
|
7'd50: begin
|
488 |
|
|
data1 <= #1 int_data50;
|
489 |
|
|
data2 <= #1 int_data51;
|
490 |
|
|
data3 <= #1 int_data52;
|
491 |
|
|
end
|
492 |
|
|
7'd51: begin
|
493 |
|
|
data1 <= #1 int_data51;
|
494 |
|
|
data2 <= #1 int_data52;
|
495 |
|
|
data3 <= #1 int_data53;
|
496 |
|
|
end
|
497 |
|
|
7'd52: begin
|
498 |
|
|
data1 <= #1 int_data52;
|
499 |
|
|
data2 <= #1 int_data53;
|
500 |
|
|
data3 <= #1 int_data54;
|
501 |
|
|
end
|
502 |
|
|
7'd53: begin
|
503 |
|
|
data1 <= #1 int_data53;
|
504 |
|
|
data2 <= #1 int_data54;
|
505 |
|
|
data3 <= #1 int_data55;
|
506 |
|
|
end
|
507 |
|
|
7'd54: begin
|
508 |
|
|
data1 <= #1 int_data54;
|
509 |
|
|
data2 <= #1 int_data55;
|
510 |
|
|
data3 <= #1 int_data56;
|
511 |
|
|
end
|
512 |
|
|
7'd55: begin
|
513 |
|
|
data1 <= #1 int_data55;
|
514 |
|
|
data2 <= #1 int_data56;
|
515 |
|
|
data3 <= #1 int_data57;
|
516 |
|
|
end
|
517 |
|
|
7'd56: begin
|
518 |
|
|
data1 <= #1 int_data56;
|
519 |
|
|
data2 <= #1 int_data57;
|
520 |
|
|
data3 <= #1 int_data58;
|
521 |
|
|
end
|
522 |
|
|
7'd57: begin
|
523 |
|
|
data1 <= #1 int_data57;
|
524 |
|
|
data2 <= #1 int_data58;
|
525 |
|
|
data3 <= #1 int_data59;
|
526 |
|
|
end
|
527 |
|
|
7'd58: begin
|
528 |
|
|
data1 <= #1 int_data58;
|
529 |
|
|
data2 <= #1 int_data59;
|
530 |
|
|
data3 <= #1 int_data60;
|
531 |
|
|
end
|
532 |
|
|
7'd59: begin
|
533 |
|
|
data1 <= #1 int_data59;
|
534 |
|
|
data2 <= #1 int_data60;
|
535 |
|
|
data3 <= #1 int_data61;
|
536 |
|
|
end
|
537 |
|
|
7'd60: begin
|
538 |
|
|
data1 <= #1 int_data60;
|
539 |
|
|
data2 <= #1 int_data61;
|
540 |
|
|
data3 <= #1 int_data62;
|
541 |
|
|
end
|
542 |
|
|
7'd61: begin
|
543 |
|
|
data1 <= #1 int_data61;
|
544 |
|
|
data2 <= #1 int_data62;
|
545 |
|
|
data3 <= #1 int_data63;
|
546 |
|
|
end
|
547 |
|
|
7'd62: begin
|
548 |
|
|
data1 <= #1 int_data62;
|
549 |
|
|
data2 <= #1 int_data63;
|
550 |
|
|
data3 <= #1 int_data64;
|
551 |
|
|
end
|
552 |
|
|
7'd63: begin
|
553 |
|
|
data1 <= #1 int_data63;
|
554 |
|
|
data2 <= #1 int_data64;
|
555 |
|
|
data3 <= #1 int_data65;
|
556 |
|
|
end
|
557 |
|
|
7'd64: begin
|
558 |
|
|
data1 <= #1 int_data64;
|
559 |
|
|
data2 <= #1 int_data65;
|
560 |
|
|
data3 <= #1 int_data66;
|
561 |
|
|
end
|
562 |
|
|
7'd65: begin
|
563 |
|
|
data1 <= #1 int_data65;
|
564 |
|
|
data2 <= #1 int_data66;
|
565 |
|
|
data3 <= #1 int_data67;
|
566 |
|
|
end
|
567 |
|
|
7'd66: begin
|
568 |
|
|
data1 <= #1 int_data66;
|
569 |
|
|
data2 <= #1 int_data67;
|
570 |
|
|
data3 <= #1 int_data68;
|
571 |
|
|
end
|
572 |
|
|
7'd67: begin
|
573 |
|
|
data1 <= #1 int_data67;
|
574 |
|
|
data2 <= #1 int_data68;
|
575 |
|
|
data3 <= #1 int_data69;
|
576 |
|
|
end
|
577 |
|
|
7'd68: begin
|
578 |
|
|
data1 <= #1 int_data68;
|
579 |
|
|
data2 <= #1 int_data69;
|
580 |
|
|
data3 <= #1 int_data70;
|
581 |
|
|
end
|
582 |
|
|
7'd69: begin
|
583 |
|
|
data1 <= #1 int_data69;
|
584 |
|
|
data2 <= #1 int_data70;
|
585 |
|
|
data3 <= #1 int_data71;
|
586 |
|
|
end
|
587 |
|
|
7'd70: begin
|
588 |
|
|
data1 <= #1 int_data70;
|
589 |
|
|
data2 <= #1 int_data71;
|
590 |
|
|
data3 <= #1 int_data72;
|
591 |
|
|
end
|
592 |
|
|
7'd71: begin
|
593 |
|
|
data1 <= #1 int_data71;
|
594 |
|
|
data2 <= #1 int_data72;
|
595 |
|
|
data3 <= #1 int_data73;
|
596 |
|
|
end
|
597 |
|
|
7'd72: begin
|
598 |
|
|
data1 <= #1 int_data72;
|
599 |
|
|
data2 <= #1 int_data73;
|
600 |
|
|
data3 <= #1 int_data74;
|
601 |
|
|
end
|
602 |
|
|
7'd73: begin
|
603 |
|
|
data1 <= #1 int_data73;
|
604 |
|
|
data2 <= #1 int_data74;
|
605 |
|
|
data3 <= #1 int_data75;
|
606 |
|
|
end
|
607 |
|
|
7'd74: begin
|
608 |
|
|
data1 <= #1 int_data74;
|
609 |
|
|
data2 <= #1 int_data75;
|
610 |
|
|
data3 <= #1 int_data76;
|
611 |
|
|
end
|
612 |
|
|
7'd75: begin
|
613 |
|
|
data1 <= #1 int_data75;
|
614 |
|
|
data2 <= #1 int_data76;
|
615 |
|
|
data3 <= #1 int_data77;
|
616 |
|
|
end
|
617 |
|
|
7'd76: begin
|
618 |
|
|
data1 <= #1 int_data76;
|
619 |
|
|
data2 <= #1 int_data77;
|
620 |
|
|
data3 <= #1 int_data78;
|
621 |
|
|
end
|
622 |
|
|
7'd77: begin
|
623 |
|
|
data1 <= #1 int_data77;
|
624 |
|
|
data2 <= #1 int_data78;
|
625 |
|
|
data3 <= #1 int_data79;
|
626 |
|
|
end
|
627 |
|
|
7'd78: begin
|
628 |
|
|
data1 <= #1 int_data78;
|
629 |
|
|
data2 <= #1 int_data79;
|
630 |
|
|
data3 <= #1 int_data80;
|
631 |
|
|
end
|
632 |
|
|
7'd79: begin
|
633 |
|
|
data1 <= #1 int_data79;
|
634 |
|
|
data2 <= #1 int_data80;
|
635 |
|
|
data3 <= #1 int_data81;
|
636 |
|
|
end
|
637 |
|
|
7'd80: begin
|
638 |
|
|
data1 <= #1 int_data80;
|
639 |
|
|
data2 <= #1 int_data81;
|
640 |
|
|
data3 <= #1 int_data82;
|
641 |
|
|
end
|
642 |
|
|
7'd81: begin
|
643 |
|
|
data1 <= #1 int_data81;
|
644 |
|
|
data2 <= #1 int_data82;
|
645 |
|
|
data3 <= #1 int_data83;
|
646 |
|
|
end
|
647 |
|
|
7'd82: begin
|
648 |
|
|
data1 <= #1 int_data82;
|
649 |
|
|
data2 <= #1 int_data83;
|
650 |
|
|
data3 <= #1 int_data84;
|
651 |
|
|
end
|
652 |
|
|
7'd83: begin
|
653 |
|
|
data1 <= #1 int_data83;
|
654 |
|
|
data2 <= #1 int_data84;
|
655 |
|
|
data3 <= #1 int_data85;
|
656 |
|
|
end
|
657 |
|
|
7'd84: begin
|
658 |
|
|
data1 <= #1 int_data84;
|
659 |
|
|
data2 <= #1 int_data85;
|
660 |
|
|
data3 <= #1 int_data86;
|
661 |
|
|
end
|
662 |
|
|
7'd85: begin
|
663 |
|
|
data1 <= #1 int_data85;
|
664 |
|
|
data2 <= #1 int_data86;
|
665 |
|
|
data3 <= #1 int_data87;
|
666 |
|
|
end
|
667 |
|
|
7'd86: begin
|
668 |
|
|
data1 <= #1 int_data86;
|
669 |
|
|
data2 <= #1 int_data87;
|
670 |
|
|
data3 <= #1 int_data88;
|
671 |
|
|
end
|
672 |
|
|
7'd87: begin
|
673 |
|
|
data1 <= #1 int_data87;
|
674 |
|
|
data2 <= #1 int_data88;
|
675 |
|
|
data3 <= #1 int_data89;
|
676 |
|
|
end
|
677 |
|
|
7'd88: begin
|
678 |
|
|
data1 <= #1 int_data88;
|
679 |
|
|
data2 <= #1 int_data89;
|
680 |
|
|
data3 <= #1 int_data90;
|
681 |
|
|
end
|
682 |
|
|
7'd89: begin
|
683 |
|
|
data1 <= #1 int_data89;
|
684 |
|
|
data2 <= #1 int_data90;
|
685 |
|
|
data3 <= #1 int_data91;
|
686 |
|
|
end
|
687 |
|
|
7'd90: begin
|
688 |
|
|
data1 <= #1 int_data90;
|
689 |
|
|
data2 <= #1 int_data91;
|
690 |
|
|
data3 <= #1 int_data92;
|
691 |
|
|
end
|
692 |
|
|
7'd91: begin
|
693 |
|
|
data1 <= #1 int_data91;
|
694 |
|
|
data2 <= #1 int_data92;
|
695 |
|
|
data3 <= #1 int_data93;
|
696 |
|
|
end
|
697 |
|
|
7'd92: begin
|
698 |
|
|
data1 <= #1 int_data92;
|
699 |
|
|
data2 <= #1 int_data93;
|
700 |
|
|
data3 <= #1 int_data94;
|
701 |
|
|
end
|
702 |
|
|
7'd93: begin
|
703 |
|
|
data1 <= #1 int_data93;
|
704 |
|
|
data2 <= #1 int_data94;
|
705 |
|
|
data3 <= #1 int_data95;
|
706 |
|
|
end
|
707 |
|
|
7'd94: begin
|
708 |
|
|
data1 <= #1 int_data94;
|
709 |
|
|
data2 <= #1 int_data95;
|
710 |
|
|
data3 <= #1 int_data96;
|
711 |
|
|
end
|
712 |
|
|
7'd95: begin
|
713 |
|
|
data1 <= #1 int_data95;
|
714 |
|
|
data2 <= #1 int_data96;
|
715 |
|
|
data3 <= #1 int_data97;
|
716 |
|
|
end
|
717 |
|
|
7'd96: begin
|
718 |
|
|
data1 <= #1 int_data96;
|
719 |
|
|
data2 <= #1 int_data97;
|
720 |
|
|
data3 <= #1 int_data98;
|
721 |
|
|
end
|
722 |
|
|
7'd97: begin
|
723 |
|
|
data1 <= #1 int_data97;
|
724 |
|
|
data2 <= #1 int_data98;
|
725 |
|
|
data3 <= #1 int_data99;
|
726 |
|
|
end
|
727 |
|
|
7'd98: begin
|
728 |
|
|
data1 <= #1 int_data98;
|
729 |
|
|
data2 <= #1 int_data99;
|
730 |
|
|
data3 <= #1 int_data100;
|
731 |
|
|
end
|
732 |
|
|
7'd99: begin
|
733 |
|
|
data1 <= #1 int_data99;
|
734 |
|
|
data2 <= #1 int_data100;
|
735 |
|
|
data3 <= #1 int_data101;
|
736 |
|
|
end
|
737 |
|
|
7'd100: begin
|
738 |
|
|
data1 <= #1 int_data100;
|
739 |
|
|
data2 <= #1 int_data101;
|
740 |
|
|
data3 <= #1 int_data102;
|
741 |
|
|
end
|
742 |
|
|
7'd101: begin
|
743 |
|
|
data1 <= #1 int_data101;
|
744 |
|
|
data2 <= #1 int_data102;
|
745 |
|
|
data3 <= #1 int_data103;
|
746 |
|
|
end
|
747 |
|
|
7'd102: begin
|
748 |
|
|
data1 <= #1 int_data102;
|
749 |
|
|
data2 <= #1 int_data103;
|
750 |
|
|
data3 <= #1 int_data104;
|
751 |
|
|
end
|
752 |
|
|
7'd103: begin
|
753 |
|
|
data1 <= #1 int_data103;
|
754 |
|
|
data2 <= #1 int_data104;
|
755 |
|
|
data3 <= #1 int_data105;
|
756 |
|
|
end
|
757 |
|
|
7'd104: begin
|
758 |
|
|
data1 <= #1 int_data104;
|
759 |
|
|
data2 <= #1 int_data105;
|
760 |
|
|
data3 <= #1 int_data106;
|
761 |
|
|
end
|
762 |
|
|
7'd105: begin
|
763 |
|
|
data1 <= #1 int_data105;
|
764 |
|
|
data2 <= #1 int_data106;
|
765 |
|
|
data3 <= #1 int_data107;
|
766 |
|
|
end
|
767 |
|
|
7'd106: begin
|
768 |
|
|
data1 <= #1 int_data106;
|
769 |
|
|
data2 <= #1 int_data107;
|
770 |
|
|
data3 <= #1 int_data108;
|
771 |
|
|
end
|
772 |
|
|
7'd107: begin
|
773 |
|
|
data1 <= #1 int_data107;
|
774 |
|
|
data2 <= #1 int_data108;
|
775 |
|
|
data3 <= #1 int_data109;
|
776 |
|
|
end
|
777 |
|
|
7'd108: begin
|
778 |
|
|
data1 <= #1 int_data108;
|
779 |
|
|
data2 <= #1 int_data109;
|
780 |
|
|
data3 <= #1 int_data110;
|
781 |
|
|
end
|
782 |
|
|
7'd109: begin
|
783 |
|
|
data1 <= #1 int_data109;
|
784 |
|
|
data2 <= #1 int_data110;
|
785 |
|
|
data3 <= #1 int_data111;
|
786 |
|
|
end
|
787 |
|
|
7'd110: begin
|
788 |
|
|
data1 <= #1 int_data110;
|
789 |
|
|
data2 <= #1 int_data111;
|
790 |
|
|
data3 <= #1 int_data112;
|
791 |
|
|
end
|
792 |
|
|
7'd111: begin
|
793 |
|
|
data1 <= #1 int_data111;
|
794 |
|
|
data2 <= #1 int_data112;
|
795 |
|
|
data3 <= #1 int_data113;
|
796 |
|
|
end
|
797 |
|
|
7'd112: begin
|
798 |
|
|
data1 <= #1 int_data112;
|
799 |
|
|
data2 <= #1 int_data113;
|
800 |
|
|
data3 <= #1 int_data114;
|
801 |
|
|
end
|
802 |
|
|
7'd113: begin
|
803 |
|
|
data1 <= #1 int_data113;
|
804 |
|
|
data2 <= #1 int_data114;
|
805 |
|
|
data3 <= #1 int_data115;
|
806 |
|
|
end
|
807 |
|
|
7'd114: begin
|
808 |
|
|
data1 <= #1 int_data114;
|
809 |
|
|
data2 <= #1 int_data115;
|
810 |
|
|
data3 <= #1 int_data116;
|
811 |
|
|
end
|
812 |
|
|
7'd115: begin
|
813 |
|
|
data1 <= #1 int_data115;
|
814 |
|
|
data2 <= #1 int_data116;
|
815 |
|
|
data3 <= #1 int_data117;
|
816 |
|
|
end
|
817 |
|
|
7'd116: begin
|
818 |
|
|
data1 <= #1 int_data116;
|
819 |
|
|
data2 <= #1 int_data117;
|
820 |
|
|
data3 <= #1 int_data118;
|
821 |
|
|
end
|
822 |
|
|
7'd117: begin
|
823 |
|
|
data1 <= #1 int_data117;
|
824 |
|
|
data2 <= #1 int_data118;
|
825 |
|
|
data3 <= #1 int_data119;
|
826 |
|
|
end
|
827 |
|
|
7'd118: begin
|
828 |
|
|
data1 <= #1 int_data118;
|
829 |
|
|
data2 <= #1 int_data119;
|
830 |
|
|
data3 <= #1 int_data120;
|
831 |
|
|
end
|
832 |
|
|
7'd119: begin
|
833 |
|
|
data1 <= #1 int_data119;
|
834 |
|
|
data2 <= #1 int_data120;
|
835 |
|
|
data3 <= #1 int_data121;
|
836 |
|
|
end
|
837 |
|
|
7'd120: begin
|
838 |
|
|
data1 <= #1 int_data120;
|
839 |
|
|
data2 <= #1 int_data121;
|
840 |
|
|
data3 <= #1 int_data122;
|
841 |
|
|
end
|
842 |
|
|
7'd121: begin
|
843 |
|
|
data1 <= #1 int_data121;
|
844 |
|
|
data2 <= #1 int_data122;
|
845 |
|
|
data3 <= #1 int_data123;
|
846 |
|
|
end
|
847 |
|
|
7'd122: begin
|
848 |
|
|
data1 <= #1 int_data122;
|
849 |
|
|
data2 <= #1 int_data123;
|
850 |
|
|
data3 <= #1 int_data124;
|
851 |
|
|
end
|
852 |
|
|
7'd123: begin
|
853 |
|
|
data1 <= #1 int_data123;
|
854 |
|
|
data2 <= #1 int_data124;
|
855 |
|
|
data3 <= #1 int_data125;
|
856 |
|
|
end
|
857 |
|
|
7'd124: begin
|
858 |
|
|
data1 <= #1 int_data124;
|
859 |
|
|
data2 <= #1 int_data125;
|
860 |
|
|
data3 <= #1 int_data126;
|
861 |
|
|
end
|
862 |
|
|
7'd125: begin
|
863 |
|
|
data1 <= #1 int_data125;
|
864 |
|
|
data2 <= #1 int_data126;
|
865 |
|
|
data3 <= #1 int_data127;
|
866 |
|
|
end
|
867 |
|
|
7'd126: begin
|
868 |
|
|
data1 <= #1 int_data126;
|
869 |
|
|
data2 <= #1 int_data127;
|
870 |
|
|
data3 <= #1 int_data0;
|
871 |
|
|
end
|
872 |
|
|
7'd127: begin
|
873 |
|
|
data1 <= #1 int_data127;
|
874 |
|
|
data2 <= #1 int_data0;
|
875 |
|
|
data3 <= #1 int_data1;
|
876 |
|
|
end
|
877 |
|
|
default: begin
|
878 |
|
|
data1 <= #1 8'h00;
|
879 |
|
|
data2 <= #1 8'h00;
|
880 |
|
|
data3 <= #1 8'h00;
|
881 |
|
|
end
|
882 |
|
|
endcase
|
883 |
|
|
end
|
884 |
|
|
|
885 |
|
|
always @(posedge clk or posedge rst)
|
886 |
|
|
if (rst)
|
887 |
|
|
ea_int <= #1 1'b1;
|
888 |
|
|
else ea_int <= #1 !ea;
|
889 |
|
|
|
890 |
|
|
`else
|
891 |
|
|
|
892 |
|
|
|
893 |
|
|
reg [7:0] buff [0:65535]; //64kb
|
894 |
|
|
|
895 |
|
|
assign ea = 1'b0;
|
896 |
|
|
|
897 |
|
|
initial
|
898 |
|
|
begin
|
899 |
|
|
$readmemh("../../../bench/in/oc8051_rom.in", buff);
|
900 |
|
|
end
|
901 |
|
|
|
902 |
|
|
always @(posedge clk or posedge rst)
|
903 |
|
|
if (rst)
|
904 |
|
|
ea_int <= #1 1'b1;
|
905 |
|
|
else ea_int <= #1 !ea;
|
906 |
|
|
|
907 |
|
|
always @(posedge clk)
|
908 |
|
|
begin
|
909 |
|
|
data_o <= #1 {buff[addr+3], buff[addr+2], buff[addr+1], buff[addr]};
|
910 |
|
|
end
|
911 |
|
|
|
912 |
|
|
|
913 |
|
|
`endif
|
914 |
|
|
|
915 |
|
|
|
916 |
|
|
endmodule
|
917 |
|
|
|
918 |
|
|
|
919 |
|
|
`ifdef OC8051_XILINX_ROM
|
920 |
|
|
|
921 |
|
|
//rom0
|
922 |
|
|
module rom0 (o,a);
|
923 |
|
|
input [4:0] a;
|
924 |
|
|
output [7:0] o;
|
925 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=004760c0" */;
|
926 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00475754" */;
|
927 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=032c2000" */;
|
928 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00300087" */;
|
929 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0228b085" */;
|
930 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01002085" */;
|
931 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=015378ed" */;
|
932 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024bd0c4" */;
|
933 |
|
|
endmodule
|
934 |
|
|
|
935 |
|
|
//rom1
|
936 |
|
|
module rom1 (o,a);
|
937 |
|
|
input [4:0] a;
|
938 |
|
|
output [7:0] o;
|
939 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022c68a6" */;
|
940 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0008e892" */;
|
941 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=032feb64" */;
|
942 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0010a020" */;
|
943 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=015b2028" */;
|
944 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00bca44c" */;
|
945 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02bc34c2" */;
|
946 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=016700c3" */;
|
947 |
|
|
endmodule
|
948 |
|
|
|
949 |
|
|
//rom2
|
950 |
|
|
module rom2 (o,a);
|
951 |
|
|
input [4:0] a;
|
952 |
|
|
output [7:0] o;
|
953 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00701310" */;
|
954 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a79000" */;
|
955 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a40cee" */;
|
956 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01371711" */;
|
957 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02340c6b" */;
|
958 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022c00c4" */;
|
959 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022c50c4" */;
|
960 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00000aaa" */;
|
961 |
|
|
endmodule
|
962 |
|
|
|
963 |
|
|
//rom3
|
964 |
|
|
module rom3 (o,a);
|
965 |
|
|
input [4:0] a;
|
966 |
|
|
output [7:0] o;
|
967 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00f46b58" */;
|
968 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027c0c49" */;
|
969 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0280bb9b" */;
|
970 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00088848" */;
|
971 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00807bbd" */;
|
972 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c30bf9" */;
|
973 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01b72fbd" */;
|
974 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00343c40" */;
|
975 |
|
|
endmodule
|
976 |
|
|
|
977 |
|
|
//rom4
|
978 |
|
|
module rom4 (o,a);
|
979 |
|
|
input [4:0] a;
|
980 |
|
|
output [7:0] o;
|
981 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0340f400" */;
|
982 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01036080" */;
|
983 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03677000" */;
|
984 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0110b0c4" */;
|
985 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00ecabfa" */;
|
986 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0248ecaa" */;
|
987 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0258ecea" */;
|
988 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02a4c790" */;
|
989 |
|
|
endmodule
|
990 |
|
|
|
991 |
|
|
//rom5
|
992 |
|
|
module rom5 (o,a);
|
993 |
|
|
input [4:0] a;
|
994 |
|
|
output [7:0] o;
|
995 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02638826" */;
|
996 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02cca816" */;
|
997 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c36298" */;
|
998 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02e40029" */;
|
999 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02e3d7a0" */;
|
1000 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03431409" */;
|
1001 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02d394c5" */;
|
1002 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0020c005" */;
|
1003 |
|
|
endmodule
|
1004 |
|
|
|
1005 |
|
|
//rom6
|
1006 |
|
|
module rom6 (o,a);
|
1007 |
|
|
input [4:0] a;
|
1008 |
|
|
output [7:0] o;
|
1009 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010070c0" */;
|
1010 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01885b92" */;
|
1011 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0318302c" */;
|
1012 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=004044c0" */;
|
1013 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0223a46d" */;
|
1014 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=012c20a9" */;
|
1015 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002cb029" */;
|
1016 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03030084" */;
|
1017 |
|
|
endmodule
|
1018 |
|
|
|
1019 |
|
|
//rom7
|
1020 |
|
|
module rom7 (o,a);
|
1021 |
|
|
input [4:0] a;
|
1022 |
|
|
output [7:0] o;
|
1023 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00289808" */;
|
1024 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000d8429" */;
|
1025 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02bf1b1c" */;
|
1026 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00820339" */;
|
1027 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=033b6429" */;
|
1028 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010b5069" */;
|
1029 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=034854e9" */;
|
1030 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00503421" */;
|
1031 |
|
|
endmodule
|
1032 |
|
|
|
1033 |
|
|
//rom8
|
1034 |
|
|
module rom8 (o,a);
|
1035 |
|
|
input [4:0] a;
|
1036 |
|
|
output [7:0] o;
|
1037 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=019c8ff3" */;
|
1038 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01438c62" */;
|
1039 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002c6c4b" */;
|
1040 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01904b92" */;
|
1041 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00bc93d5" */;
|
1042 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02acb31d" */;
|
1043 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02bc1335" */;
|
1044 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c09b32" */;
|
1045 |
|
|
endmodule
|
1046 |
|
|
|
1047 |
|
|
//rom9
|
1048 |
|
|
module rom9 (o,a);
|
1049 |
|
|
input [4:0] a;
|
1050 |
|
|
output [7:0] o;
|
1051 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01004a06" */;
|
1052 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0300642c" */;
|
1053 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02835972" */;
|
1054 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00230208" */;
|
1055 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000cdb73" */;
|
1056 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00904fb2" */;
|
1057 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01f0cb93" */;
|
1058 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01cc1441" */;
|
1059 |
|
|
endmodule
|
1060 |
|
|
|
1061 |
|
|
//rom10
|
1062 |
|
|
module rom10 (o,a);
|
1063 |
|
|
input [4:0] a;
|
1064 |
|
|
output [7:0] o;
|
1065 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026f5480" */;
|
1066 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00d8c4d4" */;
|
1067 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0338e680" */;
|
1068 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00036050" */;
|
1069 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03a358a2" */;
|
1070 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03234240" */;
|
1071 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03af4228" */;
|
1072 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c34942" */;
|
1073 |
|
|
endmodule
|
1074 |
|
|
|
1075 |
|
|
//rom11
|
1076 |
|
|
module rom11 (o,a);
|
1077 |
|
|
input [4:0] a;
|
1078 |
|
|
output [7:0] o;
|
1079 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b2e334" */;
|
1080 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ac492a" */;
|
1081 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b38899" */;
|
1082 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01202a00" */;
|
1083 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0232faf1" */;
|
1084 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b3b259" */;
|
1085 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00f3f551" */;
|
1086 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c16380" */;
|
1087 |
|
|
endmodule
|
1088 |
|
|
|
1089 |
|
|
//rom12
|
1090 |
|
|
module rom12 (o,a);
|
1091 |
|
|
input [4:0] a;
|
1092 |
|
|
output [7:0] o;
|
1093 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02637465" */;
|
1094 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00434de2" */;
|
1095 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ce621d" */;
|
1096 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026e0080" */;
|
1097 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01f3a04d" */;
|
1098 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02422290" */;
|
1099 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02433231" */;
|
1100 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=019181a8" */;
|
1101 |
|
|
endmodule
|
1102 |
|
|
|
1103 |
|
|
//rom13
|
1104 |
|
|
module rom13 (o,a);
|
1105 |
|
|
input [4:0] a;
|
1106 |
|
|
output [7:0] o;
|
1107 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=006ca309" */;
|
1108 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0232a510" */;
|
1109 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0151b922" */;
|
1110 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001eaa5a" */;
|
1111 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000d72e1" */;
|
1112 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=014db1c4" */;
|
1113 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=017d71c5" */;
|
1114 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00ec0129" */;
|
1115 |
|
|
endmodule
|
1116 |
|
|
|
1117 |
|
|
//rom14
|
1118 |
|
|
module rom14 (o,a);
|
1119 |
|
|
input [4:0] a;
|
1120 |
|
|
output [7:0] o;
|
1121 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00002cb2" */;
|
1122 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0033c0d5" */;
|
1123 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02085465" */;
|
1124 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02450843" */;
|
1125 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010c18cb" */;
|
1126 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008c184a" */;
|
1127 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ae0b1a" */;
|
1128 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00021853" */;
|
1129 |
|
|
endmodule
|
1130 |
|
|
|
1131 |
|
|
//rom15
|
1132 |
|
|
module rom15 (o,a);
|
1133 |
|
|
input [4:0] a;
|
1134 |
|
|
output [7:0] o;
|
1135 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02247616" */;
|
1136 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a64f08" */;
|
1137 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01f6f6d7" */;
|
1138 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02368d00" */;
|
1139 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026f3ef6" */;
|
1140 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022658fe" */;
|
1141 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022f78e6" */;
|
1142 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02406000" */;
|
1143 |
|
|
endmodule
|
1144 |
|
|
|
1145 |
|
|
//rom16
|
1146 |
|
|
module rom16 (o,a);
|
1147 |
|
|
input [4:0] a;
|
1148 |
|
|
output [7:0] o;
|
1149 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00d9a200" */;
|
1150 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00442ca0" */;
|
1151 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=038f21fa" */;
|
1152 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0010aaa0" */;
|
1153 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=029cf3cc" */;
|
1154 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03def39a" */;
|
1155 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02bef75b" */;
|
1156 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00129484" */;
|
1157 |
|
|
endmodule
|
1158 |
|
|
|
1159 |
|
|
//rom17
|
1160 |
|
|
module rom17 (o,a);
|
1161 |
|
|
input [4:0] a;
|
1162 |
|
|
output [7:0] o;
|
1163 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0223de06" */;
|
1164 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01237e04" */;
|
1165 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=021014e3" */;
|
1166 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01209000" */;
|
1167 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03da88a2" */;
|
1168 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=025882a2" */;
|
1169 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=015b8ab2" */;
|
1170 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008b0908" */;
|
1171 |
|
|
endmodule
|
1172 |
|
|
|
1173 |
|
|
//rom18
|
1174 |
|
|
module rom18 (o,a);
|
1175 |
|
|
input [4:0] a;
|
1176 |
|
|
output [7:0] o;
|
1177 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00822340" */;
|
1178 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00804d64" */;
|
1179 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00e7108b" */;
|
1180 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c00a20" */;
|
1181 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02b10be3" */;
|
1182 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=030c062a" */;
|
1183 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=038421f2" */;
|
1184 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003f3761" */;
|
1185 |
|
|
endmodule
|
1186 |
|
|
|
1187 |
|
|
//rom19
|
1188 |
|
|
module rom19 (o,a);
|
1189 |
|
|
input [4:0] a;
|
1190 |
|
|
output [7:0] o;
|
1191 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0256e421" */;
|
1192 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0387452b" */;
|
1193 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=015ac695" */;
|
1194 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0023004e" */;
|
1195 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00160871" */;
|
1196 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=005aa200" */;
|
1197 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02769a61" */;
|
1198 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024ca130" */;
|
1199 |
|
|
endmodule
|
1200 |
|
|
|
1201 |
|
|
//rom20
|
1202 |
|
|
module rom20 (o,a);
|
1203 |
|
|
input [4:0] a;
|
1204 |
|
|
output [7:0] o;
|
1205 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01507386" */;
|
1206 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001643a0" */;
|
1207 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01962932" */;
|
1208 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02d25004" */;
|
1209 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=013678b4" */;
|
1210 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03373167" */;
|
1211 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=033f25cd" */;
|
1212 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00000184" */;
|
1213 |
|
|
endmodule
|
1214 |
|
|
|
1215 |
|
|
//rom21
|
1216 |
|
|
module rom21 (o,a);
|
1217 |
|
|
input [4:0] a;
|
1218 |
|
|
output [7:0] o;
|
1219 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b0cc00" */;
|
1220 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00251ac1" */;
|
1221 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0269408f" */;
|
1222 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=009c8448" */;
|
1223 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03ca61bc" */;
|
1224 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008a5016" */;
|
1225 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008249b6" */;
|
1226 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c03800" */;
|
1227 |
|
|
endmodule
|
1228 |
|
|
|
1229 |
|
|
//rom22
|
1230 |
|
|
module rom22 (o,a);
|
1231 |
|
|
input [4:0] a;
|
1232 |
|
|
output [7:0] o;
|
1233 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00730101" */;
|
1234 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02101d00" */;
|
1235 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03212219" */;
|
1236 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00020834" */;
|
1237 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=021dd058" */;
|
1238 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=032da894" */;
|
1239 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=033d9cc2" */;
|
1240 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02b05c09" */;
|
1241 |
|
|
endmodule
|
1242 |
|
|
|
1243 |
|
|
//rom23
|
1244 |
|
|
module rom23 (o,a);
|
1245 |
|
|
input [4:0] a;
|
1246 |
|
|
output [7:0] o;
|
1247 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00348623" */;
|
1248 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a827a8" */;
|
1249 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b08e12" */;
|
1250 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002c40cc" */;
|
1251 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=006b0816" */;
|
1252 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02684216" */;
|
1253 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02721036" */;
|
1254 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00010a28" */;
|
1255 |
|
|
endmodule
|
1256 |
|
|
|
1257 |
|
|
//rom24
|
1258 |
|
|
module rom24 (o,a);
|
1259 |
|
|
input [4:0] a;
|
1260 |
|
|
output [7:0] o;
|
1261 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b31840" */;
|
1262 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027b4450" */;
|
1263 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d3b126" */;
|
1264 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01102810" */;
|
1265 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=009592ab" */;
|
1266 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0099940c" */;
|
1267 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b482cc" */;
|
1268 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00280463" */;
|
1269 |
|
|
endmodule
|
1270 |
|
|
|
1271 |
|
|
//rom25
|
1272 |
|
|
module rom25 (o,a);
|
1273 |
|
|
input [4:0] a;
|
1274 |
|
|
output [7:0] o;
|
1275 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0346a616" */;
|
1276 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000d0433" */;
|
1277 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02665666" */;
|
1278 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0100628a" */;
|
1279 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03b8385e" */;
|
1280 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03422906" */;
|
1281 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=035a2816" */;
|
1282 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ea3050" */;
|
1283 |
|
|
endmodule
|
1284 |
|
|
|
1285 |
|
|
//rom26
|
1286 |
|
|
module rom26 (o,a);
|
1287 |
|
|
input [4:0] a;
|
1288 |
|
|
output [7:0] o;
|
1289 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0134c390" */;
|
1290 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01522880" */;
|
1291 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0007195d" */;
|
1292 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0063da01" */;
|
1293 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=023ac37a" */;
|
1294 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0086433e" */;
|
1295 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ae47ae" */;
|
1296 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03044080" */;
|
1297 |
|
|
endmodule
|
1298 |
|
|
|
1299 |
|
|
//rom27
|
1300 |
|
|
module rom27 (o,a);
|
1301 |
|
|
input [4:0] a;
|
1302 |
|
|
output [7:0] o;
|
1303 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0017662b" */;
|
1304 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=029e6c24" */;
|
1305 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=014c0298" */;
|
1306 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02052805" */;
|
1307 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=014d99cb" */;
|
1308 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=032d9a5b" */;
|
1309 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0337da5b" */;
|
1310 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00534189" */;
|
1311 |
|
|
endmodule
|
1312 |
|
|
|
1313 |
|
|
//rom28
|
1314 |
|
|
module rom28 (o,a);
|
1315 |
|
|
input [4:0] a;
|
1316 |
|
|
output [7:0] o;
|
1317 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010c3346" */;
|
1318 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03248460" */;
|
1319 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00bba08b" */;
|
1320 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c00204" */;
|
1321 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00137387" */;
|
1322 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0109320f" */;
|
1323 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000d0017" */;
|
1324 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001e4200" */;
|
1325 |
|
|
endmodule
|
1326 |
|
|
|
1327 |
|
|
//rom29
|
1328 |
|
|
module rom29 (o,a);
|
1329 |
|
|
input [4:0] a;
|
1330 |
|
|
output [7:0] o;
|
1331 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b09c14" */;
|
1332 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00034969" */;
|
1333 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0324b616" */;
|
1334 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02930009" */;
|
1335 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00bcc090" */;
|
1336 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00e8b296" */;
|
1337 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01e8ba86" */;
|
1338 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=019c3800" */;
|
1339 |
|
|
endmodule
|
1340 |
|
|
|
1341 |
|
|
//rom30
|
1342 |
|
|
module rom30 (o,a);
|
1343 |
|
|
input [4:0] a;
|
1344 |
|
|
output [7:0] o;
|
1345 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=028846e6" */;
|
1346 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00cc4ac2" */;
|
1347 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00406536" */;
|
1348 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02054903" */;
|
1349 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02b1d817" */;
|
1350 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02135427" */;
|
1351 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=039b500f" */;
|
1352 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02a8d030" */;
|
1353 |
|
|
endmodule
|
1354 |
|
|
|
1355 |
|
|
//rom31
|
1356 |
|
|
module rom31 (o,a);
|
1357 |
|
|
input [4:0] a;
|
1358 |
|
|
output [7:0] o;
|
1359 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01404535" */;
|
1360 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=013262c8" */;
|
1361 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03da0477" */;
|
1362 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01100100" */;
|
1363 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02e8953b" */;
|
1364 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c4f567" */;
|
1365 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02e41d27" */;
|
1366 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00084100" */;
|
1367 |
|
|
endmodule
|
1368 |
|
|
|
1369 |
|
|
//rom32
|
1370 |
|
|
module rom32 (o,a);
|
1371 |
|
|
input [4:0] a;
|
1372 |
|
|
output [7:0] o;
|
1373 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=020350c1" */;
|
1374 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022d8082" */;
|
1375 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0196734c" */;
|
1376 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00001803" */;
|
1377 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=015b0579" */;
|
1378 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=009a7155" */;
|
1379 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02936155" */;
|
1380 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03416428" */;
|
1381 |
|
|
endmodule
|
1382 |
|
|
|
1383 |
|
|
//rom33
|
1384 |
|
|
module rom33 (o,a);
|
1385 |
|
|
input [4:0] a;
|
1386 |
|
|
output [7:0] o;
|
1387 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0244461a" */;
|
1388 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01404a0d" */;
|
1389 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0264b28e" */;
|
1390 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b18ca9" */;
|
1391 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03cf3458" */;
|
1392 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=038d3a9e" */;
|
1393 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02dd3808" */;
|
1394 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00034bc8" */;
|
1395 |
|
|
endmodule
|
1396 |
|
|
|
1397 |
|
|
//rom34
|
1398 |
|
|
module rom34 (o,a);
|
1399 |
|
|
input [4:0] a;
|
1400 |
|
|
output [7:0] o;
|
1401 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=023a8140" */;
|
1402 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c82561" */;
|
1403 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=021a4892" */;
|
1404 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02aaa041" */;
|
1405 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0337c899" */;
|
1406 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=033a801b" */;
|
1407 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0331831f" */;
|
1408 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0024c980" */;
|
1409 |
|
|
endmodule
|
1410 |
|
|
|
1411 |
|
|
//rom35
|
1412 |
|
|
module rom35 (o,a);
|
1413 |
|
|
input [4:0] a;
|
1414 |
|
|
output [7:0] o;
|
1415 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0311fa85" */;
|
1416 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01176acd" */;
|
1417 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02791cbd" */;
|
1418 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01d08cad" */;
|
1419 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02b85985" */;
|
1420 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02389991" */;
|
1421 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003c3893" */;
|
1422 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0080a980" */;
|
1423 |
|
|
endmodule
|
1424 |
|
|
|
1425 |
|
|
//rom36
|
1426 |
|
|
module rom36 (o,a);
|
1427 |
|
|
input [4:0] a;
|
1428 |
|
|
output [7:0] o;
|
1429 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02788531" */;
|
1430 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000c0311" */;
|
1431 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=030b214c" */;
|
1432 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=005a0463" */;
|
1433 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01701c2d" */;
|
1434 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03495dab" */;
|
1435 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c95dbb" */;
|
1436 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00611534" */;
|
1437 |
|
|
endmodule
|
1438 |
|
|
|
1439 |
|
|
//rom37
|
1440 |
|
|
module rom37 (o,a);
|
1441 |
|
|
input [4:0] a;
|
1442 |
|
|
output [7:0] o;
|
1443 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=033a1850" */;
|
1444 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0310588c" */;
|
1445 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022cd6b2" */;
|
1446 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02071048" */;
|
1447 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02ea847e" */;
|
1448 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022b847c" */;
|
1449 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=037ba568" */;
|
1450 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0153004b" */;
|
1451 |
|
|
endmodule
|
1452 |
|
|
|
1453 |
|
|
//rom38
|
1454 |
|
|
module rom38 (o,a);
|
1455 |
|
|
input [4:0] a;
|
1456 |
|
|
output [7:0] o;
|
1457 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=017767c3" */;
|
1458 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0121ac20" */;
|
1459 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02b276f9" */;
|
1460 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00242623" */;
|
1461 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=032e45c5" */;
|
1462 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00ae46dd" */;
|
1463 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=013f44d5" */;
|
1464 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=034d1602" */;
|
1465 |
|
|
endmodule
|
1466 |
|
|
|
1467 |
|
|
//rom39
|
1468 |
|
|
module rom39 (o,a);
|
1469 |
|
|
input [4:0] a;
|
1470 |
|
|
output [7:0] o;
|
1471 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00ba8a65" */;
|
1472 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=029a006c" */;
|
1473 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=039f2f41" */;
|
1474 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0032804c" */;
|
1475 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=025fe7c7" */;
|
1476 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02960743" */;
|
1477 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=035e1773" */;
|
1478 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c164a1" */;
|
1479 |
|
|
endmodule
|
1480 |
|
|
|
1481 |
|
|
//rom40
|
1482 |
|
|
module rom40 (o,a);
|
1483 |
|
|
input [4:0] a;
|
1484 |
|
|
output [7:0] o;
|
1485 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00247801" */;
|
1486 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002328d1" */;
|
1487 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=004818a7" */;
|
1488 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000368d1" */;
|
1489 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a0066d" */;
|
1490 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c8dc77" */;
|
1491 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03f0844f" */;
|
1492 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00280b40" */;
|
1493 |
|
|
endmodule
|
1494 |
|
|
|
1495 |
|
|
//rom41
|
1496 |
|
|
module rom41 (o,a);
|
1497 |
|
|
input [4:0] a;
|
1498 |
|
|
output [7:0] o;
|
1499 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01648f42" */;
|
1500 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022455e1" */;
|
1501 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d08a32" */;
|
1502 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0082042d" */;
|
1503 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00022b13" */;
|
1504 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00433807" */;
|
1505 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=006f2943" */;
|
1506 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00441151" */;
|
1507 |
|
|
endmodule
|
1508 |
|
|
|
1509 |
|
|
//rom42
|
1510 |
|
|
module rom42 (o,a);
|
1511 |
|
|
input [4:0] a;
|
1512 |
|
|
output [7:0] o;
|
1513 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03aa200c" */;
|
1514 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01af321c" */;
|
1515 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027bc4d7" */;
|
1516 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00226090" */;
|
1517 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02329d01" */;
|
1518 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026e8557" */;
|
1519 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03e2947b" */;
|
1520 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01941948" */;
|
1521 |
|
|
endmodule
|
1522 |
|
|
|
1523 |
|
|
//rom43
|
1524 |
|
|
module rom43 (o,a);
|
1525 |
|
|
input [4:0] a;
|
1526 |
|
|
output [7:0] o;
|
1527 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00114d80" */;
|
1528 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000a0901" */;
|
1529 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01c12f48" */;
|
1530 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00104a81" */;
|
1531 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03f16cd8" */;
|
1532 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008d61d0" */;
|
1533 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=009775f4" */;
|
1534 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=036e418a" */;
|
1535 |
|
|
endmodule
|
1536 |
|
|
|
1537 |
|
|
//rom44
|
1538 |
|
|
module rom44 (o,a);
|
1539 |
|
|
input [4:0] a;
|
1540 |
|
|
output [7:0] o;
|
1541 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0240f2c0" */;
|
1542 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02ca2854" */;
|
1543 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010264be" */;
|
1544 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0382a241" */;
|
1545 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=012f26a6" */;
|
1546 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=035276d3" */;
|
1547 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=023e6782" */;
|
1548 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00096660" */;
|
1549 |
|
|
endmodule
|
1550 |
|
|
|
1551 |
|
|
//rom45
|
1552 |
|
|
module rom45 (o,a);
|
1553 |
|
|
input [4:0] a;
|
1554 |
|
|
output [7:0] o;
|
1555 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000426c0" */;
|
1556 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02306582" */;
|
1557 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00160af4" */;
|
1558 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008109a2" */;
|
1559 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008932fc" */;
|
1560 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01e39298" */;
|
1561 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01cab6d9" */;
|
1562 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00026404" */;
|
1563 |
|
|
endmodule
|
1564 |
|
|
|
1565 |
|
|
//rom46
|
1566 |
|
|
module rom46 (o,a);
|
1567 |
|
|
input [4:0] a;
|
1568 |
|
|
output [7:0] o;
|
1569 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003e1a4a" */;
|
1570 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=016f90c9" */;
|
1571 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d0b756" */;
|
1572 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02001ac5" */;
|
1573 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00161fe1" */;
|
1574 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00984bf2" */;
|
1575 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b64bf1" */;
|
1576 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00260c84" */;
|
1577 |
|
|
endmodule
|
1578 |
|
|
|
1579 |
|
|
//rom47
|
1580 |
|
|
module rom47 (o,a);
|
1581 |
|
|
input [4:0] a;
|
1582 |
|
|
output [7:0] o;
|
1583 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03489a90" */;
|
1584 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000e4698" */;
|
1585 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0163d823" */;
|
1586 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02810420" */;
|
1587 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03f0a835" */;
|
1588 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03449e26" */;
|
1589 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0348bad6" */;
|
1590 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02be1591" */;
|
1591 |
|
|
endmodule
|
1592 |
|
|
|
1593 |
|
|
//rom48
|
1594 |
|
|
module rom48 (o,a);
|
1595 |
|
|
input [4:0] a;
|
1596 |
|
|
output [7:0] o;
|
1597 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00356b59" */;
|
1598 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00120945" */;
|
1599 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=021a6ab1" */;
|
1600 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00130841" */;
|
1601 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03ebdf75" */;
|
1602 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02075eb1" */;
|
1603 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02975fa3" */;
|
1604 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=016d9180" */;
|
1605 |
|
|
endmodule
|
1606 |
|
|
|
1607 |
|
|
//rom49
|
1608 |
|
|
module rom49 (o,a);
|
1609 |
|
|
input [4:0] a;
|
1610 |
|
|
output [7:0] o;
|
1611 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03098402" */;
|
1612 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00500e22" */;
|
1613 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c112b4" */;
|
1614 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00080a22" */;
|
1615 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026ff387" */;
|
1616 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=032ba3d5" */;
|
1617 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=016722df" */;
|
1618 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00085108" */;
|
1619 |
|
|
endmodule
|
1620 |
|
|
|
1621 |
|
|
//rom50
|
1622 |
|
|
module rom50 (o,a);
|
1623 |
|
|
input [4:0] a;
|
1624 |
|
|
output [7:0] o;
|
1625 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002379e0" */;
|
1626 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0145bca5" */;
|
1627 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b51303" */;
|
1628 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=023350c4" */;
|
1629 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02290863" */;
|
1630 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02894388" */;
|
1631 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02090b39" */;
|
1632 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000009a2" */;
|
1633 |
|
|
endmodule
|
1634 |
|
|
|
1635 |
|
|
//rom51
|
1636 |
|
|
module rom51 (o,a);
|
1637 |
|
|
input [4:0] a;
|
1638 |
|
|
output [7:0] o;
|
1639 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02340e14" */;
|
1640 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02896092" */;
|
1641 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=036c9e79" */;
|
1642 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d9801e" */;
|
1643 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=029e1bf5" */;
|
1644 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02341225" */;
|
1645 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02b61385" */;
|
1646 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00300042" */;
|
1647 |
|
|
endmodule
|
1648 |
|
|
|
1649 |
|
|
//rom52
|
1650 |
|
|
module rom52 (o,a);
|
1651 |
|
|
input [4:0] a;
|
1652 |
|
|
output [7:0] o;
|
1653 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=036a8fa8" */;
|
1654 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00222fe5" */;
|
1655 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=023a6abc" */;
|
1656 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0161cee1" */;
|
1657 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03758e9a" */;
|
1658 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03f98ece" */;
|
1659 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03f98a8e" */;
|
1660 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=014c8050" */;
|
1661 |
|
|
endmodule
|
1662 |
|
|
|
1663 |
|
|
//rom53
|
1664 |
|
|
module rom53 (o,a);
|
1665 |
|
|
input [4:0] a;
|
1666 |
|
|
output [7:0] o;
|
1667 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02265616" */;
|
1668 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02a40113" */;
|
1669 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c2b616" */;
|
1670 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02006011" */;
|
1671 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0358fc4e" */;
|
1672 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=034af655" */;
|
1673 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=036edef6" */;
|
1674 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003a6008" */;
|
1675 |
|
|
endmodule
|
1676 |
|
|
|
1677 |
|
|
//rom54
|
1678 |
|
|
module rom54 (o,a);
|
1679 |
|
|
input [4:0] a;
|
1680 |
|
|
output [7:0] o;
|
1681 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02d1a2ea" */;
|
1682 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03070084" */;
|
1683 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00aae1ee" */;
|
1684 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01120a80" */;
|
1685 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00bbfef2" */;
|
1686 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00927236" */;
|
1687 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0293f217" */;
|
1688 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02691400" */;
|
1689 |
|
|
endmodule
|
1690 |
|
|
|
1691 |
|
|
//rom55
|
1692 |
|
|
module rom55 (o,a);
|
1693 |
|
|
input [4:0] a;
|
1694 |
|
|
output [7:0] o;
|
1695 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=007a0ad1" */;
|
1696 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02528d1c" */;
|
1697 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=021c03e2" */;
|
1698 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01350714" */;
|
1699 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01b0e775" */;
|
1700 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=035903c6" */;
|
1701 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03120ac7" */;
|
1702 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a328a4" */;
|
1703 |
|
|
endmodule
|
1704 |
|
|
|
1705 |
|
|
//rom56
|
1706 |
|
|
module rom56 (o,a);
|
1707 |
|
|
input [4:0] a;
|
1708 |
|
|
output [7:0] o;
|
1709 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01952bc6" */;
|
1710 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001186e4" */;
|
1711 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0253bbff" */;
|
1712 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000500e8" */;
|
1713 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027f03f3" */;
|
1714 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01bd6bd6" */;
|
1715 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01bd09d2" */;
|
1716 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02461a03" */;
|
1717 |
|
|
endmodule
|
1718 |
|
|
|
1719 |
|
|
//rom57
|
1720 |
|
|
module rom57 (o,a);
|
1721 |
|
|
input [4:0] a;
|
1722 |
|
|
output [7:0] o;
|
1723 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00544809" */;
|
1724 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02e6e850" */;
|
1725 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02208e42" */;
|
1726 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=011a8c59" */;
|
1727 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022d897e" */;
|
1728 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02004afa" */;
|
1729 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03055abe" */;
|
1730 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0304c159" */;
|
1731 |
|
|
endmodule
|
1732 |
|
|
|
1733 |
|
|
//rom58
|
1734 |
|
|
module rom58 (o,a);
|
1735 |
|
|
input [4:0] a;
|
1736 |
|
|
output [7:0] o;
|
1737 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001056b8" */;
|
1738 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00155392" */;
|
1739 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a9a848" */;
|
1740 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00802486" */;
|
1741 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=013c1de9" */;
|
1742 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026a0469" */;
|
1743 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027a0459" */;
|
1744 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01140c10" */;
|
1745 |
|
|
endmodule
|
1746 |
|
|
|
1747 |
|
|
//rom59
|
1748 |
|
|
module rom59 (o,a);
|
1749 |
|
|
input [4:0] a;
|
1750 |
|
|
output [7:0] o;
|
1751 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01b82c17" */;
|
1752 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=025a1704" */;
|
1753 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=025200f3" */;
|
1754 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a92801" */;
|
1755 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008024f8" */;
|
1756 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01857032" */;
|
1757 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01b5a465" */;
|
1758 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0085348c" */;
|
1759 |
|
|
endmodule
|
1760 |
|
|
|
1761 |
|
|
//rom60
|
1762 |
|
|
module rom60 (o,a);
|
1763 |
|
|
input [4:0] a;
|
1764 |
|
|
output [7:0] o;
|
1765 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02ef2408" */;
|
1766 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008534a0" */;
|
1767 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026ac37f" */;
|
1768 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000021a0" */;
|
1769 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03fe3c05" */;
|
1770 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=036e6cb3" */;
|
1771 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03fb7833" */;
|
1772 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00855484" */;
|
1773 |
|
|
endmodule
|
1774 |
|
|
|
1775 |
|
|
//rom61
|
1776 |
|
|
module rom61 (o,a);
|
1777 |
|
|
input [4:0] a;
|
1778 |
|
|
output [7:0] o;
|
1779 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01300960" */;
|
1780 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00206069" */;
|
1781 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a5c204" */;
|
1782 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00202101" */;
|
1783 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02ff9bd0" */;
|
1784 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a80180" */;
|
1785 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a817f2" */;
|
1786 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024f8360" */;
|
1787 |
|
|
endmodule
|
1788 |
|
|
|
1789 |
|
|
//rom62
|
1790 |
|
|
module rom62 (o,a);
|
1791 |
|
|
input [4:0] a;
|
1792 |
|
|
output [7:0] o;
|
1793 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003cfcc1" */;
|
1794 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0053b483" */;
|
1795 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0282ddfa" */;
|
1796 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0363100b" */;
|
1797 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=006acbf4" */;
|
1798 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03824925" */;
|
1799 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d0eb46" */;
|
1800 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01102000" */;
|
1801 |
|
|
endmodule
|
1802 |
|
|
|
1803 |
|
|
//rom63
|
1804 |
|
|
module rom63 (o,a);
|
1805 |
|
|
input [4:0] a;
|
1806 |
|
|
output [7:0] o;
|
1807 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a02cdc" */;
|
1808 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02622c54" */;
|
1809 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01981be2" */;
|
1810 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00002848" */;
|
1811 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01905aea" */;
|
1812 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008d99c8" */;
|
1813 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a59dd9" */;
|
1814 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0138451a" */;
|
1815 |
|
|
endmodule
|
1816 |
|
|
|
1817 |
|
|
//rom64
|
1818 |
|
|
module rom64 (o,a);
|
1819 |
|
|
input [4:0] a;
|
1820 |
|
|
output [7:0] o;
|
1821 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b00782" */;
|
1822 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a5d486" */;
|
1823 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c7819a" */;
|
1824 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d25283" */;
|
1825 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0090079a" */;
|
1826 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008057ca" */;
|
1827 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a823eb" */;
|
1828 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00101412" */;
|
1829 |
|
|
endmodule
|
1830 |
|
|
|
1831 |
|
|
//rom65
|
1832 |
|
|
module rom65 (o,a);
|
1833 |
|
|
input [4:0] a;
|
1834 |
|
|
output [7:0] o;
|
1835 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0267b804" */;
|
1836 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a04ae8" */;
|
1837 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00259391" */;
|
1838 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02e202e8" */;
|
1839 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027f3683" */;
|
1840 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=037713a2" */;
|
1841 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03771f02" */;
|
1842 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02428881" */;
|
1843 |
|
|
endmodule
|
1844 |
|
|
|
1845 |
|
|
//rom66
|
1846 |
|
|
module rom66 (o,a);
|
1847 |
|
|
input [4:0] a;
|
1848 |
|
|
output [7:0] o;
|
1849 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c0ae04" */;
|
1850 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=014a2603" */;
|
1851 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03904ba0" */;
|
1852 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0030600f" */;
|
1853 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c51af8" */;
|
1854 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02083398" */;
|
1855 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026231de" */;
|
1856 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00cf3321" */;
|
1857 |
|
|
endmodule
|
1858 |
|
|
|
1859 |
|
|
//rom67
|
1860 |
|
|
module rom67 (o,a);
|
1861 |
|
|
input [4:0] a;
|
1862 |
|
|
output [7:0] o;
|
1863 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03834916" */;
|
1864 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008a0c38" */;
|
1865 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d62b96" */;
|
1866 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00834858" */;
|
1867 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03dbe987" */;
|
1868 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d34b07" */;
|
1869 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01fe4a87" */;
|
1870 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0008e120" */;
|
1871 |
|
|
endmodule
|
1872 |
|
|
|
1873 |
|
|
//rom68
|
1874 |
|
|
module rom68 (o,a);
|
1875 |
|
|
input [4:0] a;
|
1876 |
|
|
output [7:0] o;
|
1877 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00602648" */;
|
1878 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0025a248" */;
|
1879 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02025793" */;
|
1880 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00302200" */;
|
1881 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01004034" */;
|
1882 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02024132" */;
|
1883 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=029a497b" */;
|
1884 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0142104c" */;
|
1885 |
|
|
endmodule
|
1886 |
|
|
|
1887 |
|
|
//rom69
|
1888 |
|
|
module rom69 (o,a);
|
1889 |
|
|
input [4:0] a;
|
1890 |
|
|
output [7:0] o;
|
1891 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02520980" */;
|
1892 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d200b2" */;
|
1893 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=013d8465" */;
|
1894 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000dcd1a" */;
|
1895 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00f221db" */;
|
1896 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0150203b" */;
|
1897 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03123693" */;
|
1898 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022200d2" */;
|
1899 |
|
|
endmodule
|
1900 |
|
|
|
1901 |
|
|
//rom70
|
1902 |
|
|
module rom70 (o,a);
|
1903 |
|
|
input [4:0] a;
|
1904 |
|
|
output [7:0] o;
|
1905 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003f9e10" */;
|
1906 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01081095" */;
|
1907 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c23e62" */;
|
1908 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0035a201" */;
|
1909 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0257c4f2" */;
|
1910 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00878c22" */;
|
1911 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002f8dba" */;
|
1912 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024d8810" */;
|
1913 |
|
|
endmodule
|
1914 |
|
|
|
1915 |
|
|
//rom71
|
1916 |
|
|
module rom71 (o,a);
|
1917 |
|
|
input [4:0] a;
|
1918 |
|
|
output [7:0] o;
|
1919 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00924b99" */;
|
1920 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02d2d9aa" */;
|
1921 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=038a29b5" */;
|
1922 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01032aaf" */;
|
1923 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022f2fd8" */;
|
1924 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02a37af9" */;
|
1925 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02336ae0" */;
|
1926 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=029c5400" */;
|
1927 |
|
|
endmodule
|
1928 |
|
|
|
1929 |
|
|
//rom72
|
1930 |
|
|
module rom72 (o,a);
|
1931 |
|
|
input [4:0] a;
|
1932 |
|
|
output [7:0] o;
|
1933 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0138a6e6" */;
|
1934 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003ef660" */;
|
1935 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0030eb9a" */;
|
1936 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010a2604" */;
|
1937 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01cc3f2c" */;
|
1938 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c82396" */;
|
1939 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d033b5" */;
|
1940 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010838ac" */;
|
1941 |
|
|
endmodule
|
1942 |
|
|
|
1943 |
|
|
//rom73
|
1944 |
|
|
module rom73 (o,a);
|
1945 |
|
|
input [4:0] a;
|
1946 |
|
|
output [7:0] o;
|
1947 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00206b81" */;
|
1948 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02802fc1" */;
|
1949 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03a54aaf" */;
|
1950 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c00881" */;
|
1951 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010efabd" */;
|
1952 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=012f4ba7" */;
|
1953 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=013bf996" */;
|
1954 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0021ab00" */;
|
1955 |
|
|
endmodule
|
1956 |
|
|
|
1957 |
|
|
//rom74
|
1958 |
|
|
module rom74 (o,a);
|
1959 |
|
|
input [4:0] a;
|
1960 |
|
|
output [7:0] o;
|
1961 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02ef9140" */;
|
1962 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01e91044" */;
|
1963 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=023ca721" */;
|
1964 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01222414" */;
|
1965 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0221c92b" */;
|
1966 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02248b88" */;
|
1967 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02e58a8a" */;
|
1968 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c54101" */;
|
1969 |
|
|
endmodule
|
1970 |
|
|
|
1971 |
|
|
//rom75
|
1972 |
|
|
module rom75 (o,a);
|
1973 |
|
|
input [4:0] a;
|
1974 |
|
|
output [7:0] o;
|
1975 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=012c4e1b" */;
|
1976 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00245ad9" */;
|
1977 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01d8010d" */;
|
1978 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00014481" */;
|
1979 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d3a449" */;
|
1980 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01c9450d" */;
|
1981 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01eb2573" */;
|
1982 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=023c8411" */;
|
1983 |
|
|
endmodule
|
1984 |
|
|
|
1985 |
|
|
//rom76
|
1986 |
|
|
module rom76 (o,a);
|
1987 |
|
|
input [4:0] a;
|
1988 |
|
|
output [7:0] o;
|
1989 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03528166" */;
|
1990 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0183fb22" */;
|
1991 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0326347c" */;
|
1992 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03910020" */;
|
1993 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=013c80fd" */;
|
1994 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0308844d" */;
|
1995 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=031804cf" */;
|
1996 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=006c0412" */;
|
1997 |
|
|
endmodule
|
1998 |
|
|
|
1999 |
|
|
//rom77
|
2000 |
|
|
module rom77 (o,a);
|
2001 |
|
|
input [4:0] a;
|
2002 |
|
|
output [7:0] o;
|
2003 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01e20811" */;
|
2004 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03448509" */;
|
2005 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00827a32" */;
|
2006 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00206089" */;
|
2007 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00ed1463" */;
|
2008 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01da2001" */;
|
2009 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01bb3404" */;
|
2010 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00022462" */;
|
2011 |
|
|
endmodule
|
2012 |
|
|
|
2013 |
|
|
//rom78
|
2014 |
|
|
module rom78 (o,a);
|
2015 |
|
|
input [4:0] a;
|
2016 |
|
|
output [7:0] o;
|
2017 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=018a5cac" */;
|
2018 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=009b00ac" */;
|
2019 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d39f43" */;
|
2020 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0282c040" */;
|
2021 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c67a19" */;
|
2022 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a67415" */;
|
2023 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a67e9d" */;
|
2024 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01404ea8" */;
|
2025 |
|
|
endmodule
|
2026 |
|
|
|
2027 |
|
|
//rom79
|
2028 |
|
|
module rom79 (o,a);
|
2029 |
|
|
input [4:0] a;
|
2030 |
|
|
output [7:0] o;
|
2031 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0352a910" */;
|
2032 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=012e2551" */;
|
2033 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01b40984" */;
|
2034 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03018109" */;
|
2035 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03109dae" */;
|
2036 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0391cc2a" */;
|
2037 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0393cb22" */;
|
2038 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02039484" */;
|
2039 |
|
|
endmodule
|
2040 |
|
|
|
2041 |
|
|
//rom80
|
2042 |
|
|
module rom80 (o,a);
|
2043 |
|
|
input [4:0] a;
|
2044 |
|
|
output [7:0] o;
|
2045 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00ad0625" */;
|
2046 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00017235" */;
|
2047 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03a644c7" */;
|
2048 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00088067" */;
|
2049 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03b289a6" */;
|
2050 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02649407" */;
|
2051 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0265850c" */;
|
2052 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01970c00" */;
|
2053 |
|
|
endmodule
|
2054 |
|
|
|
2055 |
|
|
//rom81
|
2056 |
|
|
module rom81 (o,a);
|
2057 |
|
|
input [4:0] a;
|
2058 |
|
|
output [7:0] o;
|
2059 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03804148" */;
|
2060 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01c6b210" */;
|
2061 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02c16122" */;
|
2062 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008a8140" */;
|
2063 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02b944ef" */;
|
2064 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03804cee" */;
|
2065 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=019844e7" */;
|
2066 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002d0040" */;
|
2067 |
|
|
endmodule
|
2068 |
|
|
|
2069 |
|
|
//rom82
|
2070 |
|
|
module rom82 (o,a);
|
2071 |
|
|
input [4:0] a;
|
2072 |
|
|
output [7:0] o;
|
2073 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02682496" */;
|
2074 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003108a5" */;
|
2075 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024c930f" */;
|
2076 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00013474" */;
|
2077 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03ec617f" */;
|
2078 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=034a8163" */;
|
2079 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03eaa176" */;
|
2080 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0004e028" */;
|
2081 |
|
|
endmodule
|
2082 |
|
|
|
2083 |
|
|
//rom83
|
2084 |
|
|
module rom83 (o,a);
|
2085 |
|
|
input [4:0] a;
|
2086 |
|
|
output [7:0] o;
|
2087 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0200f17b" */;
|
2088 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0322c6e1" */;
|
2089 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0396295e" */;
|
2090 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02105a40" */;
|
2091 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024cb25e" */;
|
2092 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02057156" */;
|
2093 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0201b777" */;
|
2094 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00489721" */;
|
2095 |
|
|
endmodule
|
2096 |
|
|
|
2097 |
|
|
//rom84
|
2098 |
|
|
module rom84 (o,a);
|
2099 |
|
|
input [4:0] a;
|
2100 |
|
|
output [7:0] o;
|
2101 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03520fc0" */;
|
2102 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024140c4" */;
|
2103 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ab0723" */;
|
2104 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00789804" */;
|
2105 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00523b39" */;
|
2106 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01969f2a" */;
|
2107 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=035e9e4a" */;
|
2108 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0310ad51" */;
|
2109 |
|
|
endmodule
|
2110 |
|
|
|
2111 |
|
|
//rom85
|
2112 |
|
|
module rom85 (o,a);
|
2113 |
|
|
input [4:0] a;
|
2114 |
|
|
output [7:0] o;
|
2115 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01210038" */;
|
2116 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03cc3432" */;
|
2117 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=011561dd" */;
|
2118 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a058aa" */;
|
2119 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01b38e80" */;
|
2120 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03312d4c" */;
|
2121 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03b189c0" */;
|
2122 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002206c0" */;
|
2123 |
|
|
endmodule
|
2124 |
|
|
|
2125 |
|
|
//rom86
|
2126 |
|
|
module rom86 (o,a);
|
2127 |
|
|
input [4:0] a;
|
2128 |
|
|
output [7:0] o;
|
2129 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0206cdc6" */;
|
2130 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02022b14" */;
|
2131 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=036e8ece" */;
|
2132 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024a5804" */;
|
2133 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03375aed" */;
|
2134 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02a64ccf" */;
|
2135 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02a45ced" */;
|
2136 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01115400" */;
|
2137 |
|
|
endmodule
|
2138 |
|
|
|
2139 |
|
|
//rom87
|
2140 |
|
|
module rom87 (o,a);
|
2141 |
|
|
input [4:0] a;
|
2142 |
|
|
output [7:0] o;
|
2143 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0078c041" */;
|
2144 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0193db40" */;
|
2145 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0280387a" */;
|
2146 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01492050" */;
|
2147 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=005d08e1" */;
|
2148 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02490c4b" */;
|
2149 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0258cc4e" */;
|
2150 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=025cc080" */;
|
2151 |
|
|
endmodule
|
2152 |
|
|
|
2153 |
|
|
//rom88
|
2154 |
|
|
module rom88 (o,a);
|
2155 |
|
|
input [4:0] a;
|
2156 |
|
|
output [7:0] o;
|
2157 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=028434fc" */;
|
2158 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00210ce8" */;
|
2159 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02de9381" */;
|
2160 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00022ad4" */;
|
2161 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00e8b015" */;
|
2162 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03e83051" */;
|
2163 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03fc703f" */;
|
2164 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0200a078" */;
|
2165 |
|
|
endmodule
|
2166 |
|
|
|
2167 |
|
|
//rom89
|
2168 |
|
|
module rom89 (o,a);
|
2169 |
|
|
input [4:0] a;
|
2170 |
|
|
output [7:0] o;
|
2171 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027a6b03" */;
|
2172 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0304cd82" */;
|
2173 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03092175" */;
|
2174 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02138308" */;
|
2175 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=028a3b7f" */;
|
2176 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0222225b" */;
|
2177 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=022a2b51" */;
|
2178 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00e21a24" */;
|
2179 |
|
|
endmodule
|
2180 |
|
|
|
2181 |
|
|
//rom90
|
2182 |
|
|
module rom90 (o,a);
|
2183 |
|
|
input [4:0] a;
|
2184 |
|
|
output [7:0] o;
|
2185 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01497425" */;
|
2186 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c87850" */;
|
2187 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03062ea2" */;
|
2188 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000520d5" */;
|
2189 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=031b6a42" */;
|
2190 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0183f241" */;
|
2191 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01bba348" */;
|
2192 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02094046" */;
|
2193 |
|
|
endmodule
|
2194 |
|
|
|
2195 |
|
|
//rom91
|
2196 |
|
|
module rom91 (o,a);
|
2197 |
|
|
input [4:0] a;
|
2198 |
|
|
output [7:0] o;
|
2199 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0004018a" */;
|
2200 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0282b74a" */;
|
2201 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0241824a" */;
|
2202 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00262092" */;
|
2203 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03550af6" */;
|
2204 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=020504be" */;
|
2205 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02054ef7" */;
|
2206 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03440080" */;
|
2207 |
|
|
endmodule
|
2208 |
|
|
|
2209 |
|
|
//rom92
|
2210 |
|
|
module rom92 (o,a);
|
2211 |
|
|
input [4:0] a;
|
2212 |
|
|
output [7:0] o;
|
2213 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0110a4a4" */;
|
2214 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01316120" */;
|
2215 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0184debd" */;
|
2216 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00831021" */;
|
2217 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002a8c8e" */;
|
2218 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03268693" */;
|
2219 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=037ea6d6" */;
|
2220 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00542208" */;
|
2221 |
|
|
endmodule
|
2222 |
|
|
|
2223 |
|
|
//rom93
|
2224 |
|
|
module rom93 (o,a);
|
2225 |
|
|
input [4:0] a;
|
2226 |
|
|
output [7:0] o;
|
2227 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00827892" */;
|
2228 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=030b08ca" */;
|
2229 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=021a61bf" */;
|
2230 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008a10ca" */;
|
2231 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0096d6f5" */;
|
2232 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00e252be" */;
|
2233 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00e35abc" */;
|
2234 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b59c01" */;
|
2235 |
|
|
endmodule
|
2236 |
|
|
|
2237 |
|
|
//rom94
|
2238 |
|
|
module rom94 (o,a);
|
2239 |
|
|
input [4:0] a;
|
2240 |
|
|
output [7:0] o;
|
2241 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02952101" */;
|
2242 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c32aa5" */;
|
2243 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=034bad13" */;
|
2244 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=011536a5" */;
|
2245 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02bbf4ab" */;
|
2246 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0203b9fb" */;
|
2247 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02a339fb" */;
|
2248 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=009848a0" */;
|
2249 |
|
|
endmodule
|
2250 |
|
|
|
2251 |
|
|
//rom95
|
2252 |
|
|
module rom95 (o,a);
|
2253 |
|
|
input [4:0] a;
|
2254 |
|
|
output [7:0] o;
|
2255 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=014101ba" */;
|
2256 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000584ba" */;
|
2257 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=006c4b06" */;
|
2258 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01844052" */;
|
2259 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03d90b63" */;
|
2260 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01d4430f" */;
|
2261 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01dd23a3" */;
|
2262 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=030108a0" */;
|
2263 |
|
|
endmodule
|
2264 |
|
|
|
2265 |
|
|
//rom96
|
2266 |
|
|
module rom96 (o,a);
|
2267 |
|
|
input [4:0] a;
|
2268 |
|
|
output [7:0] o;
|
2269 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00172812" */;
|
2270 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02b64210" */;
|
2271 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0381a6ea" */;
|
2272 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02909c01" */;
|
2273 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ef336a" */;
|
2274 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03a900ab" */;
|
2275 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03ab129a" */;
|
2276 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=004711d4" */;
|
2277 |
|
|
endmodule
|
2278 |
|
|
|
2279 |
|
|
//rom97
|
2280 |
|
|
module rom97 (o,a);
|
2281 |
|
|
input [4:0] a;
|
2282 |
|
|
output [7:0] o;
|
2283 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0021a5a0" */;
|
2284 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=030b11f0" */;
|
2285 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00d7721b" */;
|
2286 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0149c460" */;
|
2287 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00d78d91" */;
|
2288 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00b3ae5b" */;
|
2289 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00f3ae8f" */;
|
2290 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0026a640" */;
|
2291 |
|
|
endmodule
|
2292 |
|
|
|
2293 |
|
|
//rom98
|
2294 |
|
|
module rom98 (o,a);
|
2295 |
|
|
input [4:0] a;
|
2296 |
|
|
output [7:0] o;
|
2297 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0000f08d" */;
|
2298 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0044298f" */;
|
2299 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=028cbc85" */;
|
2300 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03106a87" */;
|
2301 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010bf6e9" */;
|
2302 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=018cf6c1" */;
|
2303 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01bff6fd" */;
|
2304 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00004208" */;
|
2305 |
|
|
endmodule
|
2306 |
|
|
|
2307 |
|
|
//rom99
|
2308 |
|
|
module rom99 (o,a);
|
2309 |
|
|
input [4:0] a;
|
2310 |
|
|
output [7:0] o;
|
2311 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03188093" */;
|
2312 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01b88890" */;
|
2313 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01e0e946" */;
|
2314 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=034b83b9" */;
|
2315 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=038cf85c" */;
|
2316 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=038cca9b" */;
|
2317 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=039cca00" */;
|
2318 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02103684" */;
|
2319 |
|
|
endmodule
|
2320 |
|
|
|
2321 |
|
|
//rom100
|
2322 |
|
|
module rom100 (o,a);
|
2323 |
|
|
input [4:0] a;
|
2324 |
|
|
output [7:0] o;
|
2325 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=036c3160" */;
|
2326 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008cb024" */;
|
2327 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03334452" */;
|
2328 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c4a104" */;
|
2329 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03600350" */;
|
2330 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03631742" */;
|
2331 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=037b03eb" */;
|
2332 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=004b0134" */;
|
2333 |
|
|
endmodule
|
2334 |
|
|
|
2335 |
|
|
//rom101
|
2336 |
|
|
module rom101 (o,a);
|
2337 |
|
|
input [4:0] a;
|
2338 |
|
|
output [7:0] o;
|
2339 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03530ed9" */;
|
2340 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c01a41" */;
|
2341 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=038781f8" */;
|
2342 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=031004c8" */;
|
2343 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03f465fc" */;
|
2344 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0307a145" */;
|
2345 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0347a946" */;
|
2346 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00e3cc20" */;
|
2347 |
|
|
endmodule
|
2348 |
|
|
|
2349 |
|
|
//rom102
|
2350 |
|
|
module rom102 (o,a);
|
2351 |
|
|
input [4:0] a;
|
2352 |
|
|
output [7:0] o;
|
2353 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0307e084" */;
|
2354 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0103ea66" */;
|
2355 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02637deb" */;
|
2356 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00033044" */;
|
2357 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02638c59" */;
|
2358 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=034301d2" */;
|
2359 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01fb8594" */;
|
2360 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000084c9" */;
|
2361 |
|
|
endmodule
|
2362 |
|
|
|
2363 |
|
|
//rom103
|
2364 |
|
|
module rom103 (o,a);
|
2365 |
|
|
input [4:0] a;
|
2366 |
|
|
output [7:0] o;
|
2367 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0247f099" */;
|
2368 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03670098" */;
|
2369 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0118a7de" */;
|
2370 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00005089" */;
|
2371 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008435f6" */;
|
2372 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0200f1fc" */;
|
2373 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0303f8ec" */;
|
2374 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01079503" */;
|
2375 |
|
|
endmodule
|
2376 |
|
|
|
2377 |
|
|
//rom104
|
2378 |
|
|
module rom104 (o,a);
|
2379 |
|
|
input [4:0] a;
|
2380 |
|
|
output [7:0] o;
|
2381 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0240e222" */;
|
2382 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0240e224" */;
|
2383 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03bfa350" */;
|
2384 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0220be06" */;
|
2385 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=035ff459" */;
|
2386 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0280f799" */;
|
2387 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0200f7d9" */;
|
2388 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=011f0202" */;
|
2389 |
|
|
endmodule
|
2390 |
|
|
|
2391 |
|
|
//rom105
|
2392 |
|
|
module rom105 (o,a);
|
2393 |
|
|
input [4:0] a;
|
2394 |
|
|
output [7:0] o;
|
2395 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03bc7389" */;
|
2396 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=038f2831" */;
|
2397 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c42a45" */;
|
2398 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003b2199" */;
|
2399 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=007ca38b" */;
|
2400 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ac6e06" */;
|
2401 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=033cee02" */;
|
2402 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02e06800" */;
|
2403 |
|
|
endmodule
|
2404 |
|
|
|
2405 |
|
|
//rom106
|
2406 |
|
|
module rom106 (o,a);
|
2407 |
|
|
input [4:0] a;
|
2408 |
|
|
output [7:0] o;
|
2409 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0200e054" */;
|
2410 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00002472" */;
|
2411 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02208c8d" */;
|
2412 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00001000" */;
|
2413 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01a07add" */;
|
2414 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03bf400f" */;
|
2415 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03bf715d" */;
|
2416 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02403ad4" */;
|
2417 |
|
|
endmodule
|
2418 |
|
|
|
2419 |
|
|
//rom107
|
2420 |
|
|
module rom107 (o,a);
|
2421 |
|
|
input [4:0] a;
|
2422 |
|
|
output [7:0] o;
|
2423 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0220ef00" */;
|
2424 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=031f9bf8" */;
|
2425 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=039b2f52" */;
|
2426 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02840888" */;
|
2427 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02400f7a" */;
|
2428 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02404cba" */;
|
2429 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0240cc6e" */;
|
2430 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0000c8a9" */;
|
2431 |
|
|
endmodule
|
2432 |
|
|
|
2433 |
|
|
//rom108
|
2434 |
|
|
module rom108 (o,a);
|
2435 |
|
|
input [4:0] a;
|
2436 |
|
|
output [7:0] o;
|
2437 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01bb702d" */;
|
2438 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a02208" */;
|
2439 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=031ba124" */;
|
2440 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00402001" */;
|
2441 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=021feda0" */;
|
2442 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=011f69e1" */;
|
2443 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01bf79fc" */;
|
2444 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03a0940a" */;
|
2445 |
|
|
endmodule
|
2446 |
|
|
|
2447 |
|
|
//rom109
|
2448 |
|
|
module rom109 (o,a);
|
2449 |
|
|
input [4:0] a;
|
2450 |
|
|
output [7:0] o;
|
2451 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01404d92" */;
|
2452 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03448940" */;
|
2453 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03801686" */;
|
2454 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01008648" */;
|
2455 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=039b34bc" */;
|
2456 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03a0511a" */;
|
2457 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03c07101" */;
|
2458 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027b4024" */;
|
2459 |
|
|
endmodule
|
2460 |
|
|
|
2461 |
|
|
//rom110
|
2462 |
|
|
module rom110 (o,a);
|
2463 |
|
|
input [4:0] a;
|
2464 |
|
|
output [7:0] o;
|
2465 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001972a4" */;
|
2466 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00856c05" */;
|
2467 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=014c7196" */;
|
2468 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00890225" */;
|
2469 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=015153dd" */;
|
2470 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0265d386" */;
|
2471 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027ed2ce" */;
|
2472 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01200314" */;
|
2473 |
|
|
endmodule
|
2474 |
|
|
|
2475 |
|
|
//rom111
|
2476 |
|
|
module rom111 (o,a);
|
2477 |
|
|
input [4:0] a;
|
2478 |
|
|
output [7:0] o;
|
2479 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00446a88" */;
|
2480 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03df82b8" */;
|
2481 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0284ad91" */;
|
2482 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010004c0" */;
|
2483 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0084129d" */;
|
2484 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00846184" */;
|
2485 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00a46386" */;
|
2486 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00007201" */;
|
2487 |
|
|
endmodule
|
2488 |
|
|
|
2489 |
|
|
//rom112
|
2490 |
|
|
module rom112 (o,a);
|
2491 |
|
|
input [4:0] a;
|
2492 |
|
|
output [7:0] o;
|
2493 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0264ff4c" */;
|
2494 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00403bc9" */;
|
2495 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=029fa8a2" */;
|
2496 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003b24a3" */;
|
2497 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0244ec92" */;
|
2498 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0384fc90" */;
|
2499 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0384ee5c" */;
|
2500 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00000ec9" */;
|
2501 |
|
|
endmodule
|
2502 |
|
|
|
2503 |
|
|
//rom113
|
2504 |
|
|
module rom113 (o,a);
|
2505 |
|
|
input [4:0] a;
|
2506 |
|
|
output [7:0] o;
|
2507 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001b48b0" */;
|
2508 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01801180" */;
|
2509 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01c04c5e" */;
|
2510 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001b0030" */;
|
2511 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02dfecef" */;
|
2512 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003b6c35" */;
|
2513 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001b6ea5" */;
|
2514 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02ff80ea" */;
|
2515 |
|
|
endmodule
|
2516 |
|
|
|
2517 |
|
|
//rom114
|
2518 |
|
|
module rom114 (o,a);
|
2519 |
|
|
input [4:0] a;
|
2520 |
|
|
output [7:0] o;
|
2521 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0322a0a0" */;
|
2522 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=020426a7" */;
|
2523 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=031e9359" */;
|
2524 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02011406" */;
|
2525 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=019bc8f1" */;
|
2526 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=033b8010" */;
|
2527 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03bf00b0" */;
|
2528 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00204822" */;
|
2529 |
|
|
endmodule
|
2530 |
|
|
|
2531 |
|
|
//rom115
|
2532 |
|
|
module rom115 (o,a);
|
2533 |
|
|
input [4:0] a;
|
2534 |
|
|
output [7:0] o;
|
2535 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00025fa0" */;
|
2536 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0207e780" */;
|
2537 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00820095" */;
|
2538 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00035080" */;
|
2539 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=013a14cb" */;
|
2540 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=004258df" */;
|
2541 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=006216fb" */;
|
2542 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01181700" */;
|
2543 |
|
|
endmodule
|
2544 |
|
|
|
2545 |
|
|
//rom116
|
2546 |
|
|
module rom116 (o,a);
|
2547 |
|
|
input [4:0] a;
|
2548 |
|
|
output [7:0] o;
|
2549 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=003010f1" */;
|
2550 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0043687c" */;
|
2551 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02f4b489" */;
|
2552 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=030e802e" */;
|
2553 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=001815a7" */;
|
2554 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01981025" */;
|
2555 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=011913b5" */;
|
2556 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00010035" */;
|
2557 |
|
|
endmodule
|
2558 |
|
|
|
2559 |
|
|
//rom117
|
2560 |
|
|
module rom117 (o,a);
|
2561 |
|
|
input [4:0] a;
|
2562 |
|
|
output [7:0] o;
|
2563 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=027d93a1" */;
|
2564 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01b11250" */;
|
2565 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=005179ba" */;
|
2566 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=029ff901" */;
|
2567 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02f7b43e" */;
|
2568 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0257b0bb" */;
|
2569 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02f7b4ae" */;
|
2570 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0224a080" */;
|
2571 |
|
|
endmodule
|
2572 |
|
|
|
2573 |
|
|
//rom118
|
2574 |
|
|
module rom118 (o,a);
|
2575 |
|
|
input [4:0] a;
|
2576 |
|
|
output [7:0] o;
|
2577 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=021968c6" */;
|
2578 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000b16cc" */;
|
2579 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03062182" */;
|
2580 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0112d88c" */;
|
2581 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=024fedae" */;
|
2582 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02a6e98e" */;
|
2583 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=028fe99b" */;
|
2584 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0069482a" */;
|
2585 |
|
|
endmodule
|
2586 |
|
|
|
2587 |
|
|
//rom119
|
2588 |
|
|
module rom119 (o,a);
|
2589 |
|
|
input [4:0] a;
|
2590 |
|
|
output [7:0] o;
|
2591 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0154955f" */;
|
2592 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0092843c" */;
|
2593 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00c7db12" */;
|
2594 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=014c8020" */;
|
2595 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0352f809" */;
|
2596 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0123c992" */;
|
2597 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=017bdd8c" */;
|
2598 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0331344c" */;
|
2599 |
|
|
endmodule
|
2600 |
|
|
|
2601 |
|
|
//rom120
|
2602 |
|
|
module rom120 (o,a);
|
2603 |
|
|
input [4:0] a;
|
2604 |
|
|
output [7:0] o;
|
2605 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0284ba00" */;
|
2606 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02543ae0" */;
|
2607 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0380b757" */;
|
2608 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=02011a88" */;
|
2609 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0388df5d" */;
|
2610 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0380bb0a" */;
|
2611 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03b89a42" */;
|
2612 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00050f15" */;
|
2613 |
|
|
endmodule
|
2614 |
|
|
|
2615 |
|
|
//rom121
|
2616 |
|
|
module rom121 (o,a);
|
2617 |
|
|
input [4:0] a;
|
2618 |
|
|
output [7:0] o;
|
2619 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00198e11" */;
|
2620 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0031b011" */;
|
2621 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01779b35" */;
|
2622 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00518431" */;
|
2623 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=009dca89" */;
|
2624 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0013cb51" */;
|
2625 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01138bdb" */;
|
2626 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00860001" */;
|
2627 |
|
|
endmodule
|
2628 |
|
|
|
2629 |
|
|
//rom122
|
2630 |
|
|
module rom122 (o,a);
|
2631 |
|
|
input [4:0] a;
|
2632 |
|
|
output [7:0] o;
|
2633 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00ea1120" */;
|
2634 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=008e8142" */;
|
2635 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00247040" */;
|
2636 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0140a0a8" */;
|
2637 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01731e37" */;
|
2638 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01e55c35" */;
|
2639 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01ff5c35" */;
|
2640 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=004a4a20" */;
|
2641 |
|
|
endmodule
|
2642 |
|
|
|
2643 |
|
|
//rom123
|
2644 |
|
|
module rom123 (o,a);
|
2645 |
|
|
input [4:0] a;
|
2646 |
|
|
output [7:0] o;
|
2647 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=015124f9" */;
|
2648 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01c249bc" */;
|
2649 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010a8447" */;
|
2650 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01012601" */;
|
2651 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=012c3a46" */;
|
2652 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0116a054" */;
|
2653 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0144e0e8" */;
|
2654 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=026af0aa" */;
|
2655 |
|
|
endmodule
|
2656 |
|
|
|
2657 |
|
|
//rom124
|
2658 |
|
|
module rom124 (o,a);
|
2659 |
|
|
input [4:0] a;
|
2660 |
|
|
output [7:0] o;
|
2661 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=017ea002" */;
|
2662 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00568202" */;
|
2663 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03a21d9f" */;
|
2664 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=028e2002" */;
|
2665 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=036be4df" */;
|
2666 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=03027417" */;
|
2667 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0373a437" */;
|
2668 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=025888ca" */;
|
2669 |
|
|
endmodule
|
2670 |
|
|
|
2671 |
|
|
//rom125
|
2672 |
|
|
module rom125 (o,a);
|
2673 |
|
|
input [4:0] a;
|
2674 |
|
|
output [7:0] o;
|
2675 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0181416c" */;
|
2676 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0121b121" */;
|
2677 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0155e2fc" */;
|
2678 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01802241" */;
|
2679 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01de20a7" */;
|
2680 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01cce037" */;
|
2681 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01cee837" */;
|
2682 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0090c121" */;
|
2683 |
|
|
endmodule
|
2684 |
|
|
|
2685 |
|
|
//rom126
|
2686 |
|
|
module rom126 (o,a);
|
2687 |
|
|
input [4:0] a;
|
2688 |
|
|
output [7:0] o;
|
2689 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01c72e11" */;
|
2690 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00846c52" */;
|
2691 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=012d7806" */;
|
2692 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=002a1a23" */;
|
2693 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0190a2b8" */;
|
2694 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=000122ad" */;
|
2695 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0181afb8" */;
|
2696 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00910610" */;
|
2697 |
|
|
endmodule
|
2698 |
|
|
|
2699 |
|
|
//rom127
|
2700 |
|
|
module rom127 (o,a);
|
2701 |
|
|
input [4:0] a;
|
2702 |
|
|
output [7:0] o;
|
2703 |
|
|
ROM32X1 u0 (o[0],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=0025d188" */;
|
2704 |
|
|
ROM32X1 u1 (o[1],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=010529bc" */;
|
2705 |
|
|
ROM32X1 u2 (o[2],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01c9c652" */;
|
2706 |
|
|
ROM32X1 u3 (o[3],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00213064" */;
|
2707 |
|
|
ROM32X1 u4 (o[4],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01fb5633" */;
|
2708 |
|
|
ROM32X1 u5 (o[5],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=00bb5a32" */;
|
2709 |
|
|
ROM32X1 u6 (o[6],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01bb5223" */;
|
2710 |
|
|
ROM32X1 u7 (o[7],a[0],a[1],a[2],a[3],a[4]) /* synthesis xc_props="INIT=01641820" */;
|
2711 |
|
|
endmodule
|
2712 |
|
|
|
2713 |
|
|
|
2714 |
|
|
`endif
|