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//////////////////////////////////////////////////////////////////////

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////  Tubo 8051 cores common library Module                       ////

////                                                              ////

////  This file is part of the Turbo 8051 cores project           ////

////  http://www.opencores.org/cores/turbo8051/                   ////

////                                                              ////

////  Description                                                 ////

////  Turbo 8051 definitions.                                     ////

////                                                              ////

////  To Do:                                                      ////

////    nothing                                                   ////

////                                                              ////

////  Author(s):                                                  ////

////      - Dinesh Annayya, dinesha@opencores.org                 ////

////                                                              ////

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////                                                              ////

//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////

////                                                              ////

//// This source file may be used and distributed without         ////

//// restriction provided that this copyright statement is not    ////

//// removed from the file and that any derivative work contains  ////

//// the original copyright notice and the associated disclaimer. ////

////                                                              ////

//// This source file is free software; you can redistribute it   ////

//// and/or modify it under the terms of the GNU Lesser General   ////

//// Public License as published by the Free Software Foundation; ////

//// either version 2.1 of the License, or (at your option) any   ////

//// later version.                                               ////

////                                                              ////

//// This source is distributed in the hope that it will be       ////

//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////

//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////

//// PURPOSE.  See the GNU Lesser General Public License for more ////

//// details.                                                     ////

////                                                              ////

//// You should have received a copy of the GNU Lesser General    ////

//// Public License along with this source; if not, download it   ////

//// from http://www.opencores.org/lgpl.shtml                     ////

////                                                              ////

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module sfifo (QA,CLKA,CENA,AA,CLKB,CENB,AB,DB);

parameter  DW  = 10; // Data Width

parameter  AW  = 5;  // Address Width

parameter  FW  = 32; // FIFO DEPTH

output [DW-1:0] QA;

input           CLKA;

input           CENA;

input [AW-1:0]  AA;

input           CLKB;

input           CENB;

input [AW-1:0]  AB;

input [DW-1:0]  DB;

reg [DW-1:0] QA;

reg [DW-1:0] ram [FW-1:0];

always @ (posedge CLKB)

begin

  if (!CENB)

    ram[AB] <= DB;

end

always @ (posedge CLKA)

begin

  if (!CENA)

    QA <= ram[AA];

end

endmodule