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[/] [turbo8051/] [trunk/] [verif/] [run/] [filelist_rtl.f] - Blame information for rev 43

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Line No. Rev Author Line
1 15 dinesha
 
2
$TURBO8051_PROJ/rtl/core/core.v
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//----------------------------------
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// GMAC File List
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//---------------------------------
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$TURBO8051_PROJ/rtl/gmac/top/g_mac_top.v
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$TURBO8051_PROJ/rtl/gmac/mac/dble_reg.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_tx_fsm.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_deferral.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_tx_top.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_rx_fsm.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_cfg_mgmt.v
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$TURBO8051_PROJ/rtl/gmac/mac/s2f_sync.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_md_intf.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_deferral_rx.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_rx_top.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_mii_intf.v
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$TURBO8051_PROJ/rtl/gmac/mac/g_mac_core.v
19 35 dinesha
$TURBO8051_PROJ/rtl/gmac/ctrl/eth_parser.v
20 15 dinesha
$TURBO8051_PROJ/rtl/gmac/crc32/g_rx_crc32.v
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$TURBO8051_PROJ/rtl/gmac/crc32/g_tx_crc32.v
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$TURBO8051_PROJ/rtl/lib/async_fifo.v
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//-------------------------------------
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// SPI File List
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//-------------------------------------
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$TURBO8051_PROJ/rtl/spi/spi_core.v
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$TURBO8051_PROJ/rtl/spi/spi_ctl.v
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$TURBO8051_PROJ/rtl/spi/spi_if.v
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$TURBO8051_PROJ/rtl/spi/spi_cfg.v
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//-------------------------------------
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// UART File List
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//-------------------------------------
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$TURBO8051_PROJ/rtl/uart/uart_rxfsm.v
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$TURBO8051_PROJ/rtl/uart/uart_txfsm.v
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$TURBO8051_PROJ/rtl/uart/uart_core.v
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$TURBO8051_PROJ/rtl/uart/uart_cfg.v
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//-------------------------------------
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// clkgen File List
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//-------------------------------------
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$TURBO8051_PROJ/rtl/clkgen/clkgen.v
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$TURBO8051_PROJ/rtl/lib/clk_ctl.v
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$TURBO8051_PROJ/rtl/lib/wb_crossbar.v
47 30 dinesha
$TURBO8051_PROJ/rtl/lib/wb_rd_mem2mem.v
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$TURBO8051_PROJ/rtl/lib/wb_wr_mem2mem.v
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$TURBO8051_PROJ/rtl/lib/dpath_ctrl.v
50 15 dinesha
 
51
 
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//------------------------------------
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// 8051 core file list
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//-----------------------------------
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// Source Files
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+incdir+$TURBO8051_PROJ/rtl/8051/
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$TURBO8051_PROJ/rtl/8051/oc8051_top.v
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$TURBO8051_PROJ/rtl/8051/oc8051_alu_src_sel.v
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$TURBO8051_PROJ/rtl/8051/oc8051_alu.v
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$TURBO8051_PROJ/rtl/8051/oc8051_decoder.v
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$TURBO8051_PROJ/rtl/8051/oc8051_divide.v
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$TURBO8051_PROJ/rtl/8051/oc8051_multiply.v
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$TURBO8051_PROJ/rtl/8051/oc8051_memory_interface.v
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$TURBO8051_PROJ/rtl/8051/oc8051_ram_top.v
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$TURBO8051_PROJ/rtl/8051/oc8051_acc.v
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$TURBO8051_PROJ/rtl/8051/oc8051_comp.v
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$TURBO8051_PROJ/rtl/8051/oc8051_sp.v
68
$TURBO8051_PROJ/rtl/8051/oc8051_dptr.v
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$TURBO8051_PROJ/rtl/8051/oc8051_cy_select.v
70
$TURBO8051_PROJ/rtl/8051/oc8051_psw.v
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$TURBO8051_PROJ/rtl/8051/oc8051_indi_addr.v
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$TURBO8051_PROJ/rtl/8051/oc8051_ports.v
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$TURBO8051_PROJ/rtl/8051/oc8051_b_register.v
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$TURBO8051_PROJ/rtl/8051/oc8051_uart.v
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$TURBO8051_PROJ/rtl/8051/oc8051_int.v
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$TURBO8051_PROJ/rtl/8051/oc8051_tc.v
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$TURBO8051_PROJ/rtl/8051/oc8051_tc2.v
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//$TURBO8051_PROJ/rtl/8051/oc8051_icache.v
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//$TURBO8051_PROJ/rtl/8051/oc8051_wb_iinterface.v
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$TURBO8051_PROJ/rtl/8051/oc8051_sfr.v
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$TURBO8051_PROJ/rtl/8051/oc8051_ram_256x8_two_bist.v
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//$TURBO8051_PROJ/rtl/8051/oc8051_ram_64x32_dual_bist.v
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//-------------------------------------
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// Altera Library
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//------------------------------------
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$TURBO8051_PROJ/models/altera/altera_stargate_pll.v
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-v /tools/altera/altera9.0/quartus/eda/sim_lib/altera_mf.v
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90
 
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//-------------------------------------
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// Common Lib
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//-------------------------------------
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-v $TURBO8051_PROJ/rtl/lib/registers.v
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-v $TURBO8051_PROJ/rtl/lib/stat_counter.v
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-v $TURBO8051_PROJ/rtl/lib/toggle_sync.v
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-v $TURBO8051_PROJ/rtl/lib/double_sync_low.v
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-v $TURBO8051_PROJ/rtl/lib/async_fifo.v
100
 
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//+lint=all
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+v2k

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