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[/] [tv80/] [branches/] [hpa1/] [env/] [env_io.v] - Blame information for rev 2

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module env_io (/*AUTOARG*/
  // Outputs
  DI,
  // Inputs
  clk, iorq_n, rd_n, wr_n, addr, DO
  );
 
  input clk;
  input iorq_n;
  input rd_n;
  input wr_n;
  input [7:0] addr;
  input [7:0] DO;
  inout [7:0] DI;
 
  reg [7:0]    io_data;
 
  reg [7:0]    str_buf [0:255];
  reg          io_cs;
  integer      buf_ptr, i;
 
  reg [7:0]    timeout_ctl;
  reg [15:0]   cur_timeout;
  reg [15:0]   max_timeout;
 
  reg [7:0]    int_countdown;
 
  assign       DI = (!iorq_n & !rd_n & io_cs) ? io_data : {8{1'bz}};
 
  initial
    begin
      io_cs = 0;
      buf_ptr = 0;
      cur_timeout = 0;
      max_timeout = 10000;
      timeout_ctl = 1;
      int_countdown = 0;
    end
 
  always @(posedge clk)
    begin
      if (!iorq_n & !wr_n)
        case (addr)
          8'h80 :
            begin
              case (DO)
                1 : tb_top.test_pass;
 
                2 : tb_top.test_fail;
 
                3 : tb_top.dumpon;
 
                4 : tb_top.dumpoff;
 
                default :
                  begin
                    $display ("%t: ERROR   : Unknown I/O command %x", $time, DO);
                  end
              endcase // case(DO)
            end // case: :...
 
          8'h81 :
            begin
              str_buf[buf_ptr] = DO;
              buf_ptr = buf_ptr + 1;
 
              //$display ("%t: DEBUG   : Detected write of character %x", $time, DO);
              if (DO == 8'h0A)
                begin
                  $write ("%t: PROGRAM : ", $time);
 
                  for (i=0; i<buf_ptr; i=i+1)
                    $write ("%s", str_buf[i]);
 
                  buf_ptr = 0;
                end
            end // case: 8'h81
 
          8'h82 :
            begin
              timeout_ctl = DO;
            end
 
          8'h83 : max_timeout[7:0] = DO;
          8'h84 : max_timeout[15:8] = DO;
 
          8'h90 : int_countdown = DO;
        endcase // case(addr)
    end // always @ (posedge clk)
 
  always @(posedge clk)
    begin
      if (timeout_ctl[1])
        cur_timeout = 0;
      else if (timeout_ctl[0])
        cur_timeout = cur_timeout + 1;
 
      if (cur_timeout >= max_timeout)
        begin
          $display ("%t: ERROR   : Reached timeout %d cycles", $time, max_timeout);
          tb_top.test_fail;
        end
    end // always @ (posedge clk)
 
  always @(posedge clk)
    begin
      if (int_countdown == 1)
        begin
          tb_top.int_n  <= #1 1'b0;
          int_countdown = 0;
        end
      else if (int_countdown > 1)
        int_countdown = int_countdown - 1;
    end
 
endmodule // env_io

Line No.	Rev	Author	Line
1	2	ghutchis
2			`module env_io (/AUTOARG/`
3			`// Outputs`
4			`DI,`
5			`// Inputs`
6			`clk, iorq_n, rd_n, wr_n, addr, DO`
7			`);`
8
9			`input clk;`
10			`input iorq_n;`
11			`input rd_n;`
12			`input wr_n;`
13			`input [7:0] addr;`
14			`input [7:0] DO;`
15			`inout [7:0] DI;`
16
17			`reg [7:0] io_data;`
18
19			`reg [7:0] str_buf [0:255];`
20			`reg io_cs;`
21			`integer buf_ptr, i;`
22
23			`reg [7:0] timeout_ctl;`
24			`reg [15:0] cur_timeout;`
25			`reg [15:0] max_timeout;`
26
27			`reg [7:0] int_countdown;`
28
29			`assign DI = (!iorq_n & !rd_n & io_cs) ? io_data : {8{1'bz}};`
30
31			`initial`
32			`begin`
33			`io_cs = 0;`
34			`buf_ptr = 0;`
35			`cur_timeout = 0;`
36			`max_timeout = 10000;`
37			`timeout_ctl = 1;`
38			`int_countdown = 0;`
39			`end`
40
41			`always @(posedge clk)`
42			`begin`
43			`if (!iorq_n & !wr_n)`
44			`case (addr)`
45			`8'h80 :`
46			`begin`
47			`case (DO)`
48			`1 : tb_top.test_pass;`
49
50			`2 : tb_top.test_fail;`
51
52			`3 : tb_top.dumpon;`
53
54			`4 : tb_top.dumpoff;`
55
56			`default :`
57			`begin`
58			`$display ("%t: ERROR : Unknown I/O command %x", $time, DO);`
59			`end`
60			`endcase // case(DO)`
61			`end // case: :...`
62
63			`8'h81 :`
64			`begin`
65			`str_buf[buf_ptr] = DO;`
66			`buf_ptr = buf_ptr + 1;`
67
68			`//$display ("%t: DEBUG : Detected write of character %x", $time, DO);`
69			`if (DO == 8'h0A)`
70			`begin`
71			`$write ("%t: PROGRAM : ", $time);`
72
73			`for (i=0; i<buf_ptr; i=i+1)`
74			`$write ("%s", str_buf[i]);`
75
76			`buf_ptr = 0;`
77			`end`
78			`end // case: 8'h81`
79
80			`8'h82 :`
81			`begin`
82			`timeout_ctl = DO;`
83			`end`
84
85			`8'h83 : max_timeout[7:0] = DO;`
86			`8'h84 : max_timeout[15:8] = DO;`
87
88			`8'h90 : int_countdown = DO;`
89			`endcase // case(addr)`
90			`end // always @ (posedge clk)`
91
92			`always @(posedge clk)`
93			`begin`
94			`if (timeout_ctl[1])`
95			`cur_timeout = 0;`
96			`else if (timeout_ctl[0])`
97			`cur_timeout = cur_timeout + 1;`
98
99			`if (cur_timeout >= max_timeout)`
100			`begin`
101			`$display ("%t: ERROR : Reached timeout %d cycles", $time, max_timeout);`
102			`tb_top.test_fail;`
103			`end`
104			`end // always @ (posedge clk)`
105
106			`always @(posedge clk)`
107			`begin`
108			`if (int_countdown == 1)`
109			`begin`
110			`tb_top.int_n <= #1 1'b0;`
111			`int_countdown = 0;`
112			`end`
113			`else if (int_countdown > 1)`
114			`int_countdown = int_countdown - 1;`
115			`end`
116
117			`endmodule // env_io`

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[/] [tv80/] [branches/] [hpa1/] [env/] [env_io.v] - Blame information for rev 2