OpenCores
URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [branches/] [restruc2/] [tests/] [basic_int.asm] - Blame information for rev 109

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 ghutchis
        .module basic_int
2
 
3
test_ctl_port     = 0x80
4
print_port        = 0x81
5
int_timeout_port  = 0x90
6
 
7
        .area BOOT_VEC
8
 
9
        jp      main
10
 
11
        .area INT_VEC
12
 
13
int_entry:
14
        exx
15
 
16
        ld      b, a
17
        ld      hl, #int_seen_str
18
 
19
print_str:
20
        ld      a, (hl)
21
        cp      #0
22
        jp      z, print_str_exit
23
        out     (print_port), a
24
        inc     hl
25
        jp      print_str
26
 
27
print_str_exit:
28
        ld      a, b
29
        exx
30
 
31
        ld      h, #1
32
        reti
33
 
34
        .area _CODE
35
 
36
main:
37
        ld      h,  #0
38
        ld      bc, #100
39
        ld      a, #50
40
        out     (int_timeout_port), a
41
 
42
test_timeout_loop:
43
        ld      a, #1
44
        cp      h
45
        jp      z, test_pass
46
 
47
        dec     bc
48
        jp      nz, test_timeout_loop
49
 
50
test_fail:
51
        ld      a, #2
52
        out     (test_ctl_port), a
53
        .db     0x76            ; hlt
54
 
55
test_pass:
56
        ld      a, #1
57
        out (test_ctl_port), a
58
        .db     0x76            ; hlt
59
 
60
        .area _DATA
61
 
62
int_seen_str:
63
        .ascii "Interrupt asserted"
64
        .db    0x0a
65
        .db    0x00

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.