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[/] [tv80/] [branches/] [restruc2/] [tests/] [blk_mem_inst.c] - Blame information for rev 112

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/*
 * This test covers the four block move instructions LDI,
 * LDIR, LDD, and LDDR.
 *
 * The test creates a buffer full of random data, copies
 * the buffer using one of the move instructions, then
 * checks the target buffer to make sure it contains the
 * same data as the source buffer.
 */
 
#include "tv80_env.h"
 
#define BUF_SIZE 128
 
char bufa[BUF_SIZE];
char bufb[BUF_SIZE];
 
void rand_buf (char *buf) {
  int i;
 
  for (i=0; i<BUF_SIZE; i++) {
    buf[i] = randval;
  }
}
 
char test_ldi () {
  int  i;
  char rv;
 
  rand_buf (bufa);
 
  _asm
    ld  de, #_bufb
    ld  hl, #_bufa
    ld  bc, #128
 
test_ldi_loop:
    ldi
    ld  a, #0x00
    cp  c
    jp  nz, test_ldi_loop
    cp  b
    jp  nz, test_ldi_loop
 
  _endasm;
 
  rv = 1;
  for (i=0; i<BUF_SIZE; i++) {
    if (bufa[i] != bufb[i]) rv = 0;
  }
 
  return rv;
}
 
char test_ldir () {
  int  i;
  char rv;
 
  rand_buf (bufa);
 
  _asm
    ld  de, #_bufb
    ld  hl, #_bufa
    ld  bc, #128
 
    ldir
 
  _endasm;
 
  rv = 1;
  for (i=0; i<BUF_SIZE; i++) {
    if (bufa[i] != bufb[i]) rv = 0;
  }
 
  return rv;
}
 
char test_ldd () {
  int  i;
  char rv;
 
  rand_buf (bufa);
 
  _asm
    ld  hl, #_bufb
    ld  bc, #127
    add hl, bc
    ex  de, hl
    ld  hl, #_bufa
    add hl, bc
    inc bc
 
test_ldd_loop:
    ldd
    ld  a, #0x00
    cp  c
    jp  nz, test_ldd_loop
    cp  b
    jp  nz, test_ldd_loop
 
  _endasm;
 
  rv = 1;
  for (i=0; i<BUF_SIZE; i++) {
    if (bufa[i] != bufb[i]) rv = 0;
  }
 
  return rv;
}
 
char test_lddr () {
  int  i;
  char rv;
 
  rand_buf (bufa);
 
  _asm
    ld  hl, #_bufb
    ld  bc, #127
    add hl, bc
    ex  de, hl
    ld  hl, #_bufa
    add hl, bc
    inc bc
 
    lddr
 
  _endasm;
 
  rv = 1;
  for (i=0; i<BUF_SIZE; i++) {
    if (bufa[i] != bufb[i]) rv = 0;
  }
 
  return rv;
}
 
int main ()
{
  max_timeout_high = 0xff;
 
  // initialize source buffer
  print ("Checking LDI\n");
  if (!test_ldi())
    sim_ctl (SC_TEST_FAILED);
 
  print ("Checking LDIR\n");
  if (!test_ldir())
    sim_ctl (SC_TEST_FAILED);
 
  print ("Checking LDD\n");
  if (!test_ldd())
    sim_ctl (SC_TEST_FAILED);
 
  print ("Checking LDDR\n");
  if (!test_lddr())
    sim_ctl (SC_TEST_FAILED);
  else
    sim_ctl (SC_TEST_PASSED);
 
  return 0;
}

Line No.	Rev	Author	Line
1	40	ghutchis	`/*`
2			`* This test covers the four block move instructions LDI,`
3			`* LDIR, LDD, and LDDR.`
4			`*`
5			`* The test creates a buffer full of random data, copies`
6			`* the buffer using one of the move instructions, then`
7			`* checks the target buffer to make sure it contains the`
8			`* same data as the source buffer.`
9			`*/`
10
11			`#include "tv80_env.h"`
12
13			`#define BUF_SIZE 128`
14
15			`char bufa[BUF_SIZE];`
16			`char bufb[BUF_SIZE];`
17
18			`void rand_buf (char *buf) {`
19			`int i;`
20
21			`for (i=0; i<BUF_SIZE; i++) {`
22			`buf[i] = randval;`
23			`}`
24			`}`
25
26			`char test_ldi () {`
27			`int i;`
28			`char rv;`
29
30			`rand_buf (bufa);`
31
32			`_asm`
33			`ld de, #_bufb`
34			`ld hl, #_bufa`
35			`ld bc, #128`
36
37			`test_ldi_loop:`
38			`ldi`
39			`ld a, #0x00`
40			`cp c`
41	43	ghutchis	`jp nz, test_ldi_loop`
42	40	ghutchis	`cp b`
43			`jp nz, test_ldi_loop`
44
45			`_endasm;`
46
47			`rv = 1;`
48			`for (i=0; i<BUF_SIZE; i++) {`
49			`if (bufa[i] != bufb[i]) rv = 0;`
50			`}`
51
52			`return rv;`
53			`}`
54
55			`char test_ldir () {`
56			`int i;`
57			`char rv;`
58
59			`rand_buf (bufa);`
60
61			`_asm`
62			`ld de, #_bufb`
63			`ld hl, #_bufa`
64			`ld bc, #128`
65
66			`ldir`
67
68			`_endasm;`
69
70			`rv = 1;`
71			`for (i=0; i<BUF_SIZE; i++) {`
72			`if (bufa[i] != bufb[i]) rv = 0;`
73			`}`
74
75			`return rv;`
76			`}`
77
78			`char test_ldd () {`
79			`int i;`
80			`char rv;`
81
82			`rand_buf (bufa);`
83
84			`_asm`
85			`ld hl, #_bufb`
86			`ld bc, #127`
87			`add hl, bc`
88			`ex de, hl`
89			`ld hl, #_bufa`
90			`add hl, bc`
91			`inc bc`
92
93			`test_ldd_loop:`
94			`ldd`
95			`ld a, #0x00`
96			`cp c`
97	43	ghutchis	`jp nz, test_ldd_loop`
98	40	ghutchis	`cp b`
99			`jp nz, test_ldd_loop`
100
101			`_endasm;`
102
103			`rv = 1;`
104			`for (i=0; i<BUF_SIZE; i++) {`
105			`if (bufa[i] != bufb[i]) rv = 0;`
106			`}`
107
108			`return rv;`
109			`}`
110
111			`char test_lddr () {`
112			`int i;`
113			`char rv;`
114
115			`rand_buf (bufa);`
116
117			`_asm`
118			`ld hl, #_bufb`
119			`ld bc, #127`
120			`add hl, bc`
121			`ex de, hl`
122			`ld hl, #_bufa`
123			`add hl, bc`
124	43	ghutchis	`inc bc`
125	40	ghutchis
126			`lddr`
127
128			`_endasm;`
129
130			`rv = 1;`
131			`for (i=0; i<BUF_SIZE; i++) {`
132			`if (bufa[i] != bufb[i]) rv = 0;`
133			`}`
134
135			`return rv;`
136			`}`
137
138			`int main ()`
139			`{`
140			`max_timeout_high = 0xff;`
141
142			`// initialize source buffer`
143			`print ("Checking LDI\n");`
144			`if (!test_ldi())`
145			`sim_ctl (SC_TEST_FAILED);`
146
147			`print ("Checking LDIR\n");`
148			`if (!test_ldir())`
149			`sim_ctl (SC_TEST_FAILED);`
150
151			`print ("Checking LDD\n");`
152			`if (!test_ldd())`
153			`sim_ctl (SC_TEST_FAILED);`
154
155			`print ("Checking LDDR\n");`
156			`if (!test_lddr())`
157			`sim_ctl (SC_TEST_FAILED);`
158			`else`
159			`sim_ctl (SC_TEST_PASSED);`
160
161			`return 0;`
162			`}`

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[/] [tv80/] [branches/] [restruc2/] [tests/] [blk_mem_inst.c] - Blame information for rev 112