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[/] [tv80/] [trunk/] [sc_env/] [sc_env_top.cpp] - Blame information for rev 102

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Line No. Rev Author Line
1 91 ghutchis
#include "systemc.h"
2 94 ghutchis
#include "systemperl.h"
3 91 ghutchis
#include "env_memory.h"
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#include "tv_responder.h"
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#include "Vtv80s.h"
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#include "VT16450.h"
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#include "SpTraceVcd.h"
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#include <unistd.h>
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#include "z80_decoder.h"
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#include "di_mux.h"
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12 95 ghutchis
extern char *optarg;
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extern int optind, opterr, optopt;
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15 98 ghutchis
#define FILENAME_SZ 80
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17 91 ghutchis
int sc_main(int argc, char *argv[])
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{
19 95 ghutchis
        bool dumping = false;
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        bool memfile = false;
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        int index;
22 98 ghutchis
        char dumpfile_name[FILENAME_SZ];
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        char mem_src_name[FILENAME_SZ];
24 95 ghutchis
        SpTraceFile *tfp;
25 96 ghutchis
    z80_decoder dec0 ("dec0");
26 95 ghutchis
 
27
        sc_clock clk("clk125", 8, SC_NS, 0.5);
28 91 ghutchis
 
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        sc_signal<bool> reset_n;
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        sc_signal<bool> wait_n;
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        sc_signal<bool> int_n;
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        sc_signal<bool> nmi_n;
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        sc_signal<bool> busrq_n;
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        sc_signal<bool> m1_n;
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        sc_signal<bool> mreq_n;
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        sc_signal<bool> iorq_n;
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        sc_signal<bool> rd_n;
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        sc_signal<bool> wr_n;
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        sc_signal<bool> rfsh_n;
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        sc_signal<bool> halt_n;
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        sc_signal<bool> busak_n;
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        sc_signal<uint32_t>     di;
43 92 ghutchis
        sc_signal<uint32_t> di_mem;
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        sc_signal<uint32_t> di_resp;
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        sc_signal<uint32_t> di_uart;
46 91 ghutchis
        sc_signal<uint32_t>     dout;
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        sc_signal<uint32_t>     addr;
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49 97 ghutchis
    sc_signal<bool> uart_cs_n, serial, cts_n, dsr_n, ri_n, dcd_n;
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    sc_signal<bool> baudout, uart_int;
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        while ( (index = getopt(argc, argv, "d:i:k")) != -1) {
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                printf ("DEBUG: getopt optind=%d index=%d char=%c\n", optind, index, (char) index);
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                if  (index == 'd') {
55 98 ghutchis
                        strncpy (dumpfile_name, optarg, FILENAME_SZ);
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                        dumping = true;
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                        printf ("VCD dump enabled to %s\n", dumpfile_name);
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                } else if (index == 'i') {
59 98 ghutchis
                        strncpy (mem_src_name, optarg, FILENAME_SZ);
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                        memfile = true;
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                } else if (index == 'k') {
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                        printf ("Z80 Instruction decode enabled\n");
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                        dec0.en_decode = true;
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                }
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        }
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67 91 ghutchis
        Vtv80s tv80s ("tv80s");
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        tv80s.A (addr);
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        tv80s.reset_n (reset_n);
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        tv80s.clk (clk);
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        tv80s.wait_n (wait_n);
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        tv80s.int_n (int_n);
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        tv80s.nmi_n (nmi_n);
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        tv80s.busrq_n (busrq_n);
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        tv80s.m1_n (m1_n);
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        tv80s.mreq_n (mreq_n);
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        tv80s.iorq_n (iorq_n);
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        tv80s.rd_n (rd_n);
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        tv80s.wr_n (wr_n);
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        tv80s.rfsh_n (rfsh_n);
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        tv80s.halt_n (halt_n);
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        tv80s.busak_n (busak_n);
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        tv80s.di (di);
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        tv80s.dout (dout);
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86 97 ghutchis
        di_mux di_mux0("di_mux0");
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        di_mux0.mreq_n (mreq_n);
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        di_mux0.iorq_n (iorq_n);
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        di_mux0.addr   (addr);
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        di_mux0.di     (di);
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        di_mux0.di_mem (di_mem);
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        di_mux0.di_uart (di_uart);
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        di_mux0.di_resp (di_resp);
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        di_mux0.uart_cs_n (uart_cs_n);
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96 91 ghutchis
    env_memory env_memory0("env_memory0");
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    env_memory0.clk (clk);
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    env_memory0.wr_data (dout);
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    env_memory0.rd_data (di_mem);
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    env_memory0.mreq_n (mreq_n);
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    env_memory0.rd_n (rd_n);
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    env_memory0.wr_n (wr_n);
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    env_memory0.addr (addr);
104 94 ghutchis
    env_memory0.reset_n (reset_n);
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    tv_responder tv_resp0("tv_resp0");
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    tv_resp0.clk (clk);
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    tv_resp0.reset_n (reset_n);
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    tv_resp0.wait_n (wait_n);
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    tv_resp0.int_n (int_n);
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    tv_resp0.nmi_n (nmi_n);
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    tv_resp0.busak_n (busak_n);
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    tv_resp0.busrq_n (busrq_n);
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    tv_resp0.m1_n (m1_n);
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    tv_resp0.mreq_n (mreq_n);
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    tv_resp0.iorq_n (iorq_n);
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    tv_resp0.rd_n (rd_n);
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    tv_resp0.wr_n (wr_n);
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    tv_resp0.addr (addr);
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    tv_resp0.di_resp (di_resp);
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    tv_resp0.dout (dout);
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    tv_resp0.halt_n (halt_n);
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    dec0.clk (clk);
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    dec0.m1_n (m1_n);
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    dec0.addr (addr);
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    dec0.mreq_n (mreq_n);
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    dec0.rd_n (rd_n);
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    dec0.wait_n (wait_n);
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    dec0.di (di);
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    dec0.reset_n (reset_n);
132 97 ghutchis
 
133
    VT16450 t16450 ("t16450");
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    t16450.reset_n (reset_n);
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    t16450.clk  (clk);
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    t16450.rclk (clk);
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    t16450.cs_n (uart_cs_n);
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    t16450.rd_n (rd_n);
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    t16450.wr_n (wr_n);
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    t16450.addr (addr);
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    t16450.wr_data (dout);
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    t16450.rd_data (di_uart);
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    t16450.sin (serial);
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    t16450.cts_n (cts_n);
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    t16450.dsr_n (dsr_n);
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    t16450.ri_n  (ri_n);
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    t16450.dcd_n (dcd_n);
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    t16450.sout (serial);
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    t16450.rts_n (cts_n);
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    t16450.dtr_n (dsr_n);
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    t16450.out1_n (ri_n);
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    t16450.out2_n (dcd_n);
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    t16450.baudout (baudout);
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    t16450.intr (uart_int);
156 91 ghutchis
 
157 92 ghutchis
    // create dumpfile
158 94 ghutchis
    /*
159 92 ghutchis
    sc_trace_file *trace_file;
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    trace_file = sc_create_vcd_trace_file("sc_tv80_env");
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    sc_trace (trace_file, clk, "clk");
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    sc_trace (trace_file, reset_n, "reset_n");
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    sc_trace (trace_file, wait_n, "wait_n");
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    sc_trace (trace_file, int_n, "int_n");
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    sc_trace (trace_file, nmi_n, "nmi_n");
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    sc_trace (trace_file, busrq_n, "busrq_n");
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    sc_trace (trace_file, m1_n, "m1_n");
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    sc_trace (trace_file, mreq_n, "mreq_n");
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    sc_trace (trace_file, iorq_n, "iorq_n");
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    sc_trace (trace_file, rd_n, "rd_n");
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    sc_trace (trace_file, wr_n, "wr_n");
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    sc_trace (trace_file, halt_n, "halt_n");
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    sc_trace (trace_file, busak_n, "busak_n");
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    sc_trace (trace_file, di, "di");
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    sc_trace (trace_file, dout, "dout");
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    sc_trace (trace_file, addr, "addr");
177 95 ghutchis
    */
178 94 ghutchis
 
179
    // Start Verilator traces
180 95 ghutchis
    if (dumping) {
181
        Verilated::traceEverOn(true);
182
        tfp = new SpTraceFile;
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        tv80s.trace (tfp, 99);
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        tfp->open (dumpfile_name);
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    }
186 92 ghutchis
 
187 94 ghutchis
        // check for command line argument
188 95 ghutchis
        if (memfile) {
189
                printf ("Loading IHEX file %s\n", mem_src_name);
190
                env_memory0.load_ihex (mem_src_name);
191 94 ghutchis
        }
192
 
193
        // set reset to 0 before sim start
194
        reset_n.write (0);
195 92 ghutchis
 
196 94 ghutchis
    sc_start();
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    /*
198 92 ghutchis
    sc_close_vcd_trace_file (trace_file);
199 94 ghutchis
    */
200 95 ghutchis
    if (dumping)
201
        tfp->close();
202 92 ghutchis
 
203 91 ghutchis
    return 0;
204 92 ghutchis
}

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