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[/] [tv80/] [trunk/] [tests/] [bintr.c] - Blame information for rev 103

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1 32 ghutchis
#include "tv80_env.h"
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/*
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 * This test covers interrupt handling routines.  The actual interrupt code
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 * is in assembly, in bintr_crt0.asm.
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 *
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 * The test generates five interrupts, and clears the interrupt after
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 * each one.
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 *
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 * The isr routine uses the two writes to intr_cntdwn to first clear
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 * assertion of the current interrupt and then disable the countdown
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 * timer.
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 */
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unsigned char foo;
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volatile unsigned char test_pass;
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static unsigned char triggers;
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int phase;
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int loop;
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char done;
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char nmi_trig;
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void nmi_isr (void)
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{
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  nmi_trig++;
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  switch (phase) {
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    // nmi test
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  case 1 :
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    if (nmi_trig > 5) {
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      phase += 1;
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      nmi_trig = 0;
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      //intr_cntdwn = 255;
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      //intr_cntdwn = 0;
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      print ("Final interrupt\n");
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      intr_cntdwn = 32;
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      nmi_cntdwn = 0;
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    } else
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      nmi_cntdwn = 32;
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    break;
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  }
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}
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void isr (void)
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{
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  triggers++;
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  switch (phase) {
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    // int test
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  case 0 :
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    if (triggers > 5) {
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      phase += 1;
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      triggers = 0;
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      intr_cntdwn = 0;
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      print ("Starting NMIs\n");
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      nmi_cntdwn = 64;
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    } else {
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      intr_cntdwn = 32;
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    }
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    break;
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  case 2 :
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    intr_cntdwn = 0;
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    test_pass = 1;
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    break;
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  }
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}
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int main ()
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{
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  //int i;
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  unsigned char check;
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  test_pass = 0;
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  triggers = 0;
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  nmi_trig = 0;
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  phase = 0;
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  // start interrupt countdown
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  print ("Starting interrupts\n");
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  intr_cntdwn = 64;
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  set_timeout (50000);
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  for (loop=0; loop<1024; loop++) {
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    if (test_pass)
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      break;
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    check = sim_ctl_port;
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  }
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  if (test_pass)
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    sim_ctl (SC_TEST_PASSED);
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  else
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    sim_ctl (SC_TEST_FAILED);
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  return 0;
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}
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