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[/] [tv80/] [trunk/] [tests/] [jr1.asm] - Blame information for rev 90

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; basic test of OTIR block-transfer instruction
;
; initializes a memory region and then transfers that region
; to an accumulator
 
    .module otir
 
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
_sim_ctl_port   =       0x0080
_msg_port       =       0x0081
_timeout_port   =       0x0082
_max_timeout_low        =       0x0083
_max_timeout_high       =       0x0084
_intr_cntdwn    =       0x0090
_cksum_value    =       0x0091
_cksum_accum    =       0x0092
_inc_on_read    =       0x0093
 
    .area INIT (ABS)
    .org  0
 
    jp      init
 
 
init:
        ld      b, #0           ; keep track of # of jumps
        jr      target1
 
        ;; test unqualified jumps
target6:
        inc     b
        ld      a, #6
        cp      b
 
        jp      z, section2
        jp      test_fail
 
target2:
        inc     b
        jr      target3
 
target5:
        inc     b
        jr      target6
 
target4:
        inc     b
        jr      target5
 
target3:
        inc     b
        jr      target4
 
target1:
        inc     b
        jr      target2
 
        ;; tests C/NC jumps
section2:
        scf
 
        jr      nc, section2_fail
        jr      c, target7
 
target7:
        jr      c, target8
        jr      nc, section2_fail
 
target9:
        jr      nc, section3
section2_fail:
        jp      test_fail
 
target8:
        ccf
 
        jr      c, test_fail
        jr      nc, target9
 
        ;; tests Z/NZ jumps
section3:
        ld      a, #2
        ld      b, #1
        sub     b
 
        jr      z, section3_fail
        jr      nz, target10
 
section3_fail:
        jp      test_fail
 
target11:
        sub     b
        jr      nz, section3_fail
        jr      z, target12
        jr      section3_fail
 
target10:
        jr      nz, target11
        jp      test_fail
 
target12:
        jp      test_pass
 
test_pass:
    ;; finish simulation with test passed
    ld      a, #1
    out     (_sim_ctl_port), a
    ret
 
test_fail:
    ld      a, #2
    out     (_sim_ctl_port), a
    ret
 
reset_timeout:
    ld      a, #2
    out     (_timeout_port), a
    ret
 
    .org    0x8000
 
dbuf:
    .ds     256
 

Line No.	Rev	Author	Line
1	79	ghutchis	`; basic test of OTIR block-transfer instruction`
2			`;`
3			`; initializes a memory region and then transfers that region`
4			`; to an accumulator`
5
6			`.module otir`
7
8			`;--------------------------------------------------------`
9			`; special function registers`
10			`;--------------------------------------------------------`
11			`_sim_ctl_port = 0x0080`
12			`_msg_port = 0x0081`
13			`_timeout_port = 0x0082`
14			`_max_timeout_low = 0x0083`
15			`_max_timeout_high = 0x0084`
16			`_intr_cntdwn = 0x0090`
17			`_cksum_value = 0x0091`
18			`_cksum_accum = 0x0092`
19			`_inc_on_read = 0x0093`
20
21			`.area INIT (ABS)`
22			`.org 0`
23
24			`jp init`
25
26
27			`init:`
28			`ld b, #0 ; keep track of # of jumps`
29			`jr target1`
30
31			`;; test unqualified jumps`
32			`target6:`
33			`inc b`
34			`ld a, #6`
35			`cp b`
36
37			`jp z, section2`
38			`jp test_fail`
39
40			`target2:`
41			`inc b`
42			`jr target3`
43
44			`target5:`
45			`inc b`
46			`jr target6`
47
48			`target4:`
49			`inc b`
50			`jr target5`
51
52			`target3:`
53			`inc b`
54			`jr target4`
55
56			`target1:`
57			`inc b`
58			`jr target2`
59
60			`;; tests C/NC jumps`
61			`section2:`
62			`scf`
63
64			`jr nc, section2_fail`
65			`jr c, target7`
66
67			`target7:`
68			`jr c, target8`
69			`jr nc, section2_fail`
70
71			`target9:`
72			`jr nc, section3`
73			`section2_fail:`
74			`jp test_fail`
75
76			`target8:`
77			`ccf`
78
79			`jr c, test_fail`
80			`jr nc, target9`
81
82			`;; tests Z/NZ jumps`
83			`section3:`
84			`ld a, #2`
85			`ld b, #1`
86			`sub b`
87
88			`jr z, section3_fail`
89			`jr nz, target10`
90
91			`section3_fail:`
92			`jp test_fail`
93
94			`target11:`
95			`sub b`
96			`jr nz, section3_fail`
97			`jr z, target12`
98			`jr section3_fail`
99
100			`target10:`
101			`jr nz, target11`
102			`jp test_fail`
103
104			`target12:`
105			`jp test_pass`
106
107			`test_pass:`
108			`;; finish simulation with test passed`
109			`ld a, #1`
110			`out (_sim_ctl_port), a`
111			`ret`
112
113			`test_fail:`
114			`ld a, #2`
115			`out (_sim_ctl_port), a`
116			`ret`
117
118			`reset_timeout:`
119			`ld a, #2`
120			`out (_timeout_port), a`
121			`ret`
122
123			`.org 0x8000`
124
125			`dbuf:`
126			`.ds 256`
127

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[/] [tv80/] [trunk/] [tests/] [jr1.asm] - Blame information for rev 90